radeon_screen.c revision dabec11d277e68b6940e741651e61102767240b9
1bcc6eddd335e97d49ed2ef3a1440f94d58dce12dJon Smirl/* $XFree86: xc/lib/GL/mesa/src/drv/radeon/radeon_screen.c,v 1.7 2003/03/26 20:43:51 tsi Exp $ */ 25df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/************************************************************************** 35df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 45df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian PaulCopyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and 55df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul VA Linux Systems Inc., Fremont, California. 65df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 75df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian PaulAll Rights Reserved. 85df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 95df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian PaulPermission is hereby granted, free of charge, to any person obtaining 105df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paula copy of this software and associated documentation files (the 115df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul"Software"), to deal in the Software without restriction, including 125df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulwithout limitation the rights to use, copy, modify, merge, publish, 135df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Pauldistribute, sublicense, and/or sell copies of the Software, and to 145df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulpermit persons to whom the Software is furnished to do so, subject to 155df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulthe following conditions: 165df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 175df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian PaulThe above copyright notice and this permission notice (including the 185df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulnext paragraph) shall be included in all copies or substantial 195df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulportions of the Software. 205df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 215df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian PaulTHE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 225df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian PaulEXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 235df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian PaulMERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. 245df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian PaulIN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE 255df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian PaulLIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION 265df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian PaulOF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION 275df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian PaulWITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 285df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 295df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul**************************************************************************/ 305df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 318cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger/** 328cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger * \file radeon_screen.c 338cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger * Screen initialization functions for the Radeon driver. 345df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul * 358cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger * \author Kevin E. Martin <martin@valinux.com> 368cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger * \author Gareth Hughes <gareth@valinux.com> 375df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul */ 385df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 395df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "glheader.h" 405df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "imports.h" 41e4b2356c07d31fbeeabb13b2fb47db703b473080Brian Paul#include "mtypes.h" 42e4b2356c07d31fbeeabb13b2fb47db703b473080Brian Paul#include "framebuffer.h" 43e4b2356c07d31fbeeabb13b2fb47db703b473080Brian Paul#include "renderbuffer.h" 445df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 45462183fe4cb6df6d90632d9e2cee881c8d26b1cbAlan Hourihane#define STANDALONE_MMIO 465df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "radeon_context.h" 475df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "radeon_screen.h" 485df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "radeon_macros.h" 49e4b2356c07d31fbeeabb13b2fb47db703b473080Brian Paul#include "radeon_span.h" 505df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 515df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "utils.h" 525df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "context.h" 535df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#include "vblank.h" 54e4b2356c07d31fbeeabb13b2fb47db703b473080Brian Paul#include "drirenderbuffer.h" 555df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 5674d563cdfbfb07cc666d60dc909e90ddb9949cbbKeith Whitwell#include "GL/internal/dri_interface.h" 575df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 58d450d0b0e228e5b16c04b2a1acb9ea549aa690f2Brian Paul/* Radeon configuration 59d450d0b0e228e5b16c04b2a1acb9ea549aa690f2Brian Paul */ 60d450d0b0e228e5b16c04b2a1acb9ea549aa690f2Brian Paul#include "xmlpool.h" 61d450d0b0e228e5b16c04b2a1acb9ea549aa690f2Brian Paul 62d16aa9859c9f5a3a7bf74a13dbbdd20688d3ad84Adam JacksonPUBLIC const char __driConfigOptions[] = 63d450d0b0e228e5b16c04b2a1acb9ea549aa690f2Brian PaulDRI_CONF_BEGIN 64d450d0b0e228e5b16c04b2a1acb9ea549aa690f2Brian Paul DRI_CONF_SECTION_PERFORMANCE 65d450d0b0e228e5b16c04b2a1acb9ea549aa690f2Brian Paul DRI_CONF_TCL_MODE(DRI_CONF_TCL_CODEGEN) 66d450d0b0e228e5b16c04b2a1acb9ea549aa690f2Brian Paul DRI_CONF_FTHROTTLE_MODE(DRI_CONF_FTHROTTLE_IRQS) 67d450d0b0e228e5b16c04b2a1acb9ea549aa690f2Brian Paul DRI_CONF_VBLANK_MODE(DRI_CONF_VBLANK_DEF_INTERVAL_0) 68b31b7836d6e7abf80dd4feacce333d4b1fe6e4abRoland Scheidegger DRI_CONF_HYPERZ(false) 69d450d0b0e228e5b16c04b2a1acb9ea549aa690f2Brian Paul DRI_CONF_SECTION_END 70d450d0b0e228e5b16c04b2a1acb9ea549aa690f2Brian Paul DRI_CONF_SECTION_QUALITY 71d450d0b0e228e5b16c04b2a1acb9ea549aa690f2Brian Paul DRI_CONF_TEXTURE_DEPTH(DRI_CONF_TEXTURE_DEPTH_FB) 72effc73931f86c7961b4eb296d2d4c5d91624a9e3Felix Kuehling DRI_CONF_DEF_MAX_ANISOTROPY(1.0,"1.0,2.0,4.0,8.0,16.0") 73effc73931f86c7961b4eb296d2d4c5d91624a9e3Felix Kuehling DRI_CONF_NO_NEG_LOD_BIAS(false) 74d09209f5530e8bba78e4e0ec62b2027c588cc8f3Eric Anholt DRI_CONF_FORCE_S3TC_ENABLE(false) 75d450d0b0e228e5b16c04b2a1acb9ea549aa690f2Brian Paul DRI_CONF_COLOR_REDUCTION(DRI_CONF_COLOR_REDUCTION_DITHER) 76d450d0b0e228e5b16c04b2a1acb9ea549aa690f2Brian Paul DRI_CONF_ROUND_MODE(DRI_CONF_ROUND_TRUNC) 77d450d0b0e228e5b16c04b2a1acb9ea549aa690f2Brian Paul DRI_CONF_DITHER_MODE(DRI_CONF_DITHER_XERRORDIFF) 784932ba28adc2694161ec3fa7964cd76e3742182aDave Airlie DRI_CONF_TEXTURE_LEVEL_HACK(false) 79d450d0b0e228e5b16c04b2a1acb9ea549aa690f2Brian Paul DRI_CONF_SECTION_END 80d450d0b0e228e5b16c04b2a1acb9ea549aa690f2Brian Paul DRI_CONF_SECTION_DEBUG 81d450d0b0e228e5b16c04b2a1acb9ea549aa690f2Brian Paul DRI_CONF_NO_RAST(false) 82d450d0b0e228e5b16c04b2a1acb9ea549aa690f2Brian Paul DRI_CONF_SECTION_END 83d450d0b0e228e5b16c04b2a1acb9ea549aa690f2Brian PaulDRI_CONF_END; 844932ba28adc2694161ec3fa7964cd76e3742182aDave Airliestatic const GLuint __driNConfigOptions = 13; 85d450d0b0e228e5b16c04b2a1acb9ea549aa690f2Brian Paul 861585c234e0db4bfb7cd85c4111594f6da1582e6fIan Romanickextern const struct dri_extension card_extensions[]; 871585c234e0db4bfb7cd85c4111594f6da1582e6fIan Romanick 885df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#if 1 895df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/* Including xf86PciInfo.h introduces a bunch of errors... 905df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul */ 915df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define PCI_CHIP_RADEON_QD 0x5144 925df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define PCI_CHIP_RADEON_QE 0x5145 935df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define PCI_CHIP_RADEON_QF 0x5146 945df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define PCI_CHIP_RADEON_QG 0x5147 955df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 965df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define PCI_CHIP_RADEON_QY 0x5159 975df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define PCI_CHIP_RADEON_QZ 0x515A 985df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 99e7c7a0f3536ad23fa0a5b8bba973da8fef9d72ceMichel Dänzer#define PCI_CHIP_RN50_515E 0x515E 1009605806d81bc8a378dc70e9a89199bce11f419e2Michel Dänzer#define PCI_CHIP_RN50_5969 0x5969 1019605806d81bc8a378dc70e9a89199bce11f419e2Michel Dänzer 1025df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define PCI_CHIP_RADEON_LW 0x4C57 /* mobility 7 - has tcl */ 103de08b0d7ed8af9d56bf8f82762095de3fe094c95Roland Scheidegger#define PCI_CHIP_RADEON_LX 0x4C58 /* mobility FireGL 7800 m7 */ 1045df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 1055df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define PCI_CHIP_RADEON_LY 0x4C59 1065df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define PCI_CHIP_RADEON_LZ 0x4C5A 1075df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 1085df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#define PCI_CHIP_RV200_QW 0x5157 /* Radeon 7500 - not an R200 at all */ 109de08b0d7ed8af9d56bf8f82762095de3fe094c95Roland Scheidegger#define PCI_CHIP_RV200_QX 0x5158 110de08b0d7ed8af9d56bf8f82762095de3fe094c95Roland Scheidegger 11110095c9024efb1767fb3df0b59672299c090ad10Eric Anholt/* IGP Chipsets */ 11210095c9024efb1767fb3df0b59672299c090ad10Eric Anholt#define PCI_CHIP_RS100_4136 0x4136 11310095c9024efb1767fb3df0b59672299c090ad10Eric Anholt#define PCI_CHIP_RS200_4137 0x4137 11410095c9024efb1767fb3df0b59672299c090ad10Eric Anholt#define PCI_CHIP_RS250_4237 0x4237 11510095c9024efb1767fb3df0b59672299c090ad10Eric Anholt#define PCI_CHIP_RS100_4336 0x4336 11610095c9024efb1767fb3df0b59672299c090ad10Eric Anholt#define PCI_CHIP_RS200_4337 0x4337 11710095c9024efb1767fb3df0b59672299c090ad10Eric Anholt#define PCI_CHIP_RS250_4437 0x4437 1185df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul#endif 1195df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 1208cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger 1215df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulstatic int getSwapInfo( __DRIdrawablePrivate *dPriv, __DRIswapInfo * sInfo ); 1225df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 1238cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheideggerstatic __GLcontextModes * 1248cff2ede6eec1dd480bb8a4835b6985955514d87Roland ScheideggerradeonFillInModes( unsigned pixel_bits, unsigned depth_bits, 1258cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger unsigned stencil_bits, GLboolean have_back_buffer ) 1268cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger{ 1278cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger __GLcontextModes * modes; 1288cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger __GLcontextModes * m; 1298cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger unsigned num_modes; 1308cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger unsigned depth_buffer_factor; 1318cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger unsigned back_buffer_factor; 132da1766f12f79ae512007ab3457bdd34ec65347abIan Romanick GLenum fb_format; 133da1766f12f79ae512007ab3457bdd34ec65347abIan Romanick GLenum fb_type; 1348cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger 1358cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger /* Right now GLX_SWAP_COPY_OML isn't supported, but it would be easy 1368cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger * enough to add support. Basically, if a context is created with an 1378cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger * fbconfig where the swap method is GLX_SWAP_COPY_OML, pageflipping 1388cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger * will never be used. 1398cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger */ 1408cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger static const GLenum back_buffer_modes[] = { 1418cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger GLX_NONE, GLX_SWAP_UNDEFINED_OML /*, GLX_SWAP_COPY_OML */ 1428cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger }; 1438cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger 14438b317d508a2a3a4cc6d700ebca80c3b06c913e2Alan Hourihane u_int8_t depth_bits_array[2]; 14538b317d508a2a3a4cc6d700ebca80c3b06c913e2Alan Hourihane u_int8_t stencil_bits_array[2]; 1468cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger 1478cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger 148da1766f12f79ae512007ab3457bdd34ec65347abIan Romanick depth_bits_array[0] = depth_bits; 149da1766f12f79ae512007ab3457bdd34ec65347abIan Romanick depth_bits_array[1] = depth_bits; 150da1766f12f79ae512007ab3457bdd34ec65347abIan Romanick 1518cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger /* Just like with the accumulation buffer, always provide some modes 1528cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger * with a stencil buffer. It will be a sw fallback, but some apps won't 1538cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger * care about that. 1548cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger */ 155da1766f12f79ae512007ab3457bdd34ec65347abIan Romanick stencil_bits_array[0] = 0; 156da1766f12f79ae512007ab3457bdd34ec65347abIan Romanick stencil_bits_array[1] = (stencil_bits == 0) ? 8 : stencil_bits; 1578cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger 1588cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger depth_buffer_factor = ((depth_bits != 0) || (stencil_bits != 0)) ? 2 : 1; 1598cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger back_buffer_factor = (have_back_buffer) ? 2 : 1; 1608cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger 1618cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger num_modes = depth_buffer_factor * back_buffer_factor * 4; 1628cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger 163da1766f12f79ae512007ab3457bdd34ec65347abIan Romanick if ( pixel_bits == 16 ) { 164da1766f12f79ae512007ab3457bdd34ec65347abIan Romanick fb_format = GL_RGB; 165da1766f12f79ae512007ab3457bdd34ec65347abIan Romanick fb_type = GL_UNSIGNED_SHORT_5_6_5; 166da1766f12f79ae512007ab3457bdd34ec65347abIan Romanick } 167da1766f12f79ae512007ab3457bdd34ec65347abIan Romanick else { 168da1766f12f79ae512007ab3457bdd34ec65347abIan Romanick fb_format = GL_BGRA; 169da1766f12f79ae512007ab3457bdd34ec65347abIan Romanick fb_type = GL_UNSIGNED_INT_8_8_8_8_REV; 170da1766f12f79ae512007ab3457bdd34ec65347abIan Romanick } 171da1766f12f79ae512007ab3457bdd34ec65347abIan Romanick 1725f1ba3e21b62cee1a4f900a2e6964728f3eeea9bIan Romanick modes = (*dri_interface->createContextModes)( num_modes, sizeof( __GLcontextModes ) ); 1738cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger m = modes; 174da1766f12f79ae512007ab3457bdd34ec65347abIan Romanick if ( ! driFillInModes( & m, fb_format, fb_type, 175da1766f12f79ae512007ab3457bdd34ec65347abIan Romanick depth_bits_array, stencil_bits_array, depth_buffer_factor, 1768cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger back_buffer_modes, back_buffer_factor, 177da1766f12f79ae512007ab3457bdd34ec65347abIan Romanick GLX_TRUE_COLOR ) ) { 178da1766f12f79ae512007ab3457bdd34ec65347abIan Romanick fprintf( stderr, "[%s:%u] Error creating FBConfig!\n", 179da1766f12f79ae512007ab3457bdd34ec65347abIan Romanick __func__, __LINE__ ); 180da1766f12f79ae512007ab3457bdd34ec65347abIan Romanick return NULL; 1818cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger } 1828cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger 183da1766f12f79ae512007ab3457bdd34ec65347abIan Romanick if ( ! driFillInModes( & m, fb_format, fb_type, 184da1766f12f79ae512007ab3457bdd34ec65347abIan Romanick depth_bits_array, stencil_bits_array, depth_buffer_factor, 1858cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger back_buffer_modes, back_buffer_factor, 186da1766f12f79ae512007ab3457bdd34ec65347abIan Romanick GLX_DIRECT_COLOR ) ) { 187da1766f12f79ae512007ab3457bdd34ec65347abIan Romanick fprintf( stderr, "[%s:%u] Error creating FBConfig!\n", 188da1766f12f79ae512007ab3457bdd34ec65347abIan Romanick __func__, __LINE__ ); 189da1766f12f79ae512007ab3457bdd34ec65347abIan Romanick return NULL; 1908cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger } 1918cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger 1928cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger /* Mark the visual as slow if there are "fake" stencil bits. 1938cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger */ 1948cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger for ( m = modes ; m != NULL ; m = m->next ) { 1958cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger if ( (m->stencilBits != 0) && (m->stencilBits != stencil_bits) ) { 1968cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger m->visualRating = GLX_SLOW_CONFIG; 1978cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger } 1988cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger } 1998cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger 2008cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger return modes; 2018cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger} 202c39bf5e273a4995a279ae2af59fc29e06ab47e29Ian Romanick 2038cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger 2045df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/* Create the device specific screen private data struct. 2055df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul */ 2065df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian PaulradeonScreenPtr radeonCreateScreen( __DRIscreenPrivate *sPriv ) 2075df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul{ 2085df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul radeonScreenPtr screen; 2095df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul RADEONDRIPtr dri_priv = (RADEONDRIPtr)sPriv->pDevPriv; 21099ef0a03292e7dc6aa2465aaaa620f394d2c286bAlan Hourihane unsigned char *RADEONMMIO; 211c39bf5e273a4995a279ae2af59fc29e06ab47e29Ian Romanick PFNGLXSCRENABLEEXTENSIONPROC glx_enable_extension = 2125f1ba3e21b62cee1a4f900a2e6964728f3eeea9bIan Romanick (PFNGLXSCRENABLEEXTENSIONPROC) (*dri_interface->getProcAddress("glxEnableExtension")); 213c39bf5e273a4995a279ae2af59fc29e06ab47e29Ian Romanick void * const psc = sPriv->psc->screenConfigs; 2145df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 215dabec11d277e68b6940e741651e61102767240b9Alan Hourihane if (sPriv->devPrivSize != sizeof(RADEONDRIRec)) { 216dabec11d277e68b6940e741651e61102767240b9Alan Hourihane fprintf(stderr,"\nERROR! sizeof(RADEONDRIRec) does not match passed size from device driver\n"); 217dabec11d277e68b6940e741651e61102767240b9Alan Hourihane return GL_FALSE; 218dabec11d277e68b6940e741651e61102767240b9Alan Hourihane } 2195df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 2205df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul /* Allocate the private area */ 2215df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul screen = (radeonScreenPtr) CALLOC( sizeof(*screen) ); 2225df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if ( !screen ) { 2235df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul __driUtilMessage("%s: Could not allocate memory for screen structure", 2245df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul __FUNCTION__); 2255df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul return NULL; 2265df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } 2275df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 228bcc6eddd335e97d49ed2ef3a1440f94d58dce12dJon Smirl /* parse information in __driConfigOptions */ 229d450d0b0e228e5b16c04b2a1acb9ea549aa690f2Brian Paul driParseOptionInfo (&screen->optionCache, 230d450d0b0e228e5b16c04b2a1acb9ea549aa690f2Brian Paul __driConfigOptions, __driNConfigOptions); 2315df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 2325df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul /* This is first since which regions we map depends on whether or 2335df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul * not we are using a PCI card. 2345df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul */ 2355df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul screen->IsPCI = dri_priv->IsPCI; 2365df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 237bcc6eddd335e97d49ed2ef3a1440f94d58dce12dJon Smirl { 2385df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul int ret; 239ae4a1cc0666860bf5cc37a5cb549afc9aa5448b0Jon Smirl drm_radeon_getparam_t gp; 2405df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 241bcc6eddd335e97d49ed2ef3a1440f94d58dce12dJon Smirl gp.param = RADEON_PARAM_GART_BUFFER_OFFSET; 242bcc6eddd335e97d49ed2ef3a1440f94d58dce12dJon Smirl gp.value = &screen->gart_buffer_offset; 2435df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 2445df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul ret = drmCommandWriteRead( sPriv->fd, DRM_RADEON_GETPARAM, 2455df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul &gp, sizeof(gp)); 2465df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (ret) { 247bcc6eddd335e97d49ed2ef3a1440f94d58dce12dJon Smirl FREE( screen ); 248ae4a1cc0666860bf5cc37a5cb549afc9aa5448b0Jon Smirl fprintf(stderr, "drm_radeon_getparam_t (RADEON_PARAM_GART_BUFFER_OFFSET): %d\n", ret); 2495df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul return NULL; 2505df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } 2515df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 2525df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (sPriv->drmMinor >= 6) { 2535df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul gp.param = RADEON_PARAM_IRQ_NR; 2545df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul gp.value = &screen->irq; 2555df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 2565df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul ret = drmCommandWriteRead( sPriv->fd, DRM_RADEON_GETPARAM, 2575df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul &gp, sizeof(gp)); 2585df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (ret) { 2595df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul FREE( screen ); 260ae4a1cc0666860bf5cc37a5cb549afc9aa5448b0Jon Smirl fprintf(stderr, "drm_radeon_getparam_t (RADEON_PARAM_IRQ_NR): %d\n", ret); 2615df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul return NULL; 2625df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } 2635df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } 2645df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } 2655df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 2665df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul screen->mmio.handle = dri_priv->registerHandle; 2675df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul screen->mmio.size = dri_priv->registerSize; 2685df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if ( drmMap( sPriv->fd, 2695df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul screen->mmio.handle, 2705df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul screen->mmio.size, 2715df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul &screen->mmio.map ) ) { 2725df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul FREE( screen ); 2735df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul __driUtilMessage("%s: drmMap failed\n", __FUNCTION__ ); 2745df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul return NULL; 2755df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } 2765df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 27799ef0a03292e7dc6aa2465aaaa620f394d2c286bAlan Hourihane RADEONMMIO = screen->mmio.map; 27899ef0a03292e7dc6aa2465aaaa620f394d2c286bAlan Hourihane 2795df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul screen->status.handle = dri_priv->statusHandle; 2805df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul screen->status.size = dri_priv->statusSize; 2815df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if ( drmMap( sPriv->fd, 2825df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul screen->status.handle, 2835df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul screen->status.size, 2845df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul &screen->status.map ) ) { 2855df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul drmUnmap( screen->mmio.map, screen->mmio.size ); 2865df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul FREE( screen ); 2875df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul __driUtilMessage("%s: drmMap (2) failed\n", __FUNCTION__ ); 2885df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul return NULL; 2895df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } 29038b317d508a2a3a4cc6d700ebca80c3b06c913e2Alan Hourihane screen->scratch = (__volatile__ u_int32_t *) 2915df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul ((GLubyte *)screen->status.map + RADEON_SCRATCH_REG_OFFSET); 2925df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 2935df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul screen->buffers = drmMapBufs( sPriv->fd ); 2945df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if ( !screen->buffers ) { 2955df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul drmUnmap( screen->status.map, screen->status.size ); 2965df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul drmUnmap( screen->mmio.map, screen->mmio.size ); 2975df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul FREE( screen ); 2985df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul __driUtilMessage("%s: drmMapBufs failed\n", __FUNCTION__ ); 2995df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul return NULL; 3005df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } 3015df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 302bcc6eddd335e97d49ed2ef3a1440f94d58dce12dJon Smirl if ( dri_priv->gartTexHandle && dri_priv->gartTexMapSize ) { 303bcc6eddd335e97d49ed2ef3a1440f94d58dce12dJon Smirl screen->gartTextures.handle = dri_priv->gartTexHandle; 304bcc6eddd335e97d49ed2ef3a1440f94d58dce12dJon Smirl screen->gartTextures.size = dri_priv->gartTexMapSize; 3055df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if ( drmMap( sPriv->fd, 306bcc6eddd335e97d49ed2ef3a1440f94d58dce12dJon Smirl screen->gartTextures.handle, 307bcc6eddd335e97d49ed2ef3a1440f94d58dce12dJon Smirl screen->gartTextures.size, 308bcc6eddd335e97d49ed2ef3a1440f94d58dce12dJon Smirl (drmAddressPtr)&screen->gartTextures.map ) ) { 3095df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul drmUnmapBufs( screen->buffers ); 3105df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul drmUnmap( screen->status.map, screen->status.size ); 3115df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul drmUnmap( screen->mmio.map, screen->mmio.size ); 3125df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul FREE( screen ); 313bcc6eddd335e97d49ed2ef3a1440f94d58dce12dJon Smirl __driUtilMessage("%s: drmMap failed for GART texture area\n", __FUNCTION__); 3145df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul return NULL; 3155df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } 316bcc6eddd335e97d49ed2ef3a1440f94d58dce12dJon Smirl 317bcc6eddd335e97d49ed2ef3a1440f94d58dce12dJon Smirl screen->gart_texture_offset = dri_priv->gartTexOffset + ( screen->IsPCI 318bcc6eddd335e97d49ed2ef3a1440f94d58dce12dJon Smirl ? INREG( RADEON_AIC_LO_ADDR ) 319bcc6eddd335e97d49ed2ef3a1440f94d58dce12dJon Smirl : ( ( INREG( RADEON_MC_AGP_LOCATION ) & 0x0ffffU ) << 16 ) ); 3205df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } 3215df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 3225df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul screen->chipset = 0; 3235df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul switch ( dri_priv->deviceID ) { 3245df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul default: 3255df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul fprintf(stderr, "unknown chip id, assuming full radeon support\n"); 3265df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul case PCI_CHIP_RADEON_QD: 3275df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul case PCI_CHIP_RADEON_QE: 3285df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul case PCI_CHIP_RADEON_QF: 3295df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul case PCI_CHIP_RADEON_QG: 330de7b071b5534fc423a056abd521de8bf9120f89eRoland Scheidegger /* all original radeons (7200) presumably have a stencil op bug */ 331de7b071b5534fc423a056abd521de8bf9120f89eRoland Scheidegger screen->chipset |= RADEON_CHIPSET_BROKEN_STENCIL; 3325df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul case PCI_CHIP_RV200_QW: 333de08b0d7ed8af9d56bf8f82762095de3fe094c95Roland Scheidegger case PCI_CHIP_RV200_QX: 3345df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul case PCI_CHIP_RADEON_LW: 335de08b0d7ed8af9d56bf8f82762095de3fe094c95Roland Scheidegger case PCI_CHIP_RADEON_LX: 3365df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul screen->chipset |= RADEON_CHIPSET_TCL; 3375df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul case PCI_CHIP_RADEON_QY: 3385df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul case PCI_CHIP_RADEON_QZ: 339e7c7a0f3536ad23fa0a5b8bba973da8fef9d72ceMichel Dänzer case PCI_CHIP_RN50_515E: 3409605806d81bc8a378dc70e9a89199bce11f419e2Michel Dänzer case PCI_CHIP_RN50_5969: 3415df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul case PCI_CHIP_RADEON_LY: 3425df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul case PCI_CHIP_RADEON_LZ: 34310095c9024efb1767fb3df0b59672299c090ad10Eric Anholt case PCI_CHIP_RS100_4136: /* IGPs don't have TCL */ 34410095c9024efb1767fb3df0b59672299c090ad10Eric Anholt case PCI_CHIP_RS200_4137: 34510095c9024efb1767fb3df0b59672299c090ad10Eric Anholt case PCI_CHIP_RS250_4237: 34610095c9024efb1767fb3df0b59672299c090ad10Eric Anholt case PCI_CHIP_RS100_4336: 34710095c9024efb1767fb3df0b59672299c090ad10Eric Anholt case PCI_CHIP_RS200_4337: 34810095c9024efb1767fb3df0b59672299c090ad10Eric Anholt case PCI_CHIP_RS250_4437: 3495df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul break; 3505df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } 3515df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 3525df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul screen->cpp = dri_priv->bpp / 8; 3535df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul screen->AGPMode = dri_priv->AGPMode; 3545df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 35599ef0a03292e7dc6aa2465aaaa620f394d2c286bAlan Hourihane screen->fbLocation = ( INREG( RADEON_MC_FB_LOCATION ) & 0xffff ) << 16; 35699ef0a03292e7dc6aa2465aaaa620f394d2c286bAlan Hourihane 35799ef0a03292e7dc6aa2465aaaa620f394d2c286bAlan Hourihane if ( sPriv->drmMinor >= 10 ) { 358ae4a1cc0666860bf5cc37a5cb549afc9aa5448b0Jon Smirl drm_radeon_setparam_t sp; 35999ef0a03292e7dc6aa2465aaaa620f394d2c286bAlan Hourihane 36099ef0a03292e7dc6aa2465aaaa620f394d2c286bAlan Hourihane sp.param = RADEON_SETPARAM_FB_LOCATION; 36199ef0a03292e7dc6aa2465aaaa620f394d2c286bAlan Hourihane sp.value = screen->fbLocation; 36299ef0a03292e7dc6aa2465aaaa620f394d2c286bAlan Hourihane 36399ef0a03292e7dc6aa2465aaaa620f394d2c286bAlan Hourihane drmCommandWrite( sPriv->fd, DRM_RADEON_SETPARAM, 36499ef0a03292e7dc6aa2465aaaa620f394d2c286bAlan Hourihane &sp, sizeof( sp ) ); 36599ef0a03292e7dc6aa2465aaaa620f394d2c286bAlan Hourihane } 36699ef0a03292e7dc6aa2465aaaa620f394d2c286bAlan Hourihane 3675df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul screen->frontOffset = dri_priv->frontOffset; 3685df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul screen->frontPitch = dri_priv->frontPitch; 3695df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul screen->backOffset = dri_priv->backOffset; 3705df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul screen->backPitch = dri_priv->backPitch; 3715df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul screen->depthOffset = dri_priv->depthOffset; 3725df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul screen->depthPitch = dri_priv->depthPitch; 3735df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 374a205137423e42010a025c70b05af98a6c0564f28Roland Scheidegger /* Check if ddx has set up a surface reg to cover depth buffer */ 375a205137423e42010a025c70b05af98a6c0564f28Roland Scheidegger screen->depthHasSurface = ((sPriv->ddxMajor > 4) && 376a205137423e42010a025c70b05af98a6c0564f28Roland Scheidegger (screen->chipset & RADEON_CHIPSET_TCL)); 377a205137423e42010a025c70b05af98a6c0564f28Roland Scheidegger 378ae4a1cc0666860bf5cc37a5cb549afc9aa5448b0Jon Smirl screen->texOffset[RADEON_LOCAL_TEX_HEAP] = dri_priv->textureOffset 37999ef0a03292e7dc6aa2465aaaa620f394d2c286bAlan Hourihane + screen->fbLocation; 380ae4a1cc0666860bf5cc37a5cb549afc9aa5448b0Jon Smirl screen->texSize[RADEON_LOCAL_TEX_HEAP] = dri_priv->textureSize; 381ae4a1cc0666860bf5cc37a5cb549afc9aa5448b0Jon Smirl screen->logTexGranularity[RADEON_LOCAL_TEX_HEAP] = 3825df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul dri_priv->log2TexGran; 3835df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 384bcc6eddd335e97d49ed2ef3a1440f94d58dce12dJon Smirl if ( !screen->gartTextures.map 385bcc6eddd335e97d49ed2ef3a1440f94d58dce12dJon Smirl || getenv( "RADEON_GARTTEXTURING_FORCE_DISABLE" ) ) { 3865df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul screen->numTexHeaps = RADEON_NR_TEX_HEAPS - 1; 387ae4a1cc0666860bf5cc37a5cb549afc9aa5448b0Jon Smirl screen->texOffset[RADEON_GART_TEX_HEAP] = 0; 388ae4a1cc0666860bf5cc37a5cb549afc9aa5448b0Jon Smirl screen->texSize[RADEON_GART_TEX_HEAP] = 0; 389ae4a1cc0666860bf5cc37a5cb549afc9aa5448b0Jon Smirl screen->logTexGranularity[RADEON_GART_TEX_HEAP] = 0; 3905df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } else { 3915df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul screen->numTexHeaps = RADEON_NR_TEX_HEAPS; 392ae4a1cc0666860bf5cc37a5cb549afc9aa5448b0Jon Smirl screen->texOffset[RADEON_GART_TEX_HEAP] = screen->gart_texture_offset; 393ae4a1cc0666860bf5cc37a5cb549afc9aa5448b0Jon Smirl screen->texSize[RADEON_GART_TEX_HEAP] = dri_priv->gartTexMapSize; 394ae4a1cc0666860bf5cc37a5cb549afc9aa5448b0Jon Smirl screen->logTexGranularity[RADEON_GART_TEX_HEAP] = 395bcc6eddd335e97d49ed2ef3a1440f94d58dce12dJon Smirl dri_priv->log2GARTTexGran; 3965df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } 397aaebfc88c08c79cd70f1e0d1d262a25e9ded47d1Jon Smirl 398f7c9eafa856623d5ce72afb8b20b7ccbcc3e671dIan Romanick if ( glx_enable_extension != NULL ) { 399f7c9eafa856623d5ce72afb8b20b7ccbcc3e671dIan Romanick if ( screen->irq != 0 ) { 400f7c9eafa856623d5ce72afb8b20b7ccbcc3e671dIan Romanick (*glx_enable_extension)( psc, "GLX_SGI_swap_control" ); 401f7c9eafa856623d5ce72afb8b20b7ccbcc3e671dIan Romanick (*glx_enable_extension)( psc, "GLX_SGI_video_sync" ); 402f7c9eafa856623d5ce72afb8b20b7ccbcc3e671dIan Romanick (*glx_enable_extension)( psc, "GLX_MESA_swap_control" ); 403f7c9eafa856623d5ce72afb8b20b7ccbcc3e671dIan Romanick } 404aaebfc88c08c79cd70f1e0d1d262a25e9ded47d1Jon Smirl 405f7c9eafa856623d5ce72afb8b20b7ccbcc3e671dIan Romanick (*glx_enable_extension)( psc, "GLX_MESA_swap_frame_usage" ); 406f7c9eafa856623d5ce72afb8b20b7ccbcc3e671dIan Romanick } 407c39bf5e273a4995a279ae2af59fc29e06ab47e29Ian Romanick 4085df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul screen->driScreen = sPriv; 4095df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul screen->sarea_priv_offset = dri_priv->sarea_priv_offset; 4105df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul return screen; 4115df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul} 4125df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 4135df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/* Destroy the device specific screen private data struct. 4145df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul */ 4155df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulvoid radeonDestroyScreen( __DRIscreenPrivate *sPriv ) 4165df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul{ 4175df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul radeonScreenPtr screen = (radeonScreenPtr)sPriv->private; 4185df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 4195df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (!screen) 4205df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul return; 4215df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 422bcc6eddd335e97d49ed2ef3a1440f94d58dce12dJon Smirl if ( screen->gartTextures.map ) { 423bcc6eddd335e97d49ed2ef3a1440f94d58dce12dJon Smirl drmUnmap( screen->gartTextures.map, screen->gartTextures.size ); 4245df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } 4255df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul drmUnmapBufs( screen->buffers ); 4265df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul drmUnmap( screen->status.map, screen->status.size ); 4275df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul drmUnmap( screen->mmio.map, screen->mmio.size ); 4285df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 429bcc6eddd335e97d49ed2ef3a1440f94d58dce12dJon Smirl /* free all option information */ 430bcc6eddd335e97d49ed2ef3a1440f94d58dce12dJon Smirl driDestroyOptionInfo (&screen->optionCache); 431bcc6eddd335e97d49ed2ef3a1440f94d58dce12dJon Smirl 4325df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul FREE( screen ); 4335df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul sPriv->private = NULL; 4345df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul} 4355df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 4365df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 4375df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/* Initialize the driver specific screen private data. 4385df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul */ 4395df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulstatic GLboolean 4405df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian PaulradeonInitDriver( __DRIscreenPrivate *sPriv ) 4415df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul{ 4425df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul sPriv->private = (void *) radeonCreateScreen( sPriv ); 4435df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if ( !sPriv->private ) { 4445df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul radeonDestroyScreen( sPriv ); 4455df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul return GL_FALSE; 4465df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } 4475df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 4485df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul return GL_TRUE; 4495df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul} 4505df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 4515df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 4528cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger/** 453e4b2356c07d31fbeeabb13b2fb47db703b473080Brian Paul * Create the Mesa framebuffer and renderbuffers for a given window/drawable. 4548cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger * 4558cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger * \todo This function (and its interface) will need to be updated to support 4568cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger * pbuffers. 4575df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul */ 4585df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulstatic GLboolean 4595df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian PaulradeonCreateBuffer( __DRIscreenPrivate *driScrnPriv, 4605df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul __DRIdrawablePrivate *driDrawPriv, 4615df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul const __GLcontextModes *mesaVis, 4625df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul GLboolean isPixmap ) 4635df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul{ 464e4b2356c07d31fbeeabb13b2fb47db703b473080Brian Paul radeonScreenPtr screen = (radeonScreenPtr) driScrnPriv->private; 465e4b2356c07d31fbeeabb13b2fb47db703b473080Brian Paul 4665df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if (isPixmap) { 4675df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul return GL_FALSE; /* not implemented */ 4685df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } 4695df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul else { 4705df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul const GLboolean swDepth = GL_FALSE; 4715df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul const GLboolean swAlpha = GL_FALSE; 4725df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul const GLboolean swAccum = mesaVis->accumRedBits > 0; 4735df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul const GLboolean swStencil = mesaVis->stencilBits > 0 && 4745df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul mesaVis->depthBits != 24; 475e4b2356c07d31fbeeabb13b2fb47db703b473080Brian Paul#if 0 4765df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul driDrawPriv->driverPrivate = (void *) 4775df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul _mesa_create_framebuffer( mesaVis, 4785df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul swDepth, 4795df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul swStencil, 4805df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul swAccum, 4815df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul swAlpha ); 482e4b2356c07d31fbeeabb13b2fb47db703b473080Brian Paul#else 483e4b2356c07d31fbeeabb13b2fb47db703b473080Brian Paul struct gl_framebuffer *fb = _mesa_create_framebuffer(mesaVis); 484e4b2356c07d31fbeeabb13b2fb47db703b473080Brian Paul 485e4b2356c07d31fbeeabb13b2fb47db703b473080Brian Paul { 486e4b2356c07d31fbeeabb13b2fb47db703b473080Brian Paul driRenderbuffer *frontRb 487e4b2356c07d31fbeeabb13b2fb47db703b473080Brian Paul = driNewRenderbuffer(GL_RGBA, screen->cpp, 488e4b2356c07d31fbeeabb13b2fb47db703b473080Brian Paul screen->frontOffset, screen->frontPitch); 489e4b2356c07d31fbeeabb13b2fb47db703b473080Brian Paul radeonSetSpanFunctions(frontRb, mesaVis); 490e4b2356c07d31fbeeabb13b2fb47db703b473080Brian Paul _mesa_add_renderbuffer(fb, BUFFER_FRONT_LEFT, &frontRb->Base); 491e4b2356c07d31fbeeabb13b2fb47db703b473080Brian Paul } 492e4b2356c07d31fbeeabb13b2fb47db703b473080Brian Paul 493e4b2356c07d31fbeeabb13b2fb47db703b473080Brian Paul if (mesaVis->doubleBufferMode) { 494e4b2356c07d31fbeeabb13b2fb47db703b473080Brian Paul driRenderbuffer *backRb 495e4b2356c07d31fbeeabb13b2fb47db703b473080Brian Paul = driNewRenderbuffer(GL_RGBA, screen->cpp, 496e4b2356c07d31fbeeabb13b2fb47db703b473080Brian Paul screen->backOffset, screen->backPitch); 497e4b2356c07d31fbeeabb13b2fb47db703b473080Brian Paul radeonSetSpanFunctions(backRb, mesaVis); 498e4b2356c07d31fbeeabb13b2fb47db703b473080Brian Paul _mesa_add_renderbuffer(fb, BUFFER_BACK_LEFT, &backRb->Base); 499e4b2356c07d31fbeeabb13b2fb47db703b473080Brian Paul } 500e4b2356c07d31fbeeabb13b2fb47db703b473080Brian Paul 501e4b2356c07d31fbeeabb13b2fb47db703b473080Brian Paul if (mesaVis->depthBits == 16) { 502e4b2356c07d31fbeeabb13b2fb47db703b473080Brian Paul driRenderbuffer *depthRb 503e4b2356c07d31fbeeabb13b2fb47db703b473080Brian Paul = driNewRenderbuffer(GL_DEPTH_COMPONENT16, screen->cpp, 504e4b2356c07d31fbeeabb13b2fb47db703b473080Brian Paul screen->depthOffset, screen->depthPitch); 505e4b2356c07d31fbeeabb13b2fb47db703b473080Brian Paul radeonSetSpanFunctions(depthRb, mesaVis); 506e4b2356c07d31fbeeabb13b2fb47db703b473080Brian Paul _mesa_add_renderbuffer(fb, BUFFER_DEPTH, &depthRb->Base); 507e4b2356c07d31fbeeabb13b2fb47db703b473080Brian Paul } 508e4b2356c07d31fbeeabb13b2fb47db703b473080Brian Paul else if (mesaVis->depthBits == 24) { 509e4b2356c07d31fbeeabb13b2fb47db703b473080Brian Paul driRenderbuffer *depthRb 510e4b2356c07d31fbeeabb13b2fb47db703b473080Brian Paul = driNewRenderbuffer(GL_DEPTH_COMPONENT24, screen->cpp, 511e4b2356c07d31fbeeabb13b2fb47db703b473080Brian Paul screen->depthOffset, screen->depthPitch); 512e4b2356c07d31fbeeabb13b2fb47db703b473080Brian Paul radeonSetSpanFunctions(depthRb, mesaVis); 513e4b2356c07d31fbeeabb13b2fb47db703b473080Brian Paul _mesa_add_renderbuffer(fb, BUFFER_DEPTH, &depthRb->Base); 514e4b2356c07d31fbeeabb13b2fb47db703b473080Brian Paul } 515e4b2356c07d31fbeeabb13b2fb47db703b473080Brian Paul 516e4b2356c07d31fbeeabb13b2fb47db703b473080Brian Paul if (mesaVis->stencilBits > 0 && !swStencil) { 517e4b2356c07d31fbeeabb13b2fb47db703b473080Brian Paul driRenderbuffer *stencilRb 518e4b2356c07d31fbeeabb13b2fb47db703b473080Brian Paul = driNewRenderbuffer(GL_STENCIL_INDEX8_EXT, screen->cpp, 519e4b2356c07d31fbeeabb13b2fb47db703b473080Brian Paul screen->depthOffset, screen->depthPitch); 520e4b2356c07d31fbeeabb13b2fb47db703b473080Brian Paul radeonSetSpanFunctions(stencilRb, mesaVis); 521e4b2356c07d31fbeeabb13b2fb47db703b473080Brian Paul _mesa_add_renderbuffer(fb, BUFFER_STENCIL, &stencilRb->Base); 522e4b2356c07d31fbeeabb13b2fb47db703b473080Brian Paul } 523e4b2356c07d31fbeeabb13b2fb47db703b473080Brian Paul 524e4b2356c07d31fbeeabb13b2fb47db703b473080Brian Paul _mesa_add_soft_renderbuffers(fb, 525e4b2356c07d31fbeeabb13b2fb47db703b473080Brian Paul GL_FALSE, /* color */ 526e4b2356c07d31fbeeabb13b2fb47db703b473080Brian Paul swDepth, 527e4b2356c07d31fbeeabb13b2fb47db703b473080Brian Paul swStencil, 528e4b2356c07d31fbeeabb13b2fb47db703b473080Brian Paul swAccum, 529e4b2356c07d31fbeeabb13b2fb47db703b473080Brian Paul swAlpha, 530e4b2356c07d31fbeeabb13b2fb47db703b473080Brian Paul GL_FALSE /* aux */); 531e4b2356c07d31fbeeabb13b2fb47db703b473080Brian Paul driDrawPriv->driverPrivate = (void *) fb; 532e4b2356c07d31fbeeabb13b2fb47db703b473080Brian Paul#endif 5335df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul return (driDrawPriv->driverPrivate != NULL); 5345df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } 5355df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul} 5365df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 5375df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 5385df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulstatic void 5395df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian PaulradeonDestroyBuffer(__DRIdrawablePrivate *driDrawPriv) 5405df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul{ 5415df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul _mesa_destroy_framebuffer((GLframebuffer *) (driDrawPriv->driverPrivate)); 5425df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul} 5435df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 5445df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulstatic struct __DriverAPIRec radeonAPI = { 5455df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul .InitDriver = radeonInitDriver, 5465df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul .DestroyScreen = radeonDestroyScreen, 5475df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul .CreateContext = radeonCreateContext, 5485df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul .DestroyContext = radeonDestroyContext, 5495df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul .CreateBuffer = radeonCreateBuffer, 5505df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul .DestroyBuffer = radeonDestroyBuffer, 5515df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul .SwapBuffers = radeonSwapBuffers, 5525df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul .MakeCurrent = radeonMakeCurrent, 5535df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul .UnbindContext = radeonUnbindContext, 5545df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul .GetSwapInfo = getSwapInfo, 5555df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul .GetMSC = driGetMSC32, 5565df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul .WaitForMSC = driWaitForMSC32, 5575df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul .WaitForSBC = NULL, 5585df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul .SwapBuffersMSC = NULL 5595df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul}; 5605df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 5615df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 562bcc6eddd335e97d49ed2ef3a1440f94d58dce12dJon Smirl/** 5638cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger * This is the bootstrap function for the driver. libGL supplies all of the 5648cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger * requisite information about the system, and the driver initializes itself. 5658cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger * This routine also fills in the linked list pointed to by \c driver_modes 5668cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger * with the \c __GLcontextModes that the driver can support for windows or 5678cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger * pbuffers. 568bcc6eddd335e97d49ed2ef3a1440f94d58dce12dJon Smirl * 5698cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger * \return A pointer to a \c __DRIscreenPrivate on success, or \c NULL on 5708cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger * failure. 5715df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul */ 5723d7aec70c983ed12beac0ad0aa528ac270b6b01aAdam JacksonPUBLIC 5731585c234e0db4bfb7cd85c4111594f6da1582e6fIan Romanickvoid * __driCreateNewScreen_20050727( __DRInativeDisplay *dpy, int scrn, __DRIscreen *psc, 5748cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger const __GLcontextModes * modes, 5758cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger const __DRIversion * ddx_version, 5768cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger const __DRIversion * dri_version, 5778cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger const __DRIversion * drm_version, 5788cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger const __DRIframebuffer * frame_buffer, 5798cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger drmAddress pSAREA, int fd, 5808cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger int internal_api_version, 5815f1ba3e21b62cee1a4f900a2e6964728f3eeea9bIan Romanick const __DRIinterfaceMethods * interface, 5828cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger __GLcontextModes ** driver_modes ) 5838cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger 5845df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul{ 5858cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger __DRIscreenPrivate *psp; 586a205137423e42010a025c70b05af98a6c0564f28Roland Scheidegger static const __DRIutilversion2 ddx_expected = { 4, 5, 0, 0 }; 5875b98ada88071a752b6000756949a1951183cdd0bIan Romanick static const __DRIversion dri_expected = { 4, 0, 0 }; 5885b98ada88071a752b6000756949a1951183cdd0bIan Romanick static const __DRIversion drm_expected = { 1, 3, 0 }; 5895b98ada88071a752b6000756949a1951183cdd0bIan Romanick 5905f1ba3e21b62cee1a4f900a2e6964728f3eeea9bIan Romanick dri_interface = interface; 5915f1ba3e21b62cee1a4f900a2e6964728f3eeea9bIan Romanick 592a205137423e42010a025c70b05af98a6c0564f28Roland Scheidegger if ( ! driCheckDriDdxDrmVersions3( "Radeon", 5935b98ada88071a752b6000756949a1951183cdd0bIan Romanick dri_version, & dri_expected, 5945b98ada88071a752b6000756949a1951183cdd0bIan Romanick ddx_version, & ddx_expected, 5955b98ada88071a752b6000756949a1951183cdd0bIan Romanick drm_version, & drm_expected ) ) { 5965b98ada88071a752b6000756949a1951183cdd0bIan Romanick return NULL; 5975b98ada88071a752b6000756949a1951183cdd0bIan Romanick } 5985df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 5998cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger psp = __driUtilCreateNewScreen(dpy, scrn, psc, NULL, 6008cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger ddx_version, dri_version, drm_version, 6018cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger frame_buffer, pSAREA, fd, 6028cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger internal_api_version, &radeonAPI); 6033623579e43b4c3a8d2eb7edb6efaa6f178279ec9Ian Romanick if ( psp != NULL ) { 6045f1ba3e21b62cee1a4f900a2e6964728f3eeea9bIan Romanick RADEONDRIPtr dri_priv = (RADEONDRIPtr) psp->pDevPriv; 6055f1ba3e21b62cee1a4f900a2e6964728f3eeea9bIan Romanick *driver_modes = radeonFillInModes( dri_priv->bpp, 6065f1ba3e21b62cee1a4f900a2e6964728f3eeea9bIan Romanick (dri_priv->bpp == 16) ? 16 : 24, 6075f1ba3e21b62cee1a4f900a2e6964728f3eeea9bIan Romanick (dri_priv->bpp == 16) ? 0 : 8, 6085f1ba3e21b62cee1a4f900a2e6964728f3eeea9bIan Romanick (dri_priv->backOffset != dri_priv->depthOffset) ); 6091585c234e0db4bfb7cd85c4111594f6da1582e6fIan Romanick 6101585c234e0db4bfb7cd85c4111594f6da1582e6fIan Romanick /* Calling driInitExtensions here, with a NULL context pointer, does not actually 6111585c234e0db4bfb7cd85c4111594f6da1582e6fIan Romanick * enable the extensions. It just makes sure that all the dispatch offsets for all 6121585c234e0db4bfb7cd85c4111594f6da1582e6fIan Romanick * the extensions that *might* be enables are known. This is needed because the 6131585c234e0db4bfb7cd85c4111594f6da1582e6fIan Romanick * dispatch offsets need to be known when _mesa_context_create is called, but we can't 6141585c234e0db4bfb7cd85c4111594f6da1582e6fIan Romanick * enable the extensions until we have a context pointer. 6151585c234e0db4bfb7cd85c4111594f6da1582e6fIan Romanick * 6161585c234e0db4bfb7cd85c4111594f6da1582e6fIan Romanick * Hello chicken. Hello egg. How are you two today? 6171585c234e0db4bfb7cd85c4111594f6da1582e6fIan Romanick */ 6181585c234e0db4bfb7cd85c4111594f6da1582e6fIan Romanick driInitExtensions( NULL, card_extensions, GL_FALSE ); 6195df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } 6208cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger 6218cff2ede6eec1dd480bb8a4835b6985955514d87Roland Scheidegger return (void *) psp; 6225df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul} 623c39bf5e273a4995a279ae2af59fc29e06ab47e29Ian Romanick 6245df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 6255df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul/** 6265df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul * Get information about previous buffer swaps. 6275df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul */ 6285df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paulstatic int 6295df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian PaulgetSwapInfo( __DRIdrawablePrivate *dPriv, __DRIswapInfo * sInfo ) 6305df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul{ 6315df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul radeonContextPtr rmesa; 6325df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 6335df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul if ( (dPriv == NULL) || (dPriv->driContextPriv == NULL) 6345df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul || (dPriv->driContextPriv->driverPrivate == NULL) 6355df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul || (sInfo == NULL) ) { 6365df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul return -1; 6375df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul } 6385df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 6395df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul rmesa = (radeonContextPtr) dPriv->driContextPriv->driverPrivate; 6405df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul sInfo->swap_count = rmesa->swap_count; 6415df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul sInfo->swap_ust = rmesa->swap_ust; 6425df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul sInfo->swap_missed_count = rmesa->swap_missed_count; 6435df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 6445df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul sInfo->swap_missed_usage = (sInfo->swap_missed_count != 0) 6455df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul ? driCalculateSwapUsage( dPriv, 0, rmesa->swap_missed_ust ) 6465df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul : 0.0; 6475df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul 6485df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul return 0; 6495df82c82bd53db90eb72c5aad4dd20cf6f1116b1Brian Paul} 650