18b112d2025046f85ef7f6be087c6129c872ebad2Ben Murdoch// Copyright 2011 the V8 project authors. All rights reserved. 2b8a8cc1952d61a2f3a2568848933943a543b5d3eBen Murdoch// Use of this source code is governed by a BSD-style license that can be 3b8a8cc1952d61a2f3a2568848933943a543b5d3eBen Murdoch// found in the LICENSE file. 4a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block 5a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block#ifndef V8_ARM_CONSTANTS_ARM_H_ 6a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block#define V8_ARM_CONSTANTS_ARM_H_ 7a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block 88b112d2025046f85ef7f6be087c6129c872ebad2Ben Murdoch// ARM EABI is required. 98b112d2025046f85ef7f6be087c6129c872ebad2Ben Murdoch#if defined(__arm__) && !defined(__ARM_EABI__) 108b112d2025046f85ef7f6be087c6129c872ebad2Ben Murdoch#error ARM EABI support is required. 11a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block#endif 12a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block 131e0659c275bb392c045087af4f6b0d7565cb3d77Steve Blocknamespace v8 { 141e0659c275bb392c045087af4f6b0d7565cb3d77Steve Blocknamespace internal { 15a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block 1644f0eee88ff00398ff7f715fab053374d808c90dSteve Block// Constant pool marker. 17b8a8cc1952d61a2f3a2568848933943a543b5d3eBen Murdoch// Use UDF, the permanently undefined instruction. 18b8a8cc1952d61a2f3a2568848933943a543b5d3eBen Murdochconst int kConstantPoolMarkerMask = 0xfff000f0; 19b8a8cc1952d61a2f3a2568848933943a543b5d3eBen Murdochconst int kConstantPoolMarker = 0xe7f000f0; 20b8a8cc1952d61a2f3a2568848933943a543b5d3eBen Murdochconst int kConstantPoolLengthMaxMask = 0xffff; 21b8a8cc1952d61a2f3a2568848933943a543b5d3eBen Murdochinline int EncodeConstantPoolLength(int length) { 22b8a8cc1952d61a2f3a2568848933943a543b5d3eBen Murdoch DCHECK((length & kConstantPoolLengthMaxMask) == length); 23b8a8cc1952d61a2f3a2568848933943a543b5d3eBen Murdoch return ((length & 0xfff0) << 4) | (length & 0xf); 24b8a8cc1952d61a2f3a2568848933943a543b5d3eBen Murdoch} 25b8a8cc1952d61a2f3a2568848933943a543b5d3eBen Murdochinline int DecodeConstantPoolLength(int instr) { 26b8a8cc1952d61a2f3a2568848933943a543b5d3eBen Murdoch DCHECK((instr & kConstantPoolMarkerMask) == kConstantPoolMarker); 27b8a8cc1952d61a2f3a2568848933943a543b5d3eBen Murdoch return ((instr >> 4) & 0xfff0) | (instr & 0xf); 28b8a8cc1952d61a2f3a2568848933943a543b5d3eBen Murdoch} 29b8a8cc1952d61a2f3a2568848933943a543b5d3eBen Murdoch 30b8a8cc1952d61a2f3a2568848933943a543b5d3eBen Murdoch// Used in code age prologue - ldr(pc, MemOperand(pc, -4)) 31b8a8cc1952d61a2f3a2568848933943a543b5d3eBen Murdochconst int kCodeAgeJumpInstruction = 0xe51ff004; 3244f0eee88ff00398ff7f715fab053374d808c90dSteve Block 33a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block// Number of registers in normal ARM mode. 343ef787dbeca8a5fb1086949cda830dccee07bfbdBen Murdochconst int kNumRegisters = 16; 35a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block 36d0582a6c46733687d045e4188a1bcd0123c758a1Steve Block// VFP support. 373ef787dbeca8a5fb1086949cda830dccee07bfbdBen Murdochconst int kNumVFPSingleRegisters = 32; 38b8a8cc1952d61a2f3a2568848933943a543b5d3eBen Murdochconst int kNumVFPDoubleRegisters = 32; 393ef787dbeca8a5fb1086949cda830dccee07bfbdBen Murdochconst int kNumVFPRegisters = kNumVFPSingleRegisters + kNumVFPDoubleRegisters; 40d0582a6c46733687d045e4188a1bcd0123c758a1Steve Block 41a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block// PC is register 15. 423ef787dbeca8a5fb1086949cda830dccee07bfbdBen Murdochconst int kPCRegister = 15; 433ef787dbeca8a5fb1086949cda830dccee07bfbdBen Murdochconst int kNoRegister = -1; 44a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block 451e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block// ----------------------------------------------------------------------------- 461e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block// Conditions. 471e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block 48a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block// Defines constants and accessor classes to assemble, disassemble and 49a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block// simulate ARM instructions. 50a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block// 51a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block// Section references in the code refer to the "ARM Architecture Reference 52a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block// Manual" from July 2005 (available at http://www.arm.com/miscPDFs/14128.pdf) 53a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block// 54a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block// Constants for specific fields are defined in their respective named enums. 55a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block// General constants are in an anonymous enum in class Instr. 56a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block 57a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block// Values for the condition field as defined in section A3.2 58a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Blockenum Condition { 591e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block kNoCondition = -1, 601e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block 611e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block eq = 0 << 28, // Z set Equal. 621e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block ne = 1 << 28, // Z clear Not equal. 631e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block cs = 2 << 28, // C set Unsigned higher or same. 641e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block cc = 3 << 28, // C clear Unsigned lower. 651e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block mi = 4 << 28, // N set Negative. 661e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block pl = 5 << 28, // N clear Positive or zero. 671e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block vs = 6 << 28, // V set Overflow. 681e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block vc = 7 << 28, // V clear No overflow. 691e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block hi = 8 << 28, // C set, Z clear Unsigned higher. 701e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block ls = 9 << 28, // C clear or Z set Unsigned lower or same. 711e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block ge = 10 << 28, // N == V Greater or equal. 721e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block lt = 11 << 28, // N != V Less than. 731e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block gt = 12 << 28, // Z clear, N == V Greater than. 741e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block le = 13 << 28, // Z set or N != V Less then or equal 751e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block al = 14 << 28, // Always. 761e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block 771e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block kSpecialCondition = 15 << 28, // Special condition (refer to section A3.2.1). 781e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block kNumberOfConditions = 16, 791e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block 801e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block // Aliases. 811e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block hs = cs, // C set Unsigned higher or same. 821e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block lo = cc // C clear Unsigned lower. 83a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block}; 84a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block 85a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block 861e0659c275bb392c045087af4f6b0d7565cb3d77Steve Blockinline Condition NegateCondition(Condition cond) { 87b8a8cc1952d61a2f3a2568848933943a543b5d3eBen Murdoch DCHECK(cond != al); 881e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block return static_cast<Condition>(cond ^ ne); 891e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block} 901e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block 911e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block 92b8a8cc1952d61a2f3a2568848933943a543b5d3eBen Murdoch// Commute a condition such that {a cond b == b cond' a}. 93b8a8cc1952d61a2f3a2568848933943a543b5d3eBen Murdochinline Condition CommuteCondition(Condition cond) { 941e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block switch (cond) { 951e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block case lo: 961e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block return hi; 971e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block case hi: 981e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block return lo; 991e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block case hs: 1001e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block return ls; 1011e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block case ls: 1021e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block return hs; 1031e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block case lt: 1041e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block return gt; 1051e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block case gt: 1061e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block return lt; 1071e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block case ge: 1081e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block return le; 1091e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block case le: 1101e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block return ge; 1111e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block default: 1121e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block return cond; 113b8a8cc1952d61a2f3a2568848933943a543b5d3eBen Murdoch } 1141e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block} 1151e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block 1161e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block 1171e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block// ----------------------------------------------------------------------------- 1181e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block// Instructions encoding. 1191e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block 1201e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block// Instr is merely used by the Assembler to distinguish 32bit integers 1211e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block// representing instructions from usual 32 bit values. 1221e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block// Instruction objects are pointers to 32bit values, and provide methods to 1231e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block// access the various ISA fields. 1241e0659c275bb392c045087af4f6b0d7565cb3d77Steve Blocktypedef int32_t Instr; 1251e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block 1261e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block 127a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block// Opcodes for Data-processing instructions (instructions with a type 0 and 1) 128a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block// as defined in section A3.4 129a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Blockenum Opcode { 1301e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block AND = 0 << 21, // Logical AND. 1311e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block EOR = 1 << 21, // Logical Exclusive OR. 1321e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block SUB = 2 << 21, // Subtract. 1331e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block RSB = 3 << 21, // Reverse Subtract. 1341e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block ADD = 4 << 21, // Add. 1351e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block ADC = 5 << 21, // Add with Carry. 1361e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block SBC = 6 << 21, // Subtract with Carry. 1371e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block RSC = 7 << 21, // Reverse Subtract with Carry. 1381e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block TST = 8 << 21, // Test. 1391e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block TEQ = 9 << 21, // Test Equivalence. 1401e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block CMP = 10 << 21, // Compare. 1411e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block CMN = 11 << 21, // Compare Negated. 1421e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block ORR = 12 << 21, // Logical (inclusive) OR. 1431e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block MOV = 13 << 21, // Move. 1441e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block BIC = 14 << 21, // Bit Clear. 1451e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block MVN = 15 << 21 // Move Not. 146a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block}; 147a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block 148a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block 1496ded16be15dd865a9b21ea304d5273c8be299c87Steve Block// The bits for bit 7-4 for some type 0 miscellaneous instructions. 1506ded16be15dd865a9b21ea304d5273c8be299c87Steve Blockenum MiscInstructionsBits74 { 1516ded16be15dd865a9b21ea304d5273c8be299c87Steve Block // With bits 22-21 01. 1521e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block BX = 1 << 4, 1531e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block BXJ = 2 << 4, 1541e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block BLX = 3 << 4, 1551e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block BKPT = 7 << 4, 156a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block 1576ded16be15dd865a9b21ea304d5273c8be299c87Steve Block // With bits 22-21 11. 1581e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block CLZ = 1 << 4 1591e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block}; 1601e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block 1611e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block 1621e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block// Instruction encoding bits and masks. 1631e0659c275bb392c045087af4f6b0d7565cb3d77Steve Blockenum { 1641e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block H = 1 << 5, // Halfword (or byte). 1651e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block S6 = 1 << 6, // Signed (or unsigned). 1661e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block L = 1 << 20, // Load (or store). 1671e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block S = 1 << 20, // Set condition code (or leave unchanged). 1681e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block W = 1 << 21, // Writeback base register (or leave unchanged). 1691e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block A = 1 << 21, // Accumulate in multiply instruction (or not). 1701e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block B = 1 << 22, // Unsigned byte (or word). 1711e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block N = 1 << 22, // Long (or short). 1721e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block U = 1 << 23, // Positive (or negative) offset/index. 1731e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block P = 1 << 24, // Offset/pre-indexed addressing (or post-indexed addressing). 1741e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block I = 1 << 25, // Immediate shifter operand (or not). 1751e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block 1761e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block B4 = 1 << 4, 1771e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block B5 = 1 << 5, 1781e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block B6 = 1 << 6, 1791e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block B7 = 1 << 7, 1801e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block B8 = 1 << 8, 1811e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block B9 = 1 << 9, 1821e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block B12 = 1 << 12, 1831e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block B16 = 1 << 16, 1841e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block B18 = 1 << 18, 1851e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block B19 = 1 << 19, 1861e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block B20 = 1 << 20, 1871e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block B21 = 1 << 21, 1881e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block B22 = 1 << 22, 1891e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block B23 = 1 << 23, 1901e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block B24 = 1 << 24, 1911e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block B25 = 1 << 25, 1921e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block B26 = 1 << 26, 1931e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block B27 = 1 << 27, 1941e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block B28 = 1 << 28, 1951e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block 1961e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block // Instruction bit masks. 1971e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block kCondMask = 15 << 28, 1981e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block kALUMask = 0x6f << 21, 1991e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block kRdMask = 15 << 12, // In str instruction. 2001e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block kCoprocessorMask = 15 << 8, 2011e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block kOpCodeMask = 15 << 21, // In data-processing instructions. 2021e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block kImm24Mask = (1 << 24) - 1, 203b8a8cc1952d61a2f3a2568848933943a543b5d3eBen Murdoch kImm16Mask = (1 << 16) - 1, 204b8a8cc1952d61a2f3a2568848933943a543b5d3eBen Murdoch kImm8Mask = (1 << 8) - 1, 205b8a8cc1952d61a2f3a2568848933943a543b5d3eBen Murdoch kOff12Mask = (1 << 12) - 1, 206b8a8cc1952d61a2f3a2568848933943a543b5d3eBen Murdoch kOff8Mask = (1 << 8) - 1 2071e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block}; 2081e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block 2091e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block 2101e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block// ----------------------------------------------------------------------------- 2111e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block// Addressing modes and instruction variants. 2121e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block 2131e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block// Condition code updating mode. 2141e0659c275bb392c045087af4f6b0d7565cb3d77Steve Blockenum SBit { 2151e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block SetCC = 1 << 20, // Set condition code. 2161e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block LeaveCC = 0 << 20 // Leave condition code unchanged. 2171e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block}; 2181e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block 2191e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block 2201e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block// Status register selection. 2211e0659c275bb392c045087af4f6b0d7565cb3d77Steve Blockenum SRegister { 2221e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block CPSR = 0 << 22, 2231e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block SPSR = 1 << 22 224a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block}; 225a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block 226a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block 227a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block// Shifter types for Data-processing operands as defined in section A5.1.2. 2281e0659c275bb392c045087af4f6b0d7565cb3d77Steve Blockenum ShiftOp { 2291e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block LSL = 0 << 5, // Logical shift left. 2301e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block LSR = 1 << 5, // Logical shift right. 2311e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block ASR = 2 << 5, // Arithmetic shift right. 2321e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block ROR = 3 << 5, // Rotate right. 2331e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block 2341e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block // RRX is encoded as ROR with shift_imm == 0. 2351e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block // Use a special code to make the distinction. The RRX ShiftOp is only used 2361e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block // as an argument, and will never actually be encoded. The Assembler will 2371e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block // detect it and emit the correct ROR shift operand with shift_imm == 0. 2381e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block RRX = -1, 2391e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block kNumberOfShifts = 4 2401e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block}; 2411e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block 2421e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block 2431e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block// Status register fields. 2441e0659c275bb392c045087af4f6b0d7565cb3d77Steve Blockenum SRegisterField { 2451e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block CPSR_c = CPSR | 1 << 16, 2461e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block CPSR_x = CPSR | 1 << 17, 2471e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block CPSR_s = CPSR | 1 << 18, 2481e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block CPSR_f = CPSR | 1 << 19, 2491e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block SPSR_c = SPSR | 1 << 16, 2501e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block SPSR_x = SPSR | 1 << 17, 2511e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block SPSR_s = SPSR | 1 << 18, 2521e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block SPSR_f = SPSR | 1 << 19 2531e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block}; 2541e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block 2551e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block// Status register field mask (or'ed SRegisterField enum values). 2561e0659c275bb392c045087af4f6b0d7565cb3d77Steve Blocktypedef uint32_t SRegisterFieldMask; 2571e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block 2581e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block 2591e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block// Memory operand addressing mode. 2601e0659c275bb392c045087af4f6b0d7565cb3d77Steve Blockenum AddrMode { 2611e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block // Bit encoding P U W. 2621e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block Offset = (8|4|0) << 21, // Offset (without writeback to base). 2631e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block PreIndex = (8|4|1) << 21, // Pre-indexed addressing with writeback. 2641e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block PostIndex = (0|4|0) << 21, // Post-indexed addressing with writeback. 2651e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block NegOffset = (8|0|0) << 21, // Negative offset (without writeback to base). 2661e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block NegPreIndex = (8|0|1) << 21, // Negative pre-indexed with writeback. 2671e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block NegPostIndex = (0|0|0) << 21 // Negative post-indexed with writeback. 2681e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block}; 2691e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block 2701e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block 2711e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block// Load/store multiple addressing mode. 2721e0659c275bb392c045087af4f6b0d7565cb3d77Steve Blockenum BlockAddrMode { 2731e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block // Bit encoding P U W . 2741e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block da = (0|0|0) << 21, // Decrement after. 2751e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block ia = (0|4|0) << 21, // Increment after. 2761e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block db = (8|0|0) << 21, // Decrement before. 2771e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block ib = (8|4|0) << 21, // Increment before. 2781e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block da_w = (0|0|1) << 21, // Decrement after with writeback to base. 2791e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block ia_w = (0|4|1) << 21, // Increment after with writeback to base. 2801e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block db_w = (8|0|1) << 21, // Decrement before with writeback to base. 2811e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block ib_w = (8|4|1) << 21, // Increment before with writeback to base. 2821e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block 2831e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block // Alias modes for comparison when writeback does not matter. 2841e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block da_x = (0|0|0) << 21, // Decrement after. 2851e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block ia_x = (0|4|0) << 21, // Increment after. 2861e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block db_x = (8|0|0) << 21, // Decrement before. 2878b112d2025046f85ef7f6be087c6129c872ebad2Ben Murdoch ib_x = (8|4|0) << 21, // Increment before. 2888b112d2025046f85ef7f6be087c6129c872ebad2Ben Murdoch 2898b112d2025046f85ef7f6be087c6129c872ebad2Ben Murdoch kBlockAddrModeMask = (8|4|1) << 21 290a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block}; 291a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block 292a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block 2931e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block// Coprocessor load/store operand size. 2941e0659c275bb392c045087af4f6b0d7565cb3d77Steve Blockenum LFlag { 2951e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block Long = 1 << 22, // Long load/store coprocessor. 2961e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block Short = 0 << 22 // Short load/store coprocessor. 2971e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block}; 2981e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block 2991e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block 300b8a8cc1952d61a2f3a2568848933943a543b5d3eBen Murdoch// NEON data type 301b8a8cc1952d61a2f3a2568848933943a543b5d3eBen Murdochenum NeonDataType { 302b8a8cc1952d61a2f3a2568848933943a543b5d3eBen Murdoch NeonS8 = 0x1, // U = 0, imm3 = 0b001 303b8a8cc1952d61a2f3a2568848933943a543b5d3eBen Murdoch NeonS16 = 0x2, // U = 0, imm3 = 0b010 304b8a8cc1952d61a2f3a2568848933943a543b5d3eBen Murdoch NeonS32 = 0x4, // U = 0, imm3 = 0b100 305b8a8cc1952d61a2f3a2568848933943a543b5d3eBen Murdoch NeonU8 = 1 << 24 | 0x1, // U = 1, imm3 = 0b001 306b8a8cc1952d61a2f3a2568848933943a543b5d3eBen Murdoch NeonU16 = 1 << 24 | 0x2, // U = 1, imm3 = 0b010 307b8a8cc1952d61a2f3a2568848933943a543b5d3eBen Murdoch NeonU32 = 1 << 24 | 0x4, // U = 1, imm3 = 0b100 308b8a8cc1952d61a2f3a2568848933943a543b5d3eBen Murdoch NeonDataTypeSizeMask = 0x7, 309b8a8cc1952d61a2f3a2568848933943a543b5d3eBen Murdoch NeonDataTypeUMask = 1 << 24 310b8a8cc1952d61a2f3a2568848933943a543b5d3eBen Murdoch}; 311b8a8cc1952d61a2f3a2568848933943a543b5d3eBen Murdoch 312b8a8cc1952d61a2f3a2568848933943a543b5d3eBen Murdochenum NeonListType { 313b8a8cc1952d61a2f3a2568848933943a543b5d3eBen Murdoch nlt_1 = 0x7, 314b8a8cc1952d61a2f3a2568848933943a543b5d3eBen Murdoch nlt_2 = 0xA, 315b8a8cc1952d61a2f3a2568848933943a543b5d3eBen Murdoch nlt_3 = 0x6, 316b8a8cc1952d61a2f3a2568848933943a543b5d3eBen Murdoch nlt_4 = 0x2 317b8a8cc1952d61a2f3a2568848933943a543b5d3eBen Murdoch}; 318b8a8cc1952d61a2f3a2568848933943a543b5d3eBen Murdoch 319b8a8cc1952d61a2f3a2568848933943a543b5d3eBen Murdochenum NeonSize { 320b8a8cc1952d61a2f3a2568848933943a543b5d3eBen Murdoch Neon8 = 0x0, 321b8a8cc1952d61a2f3a2568848933943a543b5d3eBen Murdoch Neon16 = 0x1, 322b8a8cc1952d61a2f3a2568848933943a543b5d3eBen Murdoch Neon32 = 0x2, 323b8a8cc1952d61a2f3a2568848933943a543b5d3eBen Murdoch Neon64 = 0x3 324b8a8cc1952d61a2f3a2568848933943a543b5d3eBen Murdoch}; 325b8a8cc1952d61a2f3a2568848933943a543b5d3eBen Murdoch 3261e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block// ----------------------------------------------------------------------------- 3271e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block// Supervisor Call (svc) specific support. 3281e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block 329a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block// Special Software Interrupt codes when used in the presence of the ARM 330a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block// simulator. 3313e5fa29ddb82551500b118e9bf37af3966277b70Teng-Hui Zhu// svc (formerly swi) provides a 24bit immediate value. Use bits 22:0 for 3323e5fa29ddb82551500b118e9bf37af3966277b70Teng-Hui Zhu// standard SoftwareInterrupCode. Bit 23 is reserved for the stop feature. 333a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Blockenum SoftwareInterruptCodes { 334a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block // transition to C code 3351e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block kCallRtRedirected= 0x10, 336a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block // break point 3371e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block kBreakpoint= 0x20, 3383e5fa29ddb82551500b118e9bf37af3966277b70Teng-Hui Zhu // stop 3391e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block kStopCode = 1 << 23 340a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block}; 3413ef787dbeca8a5fb1086949cda830dccee07bfbdBen Murdochconst uint32_t kStopCodeMask = kStopCode - 1; 3423ef787dbeca8a5fb1086949cda830dccee07bfbdBen Murdochconst uint32_t kMaxStopCode = kStopCode - 1; 3433ef787dbeca8a5fb1086949cda830dccee07bfbdBen Murdochconst int32_t kDefaultStopCode = -1; 344a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block 345a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block 34680d68eab642096c1a48b6474d6ec33064b0ad1f5Kristian Monsen// Type of VFP register. Determines register encoding. 34780d68eab642096c1a48b6474d6ec33064b0ad1f5Kristian Monsenenum VFPRegPrecision { 34880d68eab642096c1a48b6474d6ec33064b0ad1f5Kristian Monsen kSinglePrecision = 0, 34980d68eab642096c1a48b6474d6ec33064b0ad1f5Kristian Monsen kDoublePrecision = 1 35080d68eab642096c1a48b6474d6ec33064b0ad1f5Kristian Monsen}; 35180d68eab642096c1a48b6474d6ec33064b0ad1f5Kristian Monsen 3521e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block 3531e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block// VFP FPSCR constants. 3541e0659c275bb392c045087af4f6b0d7565cb3d77Steve Blockenum VFPConversionMode { 3551e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block kFPSCRRounding = 0, 3561e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block kDefaultRoundToZero = 1 3571e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block}; 3581e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block 359e0cee9b3ed82e2391fd85d118aeaa4ea361c687dBen Murdoch// This mask does not include the "inexact" or "input denormal" cumulative 360e0cee9b3ed82e2391fd85d118aeaa4ea361c687dBen Murdoch// exceptions flags, because we usually don't want to check for it. 3613ef787dbeca8a5fb1086949cda830dccee07bfbdBen Murdochconst uint32_t kVFPExceptionMask = 0xf; 3623ef787dbeca8a5fb1086949cda830dccee07bfbdBen Murdochconst uint32_t kVFPInvalidOpExceptionBit = 1 << 0; 3633ef787dbeca8a5fb1086949cda830dccee07bfbdBen Murdochconst uint32_t kVFPOverflowExceptionBit = 1 << 2; 3643ef787dbeca8a5fb1086949cda830dccee07bfbdBen Murdochconst uint32_t kVFPUnderflowExceptionBit = 1 << 3; 3653ef787dbeca8a5fb1086949cda830dccee07bfbdBen Murdochconst uint32_t kVFPInexactExceptionBit = 1 << 4; 3663ef787dbeca8a5fb1086949cda830dccee07bfbdBen Murdochconst uint32_t kVFPFlushToZeroMask = 1 << 24; 367b8a8cc1952d61a2f3a2568848933943a543b5d3eBen Murdochconst uint32_t kVFPDefaultNaNModeControlBit = 1 << 25; 3681e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block 3693ef787dbeca8a5fb1086949cda830dccee07bfbdBen Murdochconst uint32_t kVFPNConditionFlagBit = 1 << 31; 3703ef787dbeca8a5fb1086949cda830dccee07bfbdBen Murdochconst uint32_t kVFPZConditionFlagBit = 1 << 30; 3713ef787dbeca8a5fb1086949cda830dccee07bfbdBen Murdochconst uint32_t kVFPCConditionFlagBit = 1 << 29; 3723ef787dbeca8a5fb1086949cda830dccee07bfbdBen Murdochconst uint32_t kVFPVConditionFlagBit = 1 << 28; 3731e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block 3741e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block 37590bac256d9f48d4ee52d0e08bf0e5cad57b3c51cRussell Brenner// VFP rounding modes. See ARM DDI 0406B Page A2-29. 3761e0659c275bb392c045087af4f6b0d7565cb3d77Steve Blockenum VFPRoundingMode { 3771e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block RN = 0 << 22, // Round to Nearest. 3781e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block RP = 1 << 22, // Round towards Plus Infinity. 3791e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block RM = 2 << 22, // Round towards Minus Infinity. 3801e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block RZ = 3 << 22, // Round towards zero. 3811e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block 3821e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block // Aliases. 3831e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block kRoundToNearest = RN, 3841e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block kRoundToPlusInf = RP, 3851e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block kRoundToMinusInf = RM, 3861e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block kRoundToZero = RZ 38790bac256d9f48d4ee52d0e08bf0e5cad57b3c51cRussell Brenner}; 38880d68eab642096c1a48b6474d6ec33064b0ad1f5Kristian Monsen 3893ef787dbeca8a5fb1086949cda830dccee07bfbdBen Murdochconst uint32_t kVFPRoundingModeMask = 3 << 22; 3901e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block 391e0cee9b3ed82e2391fd85d118aeaa4ea361c687dBen Murdochenum CheckForInexactConversion { 392e0cee9b3ed82e2391fd85d118aeaa4ea361c687dBen Murdoch kCheckForInexactConversion, 393e0cee9b3ed82e2391fd85d118aeaa4ea361c687dBen Murdoch kDontCheckForInexactConversion 394e0cee9b3ed82e2391fd85d118aeaa4ea361c687dBen Murdoch}; 395e0cee9b3ed82e2391fd85d118aeaa4ea361c687dBen Murdoch 3961e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block// ----------------------------------------------------------------------------- 3971e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block// Hints. 3981e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block 3991e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block// Branch hints are not used on the ARM. They are defined so that they can 4001e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block// appear in shared function signatures, but will be ignored in ARM 4011e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block// implementations. 4021e0659c275bb392c045087af4f6b0d7565cb3d77Steve Blockenum Hint { no_hint }; 4031e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block 4041e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block// Hints are not used on the arm. Negating is trivial. 4051e0659c275bb392c045087af4f6b0d7565cb3d77Steve Blockinline Hint NegateHint(Hint ignored) { return no_hint; } 4061e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block 4071e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block 4081e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block// ----------------------------------------------------------------------------- 4091e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block// Instruction abstraction. 4101e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block 4111e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block// The class Instruction enables access to individual fields defined in the ARM 412a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block// architecture instruction set encoding as described in figure A3-1. 4131e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block// Note that the Assembler uses typedef int32_t Instr. 414a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block// 415a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block// Example: Test whether the instruction at ptr does set the condition code 416a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block// bits. 417a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block// 418a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block// bool InstructionSetsConditionCodes(byte* ptr) { 4191e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block// Instruction* instr = Instruction::At(ptr); 4201e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block// int type = instr->TypeValue(); 421a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block// return ((type == 0) || (type == 1)) && instr->HasS(); 422a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block// } 423a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block// 4241e0659c275bb392c045087af4f6b0d7565cb3d77Steve Blockclass Instruction { 425a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block public: 426a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block enum { 427a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block kInstrSize = 4, 428a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block kInstrSizeLog2 = 2, 429a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block kPCReadOffset = 8 430a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block }; 431a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block 4321e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block // Helper macro to define static accessors. 4331e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block // We use the cast to char* trick to bypass the strict anti-aliasing rules. 4341e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block #define DECLARE_STATIC_TYPED_ACCESSOR(return_type, Name) \ 4351e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block static inline return_type Name(Instr instr) { \ 4361e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block char* temp = reinterpret_cast<char*>(&instr); \ 4371e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block return reinterpret_cast<Instruction*>(temp)->Name(); \ 4381e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block } 4391e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block 4401e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block #define DECLARE_STATIC_ACCESSOR(Name) DECLARE_STATIC_TYPED_ACCESSOR(int, Name) 4411e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block 442a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block // Get the raw instruction bits. 4431e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline Instr InstructionBits() const { 4441e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block return *reinterpret_cast<const Instr*>(this); 445a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block } 446a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block 447a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block // Set the raw instruction bits to value. 4481e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline void SetInstructionBits(Instr value) { 4491e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block *reinterpret_cast<Instr*>(this) = value; 450a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block } 451a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block 452a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block // Read one particular bit out of the instruction bits. 453a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block inline int Bit(int nr) const { 454a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block return (InstructionBits() >> nr) & 1; 455a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block } 456a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block 4571e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block // Read a bit field's value out of the instruction bits. 458a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block inline int Bits(int hi, int lo) const { 459a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block return (InstructionBits() >> lo) & ((2 << (hi - lo)) - 1); 460a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block } 461a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block 4621e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block // Read a bit field out of the instruction bits. 4631e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline int BitField(int hi, int lo) const { 4641e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block return InstructionBits() & (((2 << (hi - lo)) - 1) << lo); 4651e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block } 4661e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block 4671e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block // Static support. 4681e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block 4691e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block // Read one particular bit out of the instruction bits. 4701e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block static inline int Bit(Instr instr, int nr) { 4711e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block return (instr >> nr) & 1; 4721e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block } 4731e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block 4741e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block // Read the value of a bit field out of the instruction bits. 4751e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block static inline int Bits(Instr instr, int hi, int lo) { 4761e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block return (instr >> lo) & ((2 << (hi - lo)) - 1); 4771e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block } 4781e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block 4791e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block 4801e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block // Read a bit field out of the instruction bits. 4811e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block static inline int BitField(Instr instr, int hi, int lo) { 4821e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block return instr & (((2 << (hi - lo)) - 1) << lo); 4831e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block } 4841e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block 485a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block 486a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block // Accessors for the different named fields used in the ARM encoding. 487a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block // The naming of these accessor corresponds to figure A3-1. 4881e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block // 4891e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block // Two kind of accessors are declared: 4903ef787dbeca8a5fb1086949cda830dccee07bfbdBen Murdoch // - <Name>Field() will return the raw field, i.e. the field's bits at their 4911e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block // original place in the instruction encoding. 4923ef787dbeca8a5fb1086949cda830dccee07bfbdBen Murdoch // e.g. if instr is the 'addgt r0, r1, r2' instruction, encoded as 4933ef787dbeca8a5fb1086949cda830dccee07bfbdBen Murdoch // 0xC0810002 ConditionField(instr) will return 0xC0000000. 4941e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block // - <Name>Value() will return the field value, shifted back to bit 0. 4953ef787dbeca8a5fb1086949cda830dccee07bfbdBen Murdoch // e.g. if instr is the 'addgt r0, r1, r2' instruction, encoded as 4963ef787dbeca8a5fb1086949cda830dccee07bfbdBen Murdoch // 0xC0810002 ConditionField(instr) will return 0xC. 4971e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block 4981e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block 499a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block // Generally applicable fields 5001e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline Condition ConditionValue() const { 501a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block return static_cast<Condition>(Bits(31, 28)); 502a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block } 5031e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline Condition ConditionField() const { 5041e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block return static_cast<Condition>(BitField(31, 28)); 5051e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block } 5061e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block DECLARE_STATIC_TYPED_ACCESSOR(Condition, ConditionValue); 5071e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block DECLARE_STATIC_TYPED_ACCESSOR(Condition, ConditionField); 5081e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block 5091e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline int TypeValue() const { return Bits(27, 25); } 510b8a8cc1952d61a2f3a2568848933943a543b5d3eBen Murdoch inline int SpecialValue() const { return Bits(27, 23); } 511a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block 5121e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline int RnValue() const { return Bits(19, 16); } 5131e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block DECLARE_STATIC_ACCESSOR(RnValue); 5141e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline int RdValue() const { return Bits(15, 12); } 5151e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block DECLARE_STATIC_ACCESSOR(RdValue); 516a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block 5171e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline int CoprocessorValue() const { return Bits(11, 8); } 518d0582a6c46733687d045e4188a1bcd0123c758a1Steve Block // Support for VFP. 519d0582a6c46733687d045e4188a1bcd0123c758a1Steve Block // Vn(19-16) | Vd(15-12) | Vm(3-0) 5201e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline int VnValue() const { return Bits(19, 16); } 5211e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline int VmValue() const { return Bits(3, 0); } 5221e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline int VdValue() const { return Bits(15, 12); } 5231e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline int NValue() const { return Bit(7); } 5241e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline int MValue() const { return Bit(5); } 5251e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline int DValue() const { return Bit(22); } 5261e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline int RtValue() const { return Bits(15, 12); } 5271e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline int PValue() const { return Bit(24); } 5281e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline int UValue() const { return Bit(23); } 5291e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline int Opc1Value() const { return (Bit(23) << 2) | Bits(21, 20); } 5301e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline int Opc2Value() const { return Bits(19, 16); } 5311e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline int Opc3Value() const { return Bits(7, 6); } 5321e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline int SzValue() const { return Bit(8); } 5331e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline int VLValue() const { return Bit(20); } 5341e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline int VCValue() const { return Bit(8); } 5351e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline int VAValue() const { return Bits(23, 21); } 5361e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline int VBValue() const { return Bits(6, 5); } 5371e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline int VFPNRegValue(VFPRegPrecision pre) { 5381e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block return VFPGlueRegValue(pre, 16, 7); 53980d68eab642096c1a48b6474d6ec33064b0ad1f5Kristian Monsen } 5401e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline int VFPMRegValue(VFPRegPrecision pre) { 5411e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block return VFPGlueRegValue(pre, 0, 5); 54280d68eab642096c1a48b6474d6ec33064b0ad1f5Kristian Monsen } 5431e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline int VFPDRegValue(VFPRegPrecision pre) { 5441e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block return VFPGlueRegValue(pre, 12, 22); 54580d68eab642096c1a48b6474d6ec33064b0ad1f5Kristian Monsen } 546d0582a6c46733687d045e4188a1bcd0123c758a1Steve Block 547a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block // Fields used in Data processing instructions 5481e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline int OpcodeValue() const { 549a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block return static_cast<Opcode>(Bits(24, 21)); 550a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block } 5511e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline Opcode OpcodeField() const { 5521e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block return static_cast<Opcode>(BitField(24, 21)); 5531e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block } 5541e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline int SValue() const { return Bit(20); } 555a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block // with register 5561e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline int RmValue() const { return Bits(3, 0); } 5571e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block DECLARE_STATIC_ACCESSOR(RmValue); 5581e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline int ShiftValue() const { return static_cast<ShiftOp>(Bits(6, 5)); } 5591e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline ShiftOp ShiftField() const { 5601e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block return static_cast<ShiftOp>(BitField(6, 5)); 5611e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block } 5621e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline int RegShiftValue() const { return Bit(4); } 5631e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline int RsValue() const { return Bits(11, 8); } 5641e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline int ShiftAmountValue() const { return Bits(11, 7); } 565a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block // with immediate 5661e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline int RotateValue() const { return Bits(11, 8); } 567b8a8cc1952d61a2f3a2568848933943a543b5d3eBen Murdoch DECLARE_STATIC_ACCESSOR(RotateValue); 5681e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline int Immed8Value() const { return Bits(7, 0); } 569b8a8cc1952d61a2f3a2568848933943a543b5d3eBen Murdoch DECLARE_STATIC_ACCESSOR(Immed8Value); 5701e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline int Immed4Value() const { return Bits(19, 16); } 5711e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline int ImmedMovwMovtValue() const { 5721e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block return Immed4Value() << 12 | Offset12Value(); } 573b8a8cc1952d61a2f3a2568848933943a543b5d3eBen Murdoch DECLARE_STATIC_ACCESSOR(ImmedMovwMovtValue); 574a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block 575a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block // Fields used in Load/Store instructions 5761e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline int PUValue() const { return Bits(24, 23); } 5771e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline int PUField() const { return BitField(24, 23); } 5781e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline int BValue() const { return Bit(22); } 5791e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline int WValue() const { return Bit(21); } 5801e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline int LValue() const { return Bit(20); } 581a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block // with register uses same fields as Data processing instructions above 582a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block // with immediate 5831e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline int Offset12Value() const { return Bits(11, 0); } 584a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block // multiple 5851e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline int RlistValue() const { return Bits(15, 0); } 586a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block // extra loads and stores 5871e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline int SignValue() const { return Bit(6); } 5881e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline int HValue() const { return Bit(5); } 5891e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline int ImmedHValue() const { return Bits(11, 8); } 5901e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline int ImmedLValue() const { return Bits(3, 0); } 591a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block 592a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block // Fields used in Branch instructions 5931e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline int LinkValue() const { return Bit(24); } 5941e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline int SImmed24Value() const { return ((InstructionBits() << 8) >> 8); } 595a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block 596a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block // Fields used in Software interrupt instructions 5971e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline SoftwareInterruptCodes SvcValue() const { 598a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block return static_cast<SoftwareInterruptCodes>(Bits(23, 0)); 599a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block } 600a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block 601a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block // Test for special encodings of type 0 instructions (extra loads and stores, 602a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block // as well as multiplications). 603a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block inline bool IsSpecialType0() const { return (Bit(7) == 1) && (Bit(4) == 1); } 604a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block 6056ded16be15dd865a9b21ea304d5273c8be299c87Steve Block // Test for miscellaneous instructions encodings of type 0 instructions. 6066ded16be15dd865a9b21ea304d5273c8be299c87Steve Block inline bool IsMiscType0() const { return (Bit(24) == 1) 6076ded16be15dd865a9b21ea304d5273c8be299c87Steve Block && (Bit(23) == 0) 6086ded16be15dd865a9b21ea304d5273c8be299c87Steve Block && (Bit(20) == 0) 6096ded16be15dd865a9b21ea304d5273c8be299c87Steve Block && ((Bit(7) == 0)); } 6106ded16be15dd865a9b21ea304d5273c8be299c87Steve Block 611b8a8cc1952d61a2f3a2568848933943a543b5d3eBen Murdoch // Test for a nop instruction, which falls under type 1. 612b8a8cc1952d61a2f3a2568848933943a543b5d3eBen Murdoch inline bool IsNopType1() const { return Bits(24, 0) == 0x0120F000; } 613b8a8cc1952d61a2f3a2568848933943a543b5d3eBen Murdoch 6141e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block // Test for a stop instruction. 6151e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline bool IsStop() const { 6161e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block return (TypeValue() == 7) && (Bit(24) == 1) && (SvcValue() >= kStopCode); 6171e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block } 6181e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block 619a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block // Special accessors that test for existence of a value. 6201e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline bool HasS() const { return SValue() == 1; } 6211e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline bool HasB() const { return BValue() == 1; } 6221e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline bool HasW() const { return WValue() == 1; } 6231e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline bool HasL() const { return LValue() == 1; } 6241e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline bool HasU() const { return UValue() == 1; } 6251e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline bool HasSign() const { return SignValue() == 1; } 6261e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline bool HasH() const { return HValue() == 1; } 6271e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline bool HasLink() const { return LinkValue() == 1; } 628a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block 6293bec4d28b1f388dbc06a9c4276e1a03e86c52b04Ben Murdoch // Decoding the double immediate in the vmov instruction. 6303bec4d28b1f388dbc06a9c4276e1a03e86c52b04Ben Murdoch double DoubleImmedVmov() const; 6313bec4d28b1f388dbc06a9c4276e1a03e86c52b04Ben Murdoch 632a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block // Instructions are read of out a code stream. The only way to get a 633a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block // reference to an instruction is to convert a pointer. There is no way 6341e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block // to allocate or create instances of class Instruction. 6351e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block // Use the At(pc) function to create references to Instruction. 6361e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block static Instruction* At(byte* pc) { 6371e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block return reinterpret_cast<Instruction*>(pc); 6381e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block } 6391e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block 640a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block 641a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block private: 64280d68eab642096c1a48b6474d6ec33064b0ad1f5Kristian Monsen // Join split register codes, depending on single or double precision. 64380d68eab642096c1a48b6474d6ec33064b0ad1f5Kristian Monsen // four_bit is the position of the least-significant bit of the four 64480d68eab642096c1a48b6474d6ec33064b0ad1f5Kristian Monsen // bit specifier. one_bit is the position of the additional single bit 64580d68eab642096c1a48b6474d6ec33064b0ad1f5Kristian Monsen // specifier. 6461e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block inline int VFPGlueRegValue(VFPRegPrecision pre, int four_bit, int one_bit) { 64780d68eab642096c1a48b6474d6ec33064b0ad1f5Kristian Monsen if (pre == kSinglePrecision) { 64880d68eab642096c1a48b6474d6ec33064b0ad1f5Kristian Monsen return (Bits(four_bit + 3, four_bit) << 1) | Bit(one_bit); 64980d68eab642096c1a48b6474d6ec33064b0ad1f5Kristian Monsen } 65080d68eab642096c1a48b6474d6ec33064b0ad1f5Kristian Monsen return (Bit(one_bit) << 4) | Bits(four_bit + 3, four_bit); 65180d68eab642096c1a48b6474d6ec33064b0ad1f5Kristian Monsen } 65280d68eab642096c1a48b6474d6ec33064b0ad1f5Kristian Monsen 6531e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block // We need to prevent the creation of instances of class Instruction. 6541e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block DISALLOW_IMPLICIT_CONSTRUCTORS(Instruction); 655a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block}; 656a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block 657a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block 658a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block// Helper functions for converting between register numbers and names. 659a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Blockclass Registers { 660a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block public: 661a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block // Return the name of the register. 662a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block static const char* Name(int reg); 663a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block 664a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block // Lookup the register number for the name provided. 665a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block static int Number(const char* name); 666a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block 667a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block struct RegisterAlias { 668a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block int reg; 669d0582a6c46733687d045e4188a1bcd0123c758a1Steve Block const char* name; 670a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block }; 671a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block 672a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block private: 673a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block static const char* names_[kNumRegisters]; 674a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block static const RegisterAlias aliases_[]; 675a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block}; 676a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block 677d0582a6c46733687d045e4188a1bcd0123c758a1Steve Block// Helper functions for converting between VFP register numbers and names. 678d0582a6c46733687d045e4188a1bcd0123c758a1Steve Blockclass VFPRegisters { 679d0582a6c46733687d045e4188a1bcd0123c758a1Steve Block public: 680d0582a6c46733687d045e4188a1bcd0123c758a1Steve Block // Return the name of the register. 6816ded16be15dd865a9b21ea304d5273c8be299c87Steve Block static const char* Name(int reg, bool is_double); 6826ded16be15dd865a9b21ea304d5273c8be299c87Steve Block 6836ded16be15dd865a9b21ea304d5273c8be299c87Steve Block // Lookup the register number for the name provided. 6846ded16be15dd865a9b21ea304d5273c8be299c87Steve Block // Set flag pointed by is_double to true if register 6856ded16be15dd865a9b21ea304d5273c8be299c87Steve Block // is double-precision. 6866ded16be15dd865a9b21ea304d5273c8be299c87Steve Block static int Number(const char* name, bool* is_double); 687d0582a6c46733687d045e4188a1bcd0123c758a1Steve Block 688d0582a6c46733687d045e4188a1bcd0123c758a1Steve Block private: 689d0582a6c46733687d045e4188a1bcd0123c758a1Steve Block static const char* names_[kNumVFPRegisters]; 690d0582a6c46733687d045e4188a1bcd0123c758a1Steve Block}; 691a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block 692a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block 6931e0659c275bb392c045087af4f6b0d7565cb3d77Steve Block} } // namespace v8::internal 694a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block 695a7e24c173cf37484693b9abb38e494fa7bd7baebSteve Block#endif // V8_ARM_CONSTANTS_ARM_H_ 696