cpu-features.c revision e4f17c1301d2499c578b311eb9539cb42cc5af16
1/* 2 * Copyright (C) 2010 The Android Open Source Project 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * * Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * * Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in 12 * the documentation and/or other materials provided with the 13 * distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 16 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 17 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 18 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 19 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS 22 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT 25 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29/* ChangeLog for this library: 30 * 31 * NDK r10e?: Add MIPS MSA feature. 32 * 33 * NDK r10: Support for 64-bit CPUs (Intel, ARM & MIPS). 34 * 35 * NDK r8d: Add android_setCpu(). 36 * 37 * NDK r8c: Add new ARM CPU features: VFPv2, VFP_D32, VFP_FP16, 38 * VFP_FMA, NEON_FMA, IDIV_ARM, IDIV_THUMB2 and iWMMXt. 39 * 40 * Rewrite the code to parse /proc/self/auxv instead of 41 * the "Features" field in /proc/cpuinfo. 42 * 43 * Dynamically allocate the buffer that hold the content 44 * of /proc/cpuinfo to deal with newer hardware. 45 * 46 * NDK r7c: Fix CPU count computation. The old method only reported the 47 * number of _active_ CPUs when the library was initialized, 48 * which could be less than the real total. 49 * 50 * NDK r5: Handle buggy kernels which report a CPU Architecture number of 7 51 * for an ARMv6 CPU (see below). 52 * 53 * Handle kernels that only report 'neon', and not 'vfpv3' 54 * (VFPv3 is mandated by the ARM architecture is Neon is implemented) 55 * 56 * Handle kernels that only report 'vfpv3d16', and not 'vfpv3' 57 * 58 * Fix x86 compilation. Report ANDROID_CPU_FAMILY_X86 in 59 * android_getCpuFamily(). 60 * 61 * NDK r4: Initial release 62 */ 63 64#if defined(__le32__) || defined(__le64__) 65 66// When users enter this, we should only provide interface and 67// libportable will give the implementations. 68 69#else // !__le32__ && !__le64__ 70 71#include "cpu-features.h" 72 73#include <dlfcn.h> 74#include <errno.h> 75#include <fcntl.h> 76#include <pthread.h> 77#include <stdio.h> 78#include <stdlib.h> 79#include <sys/system_properties.h> 80 81static pthread_once_t g_once; 82static int g_inited; 83static AndroidCpuFamily g_cpuFamily; 84static uint64_t g_cpuFeatures; 85static int g_cpuCount; 86 87#ifdef __arm__ 88static uint32_t g_cpuIdArm; 89#endif 90 91static const int android_cpufeatures_debug = 0; 92 93#define D(...) \ 94 do { \ 95 if (android_cpufeatures_debug) { \ 96 printf(__VA_ARGS__); fflush(stdout); \ 97 } \ 98 } while (0) 99 100#ifdef __i386__ 101static __inline__ void x86_cpuid(int func, int values[4]) 102{ 103 int a, b, c, d; 104 /* We need to preserve ebx since we're compiling PIC code */ 105 /* this means we can't use "=b" for the second output register */ 106 __asm__ __volatile__ ( \ 107 "push %%ebx\n" 108 "cpuid\n" \ 109 "mov %%ebx, %1\n" 110 "pop %%ebx\n" 111 : "=a" (a), "=r" (b), "=c" (c), "=d" (d) \ 112 : "a" (func) \ 113 ); 114 values[0] = a; 115 values[1] = b; 116 values[2] = c; 117 values[3] = d; 118} 119#endif 120 121/* Get the size of a file by reading it until the end. This is needed 122 * because files under /proc do not always return a valid size when 123 * using fseek(0, SEEK_END) + ftell(). Nor can they be mmap()-ed. 124 */ 125static int 126get_file_size(const char* pathname) 127{ 128 129 int fd, result = 0; 130 char buffer[256]; 131 132 fd = open(pathname, O_RDONLY); 133 if (fd < 0) { 134 D("Can't open %s: %s\n", pathname, strerror(errno)); 135 return -1; 136 } 137 138 for (;;) { 139 int ret = read(fd, buffer, sizeof buffer); 140 if (ret < 0) { 141 if (errno == EINTR) 142 continue; 143 D("Error while reading %s: %s\n", pathname, strerror(errno)); 144 break; 145 } 146 if (ret == 0) 147 break; 148 149 result += ret; 150 } 151 close(fd); 152 return result; 153} 154 155/* Read the content of /proc/cpuinfo into a user-provided buffer. 156 * Return the length of the data, or -1 on error. Does *not* 157 * zero-terminate the content. Will not read more 158 * than 'buffsize' bytes. 159 */ 160static int 161read_file(const char* pathname, char* buffer, size_t buffsize) 162{ 163 int fd, count; 164 165 fd = open(pathname, O_RDONLY); 166 if (fd < 0) { 167 D("Could not open %s: %s\n", pathname, strerror(errno)); 168 return -1; 169 } 170 count = 0; 171 while (count < (int)buffsize) { 172 int ret = read(fd, buffer + count, buffsize - count); 173 if (ret < 0) { 174 if (errno == EINTR) 175 continue; 176 D("Error while reading from %s: %s\n", pathname, strerror(errno)); 177 if (count == 0) 178 count = -1; 179 break; 180 } 181 if (ret == 0) 182 break; 183 count += ret; 184 } 185 close(fd); 186 return count; 187} 188 189/* Extract the content of a the first occurence of a given field in 190 * the content of /proc/cpuinfo and return it as a heap-allocated 191 * string that must be freed by the caller. 192 * 193 * Return NULL if not found 194 */ 195static char* 196extract_cpuinfo_field(const char* buffer, int buflen, const char* field) 197{ 198 int fieldlen = strlen(field); 199 const char* bufend = buffer + buflen; 200 char* result = NULL; 201 int len; 202 const char *p, *q; 203 204 /* Look for first field occurence, and ensures it starts the line. */ 205 p = buffer; 206 for (;;) { 207 p = memmem(p, bufend-p, field, fieldlen); 208 if (p == NULL) 209 goto EXIT; 210 211 if (p == buffer || p[-1] == '\n') 212 break; 213 214 p += fieldlen; 215 } 216 217 /* Skip to the first column followed by a space */ 218 p += fieldlen; 219 p = memchr(p, ':', bufend-p); 220 if (p == NULL || p[1] != ' ') 221 goto EXIT; 222 223 /* Find the end of the line */ 224 p += 2; 225 q = memchr(p, '\n', bufend-p); 226 if (q == NULL) 227 q = bufend; 228 229 /* Copy the line into a heap-allocated buffer */ 230 len = q-p; 231 result = malloc(len+1); 232 if (result == NULL) 233 goto EXIT; 234 235 memcpy(result, p, len); 236 result[len] = '\0'; 237 238EXIT: 239 return result; 240} 241 242/* Checks that a space-separated list of items contains one given 'item'. 243 * Returns 1 if found, 0 otherwise. 244 */ 245static int 246has_list_item(const char* list, const char* item) 247{ 248 const char* p = list; 249 int itemlen = strlen(item); 250 251 if (list == NULL) 252 return 0; 253 254 while (*p) { 255 const char* q; 256 257 /* skip spaces */ 258 while (*p == ' ' || *p == '\t') 259 p++; 260 261 /* find end of current list item */ 262 q = p; 263 while (*q && *q != ' ' && *q != '\t') 264 q++; 265 266 if (itemlen == q-p && !memcmp(p, item, itemlen)) 267 return 1; 268 269 /* skip to next item */ 270 p = q; 271 } 272 return 0; 273} 274 275/* Parse a number starting from 'input', but not going further 276 * than 'limit'. Return the value into '*result'. 277 * 278 * NOTE: Does not skip over leading spaces, or deal with sign characters. 279 * NOTE: Ignores overflows. 280 * 281 * The function returns NULL in case of error (bad format), or the new 282 * position after the decimal number in case of success (which will always 283 * be <= 'limit'). 284 */ 285static const char* 286parse_number(const char* input, const char* limit, int base, int* result) 287{ 288 const char* p = input; 289 int val = 0; 290 while (p < limit) { 291 int d = (*p - '0'); 292 if ((unsigned)d >= 10U) { 293 d = (*p - 'a'); 294 if ((unsigned)d >= 6U) 295 d = (*p - 'A'); 296 if ((unsigned)d >= 6U) 297 break; 298 d += 10; 299 } 300 if (d >= base) 301 break; 302 val = val*base + d; 303 p++; 304 } 305 if (p == input) 306 return NULL; 307 308 *result = val; 309 return p; 310} 311 312static const char* 313parse_decimal(const char* input, const char* limit, int* result) 314{ 315 return parse_number(input, limit, 10, result); 316} 317 318static const char* 319parse_hexadecimal(const char* input, const char* limit, int* result) 320{ 321 return parse_number(input, limit, 16, result); 322} 323 324/* This small data type is used to represent a CPU list / mask, as read 325 * from sysfs on Linux. See http://www.kernel.org/doc/Documentation/cputopology.txt 326 * 327 * For now, we don't expect more than 32 cores on mobile devices, so keep 328 * everything simple. 329 */ 330typedef struct { 331 uint32_t mask; 332} CpuList; 333 334static __inline__ void 335cpulist_init(CpuList* list) { 336 list->mask = 0; 337} 338 339static __inline__ void 340cpulist_and(CpuList* list1, CpuList* list2) { 341 list1->mask &= list2->mask; 342} 343 344static __inline__ void 345cpulist_set(CpuList* list, int index) { 346 if ((unsigned)index < 32) { 347 list->mask |= (uint32_t)(1U << index); 348 } 349} 350 351static __inline__ int 352cpulist_count(CpuList* list) { 353 return __builtin_popcount(list->mask); 354} 355 356/* Parse a textual list of cpus and store the result inside a CpuList object. 357 * Input format is the following: 358 * - comma-separated list of items (no spaces) 359 * - each item is either a single decimal number (cpu index), or a range made 360 * of two numbers separated by a single dash (-). Ranges are inclusive. 361 * 362 * Examples: 0 363 * 2,4-127,128-143 364 * 0-1 365 */ 366static void 367cpulist_parse(CpuList* list, const char* line, int line_len) 368{ 369 const char* p = line; 370 const char* end = p + line_len; 371 const char* q; 372 373 /* NOTE: the input line coming from sysfs typically contains a 374 * trailing newline, so take care of it in the code below 375 */ 376 while (p < end && *p != '\n') 377 { 378 int val, start_value, end_value; 379 380 /* Find the end of current item, and put it into 'q' */ 381 q = memchr(p, ',', end-p); 382 if (q == NULL) { 383 q = end; 384 } 385 386 /* Get first value */ 387 p = parse_decimal(p, q, &start_value); 388 if (p == NULL) 389 goto BAD_FORMAT; 390 391 end_value = start_value; 392 393 /* If we're not at the end of the item, expect a dash and 394 * and integer; extract end value. 395 */ 396 if (p < q && *p == '-') { 397 p = parse_decimal(p+1, q, &end_value); 398 if (p == NULL) 399 goto BAD_FORMAT; 400 } 401 402 /* Set bits CPU list bits */ 403 for (val = start_value; val <= end_value; val++) { 404 cpulist_set(list, val); 405 } 406 407 /* Jump to next item */ 408 p = q; 409 if (p < end) 410 p++; 411 } 412 413BAD_FORMAT: 414 ; 415} 416 417/* Read a CPU list from one sysfs file */ 418static void 419cpulist_read_from(CpuList* list, const char* filename) 420{ 421 char file[64]; 422 int filelen; 423 424 cpulist_init(list); 425 426 filelen = read_file(filename, file, sizeof file); 427 if (filelen < 0) { 428 D("Could not read %s: %s\n", filename, strerror(errno)); 429 return; 430 } 431 432 cpulist_parse(list, file, filelen); 433} 434#if defined(__aarch64__) 435// see <uapi/asm/hwcap.h> kernel header 436#define HWCAP_FP (1 << 0) 437#define HWCAP_ASIMD (1 << 1) 438#define HWCAP_AES (1 << 3) 439#define HWCAP_PMULL (1 << 4) 440#define HWCAP_SHA1 (1 << 5) 441#define HWCAP_SHA2 (1 << 6) 442#define HWCAP_CRC32 (1 << 7) 443#endif 444 445#if defined(__arm__) 446 447// See <asm/hwcap.h> kernel header. 448#define HWCAP_VFP (1 << 6) 449#define HWCAP_IWMMXT (1 << 9) 450#define HWCAP_NEON (1 << 12) 451#define HWCAP_VFPv3 (1 << 13) 452#define HWCAP_VFPv3D16 (1 << 14) 453#define HWCAP_VFPv4 (1 << 16) 454#define HWCAP_IDIVA (1 << 17) 455#define HWCAP_IDIVT (1 << 18) 456 457// see <uapi/asm/hwcap.h> kernel header 458#define HWCAP2_AES (1 << 0) 459#define HWCAP2_PMULL (1 << 1) 460#define HWCAP2_SHA1 (1 << 2) 461#define HWCAP2_SHA2 (1 << 3) 462#define HWCAP2_CRC32 (1 << 4) 463 464// This is the list of 32-bit ARMv7 optional features that are _always_ 465// supported by ARMv8 CPUs, as mandated by the ARM Architecture Reference 466// Manual. 467#define HWCAP_SET_FOR_ARMV8 \ 468 ( HWCAP_VFP | \ 469 HWCAP_NEON | \ 470 HWCAP_VFPv3 | \ 471 HWCAP_VFPv4 | \ 472 HWCAP_IDIVA | \ 473 HWCAP_IDIVT ) 474#endif 475 476#if defined(__mips__) 477// see <uapi/asm/hwcap.h> kernel header 478#define HWCAP_MIPS_R6 (1 << 0) 479#define HWCAP_MIPS_MSA (1 << 1) 480#endif 481 482#if defined(__arm__) || defined(__aarch64__) || defined(__mips__) 483 484#define AT_HWCAP 16 485#define AT_HWCAP2 26 486 487// Probe the system's C library for a 'getauxval' function and call it if 488// it exits, or return 0 for failure. This function is available since API 489// level 20. 490// 491// This code does *NOT* check for '__ANDROID_API__ >= 20' to support the 492// edge case where some NDK developers use headers for a platform that is 493// newer than the one really targetted by their application. 494// This is typically done to use newer native APIs only when running on more 495// recent Android versions, and requires careful symbol management. 496// 497// Note that getauxval() can't really be re-implemented here, because 498// its implementation does not parse /proc/self/auxv. Instead it depends 499// on values that are passed by the kernel at process-init time to the 500// C runtime initialization layer. 501static uint32_t 502get_elf_hwcap_from_getauxval(int hwcap_type) { 503 typedef unsigned long getauxval_func_t(unsigned long); 504 505 dlerror(); 506 void* libc_handle = dlopen("libc.so", RTLD_NOW); 507 if (!libc_handle) { 508 D("Could not dlopen() C library: %s\n", dlerror()); 509 return 0; 510 } 511 512 uint32_t ret = 0; 513 getauxval_func_t* func = (getauxval_func_t*) 514 dlsym(libc_handle, "getauxval"); 515 if (!func) { 516 D("Could not find getauxval() in C library\n"); 517 } else { 518 // Note: getauxval() returns 0 on failure. Doesn't touch errno. 519 ret = (uint32_t)(*func)(hwcap_type); 520 } 521 dlclose(libc_handle); 522 return ret; 523} 524#endif 525 526#if defined(__arm__) 527// Parse /proc/self/auxv to extract the ELF HW capabilities bitmap for the 528// current CPU. Note that this file is not accessible from regular 529// application processes on some Android platform releases. 530// On success, return new ELF hwcaps, or 0 on failure. 531static uint32_t 532get_elf_hwcap_from_proc_self_auxv(void) { 533 const char filepath[] = "/proc/self/auxv"; 534 int fd = TEMP_FAILURE_RETRY(open(filepath, O_RDONLY)); 535 if (fd < 0) { 536 D("Could not open %s: %s\n", filepath, strerror(errno)); 537 return 0; 538 } 539 540 struct { uint32_t tag; uint32_t value; } entry; 541 542 uint32_t result = 0; 543 for (;;) { 544 int ret = TEMP_FAILURE_RETRY(read(fd, (char*)&entry, sizeof entry)); 545 if (ret < 0) { 546 D("Error while reading %s: %s\n", filepath, strerror(errno)); 547 break; 548 } 549 // Detect end of list. 550 if (ret == 0 || (entry.tag == 0 && entry.value == 0)) 551 break; 552 if (entry.tag == AT_HWCAP) { 553 result = entry.value; 554 break; 555 } 556 } 557 close(fd); 558 return result; 559} 560 561/* Compute the ELF HWCAP flags from the content of /proc/cpuinfo. 562 * This works by parsing the 'Features' line, which lists which optional 563 * features the device's CPU supports, on top of its reference 564 * architecture. 565 */ 566static uint32_t 567get_elf_hwcap_from_proc_cpuinfo(const char* cpuinfo, int cpuinfo_len) { 568 uint32_t hwcaps = 0; 569 long architecture = 0; 570 char* cpuArch = extract_cpuinfo_field(cpuinfo, cpuinfo_len, "CPU architecture"); 571 if (cpuArch) { 572 architecture = strtol(cpuArch, NULL, 10); 573 free(cpuArch); 574 575 if (architecture >= 8L) { 576 // This is a 32-bit ARM binary running on a 64-bit ARM64 kernel. 577 // The 'Features' line only lists the optional features that the 578 // device's CPU supports, compared to its reference architecture 579 // which are of no use for this process. 580 D("Faking 32-bit ARM HWCaps on ARMv%ld CPU\n", architecture); 581 return HWCAP_SET_FOR_ARMV8; 582 } 583 } 584 585 char* cpuFeatures = extract_cpuinfo_field(cpuinfo, cpuinfo_len, "Features"); 586 if (cpuFeatures != NULL) { 587 D("Found cpuFeatures = '%s'\n", cpuFeatures); 588 589 if (has_list_item(cpuFeatures, "vfp")) 590 hwcaps |= HWCAP_VFP; 591 if (has_list_item(cpuFeatures, "vfpv3")) 592 hwcaps |= HWCAP_VFPv3; 593 if (has_list_item(cpuFeatures, "vfpv3d16")) 594 hwcaps |= HWCAP_VFPv3D16; 595 if (has_list_item(cpuFeatures, "vfpv4")) 596 hwcaps |= HWCAP_VFPv4; 597 if (has_list_item(cpuFeatures, "neon")) 598 hwcaps |= HWCAP_NEON; 599 if (has_list_item(cpuFeatures, "idiva")) 600 hwcaps |= HWCAP_IDIVA; 601 if (has_list_item(cpuFeatures, "idivt")) 602 hwcaps |= HWCAP_IDIVT; 603 if (has_list_item(cpuFeatures, "idiv")) 604 hwcaps |= HWCAP_IDIVA | HWCAP_IDIVT; 605 if (has_list_item(cpuFeatures, "iwmmxt")) 606 hwcaps |= HWCAP_IWMMXT; 607 608 free(cpuFeatures); 609 } 610 return hwcaps; 611} 612#endif /* __arm__ */ 613 614/* Return the number of cpus present on a given device. 615 * 616 * To handle all weird kernel configurations, we need to compute the 617 * intersection of the 'present' and 'possible' CPU lists and count 618 * the result. 619 */ 620static int 621get_cpu_count(void) 622{ 623 CpuList cpus_present[1]; 624 CpuList cpus_possible[1]; 625 626 cpulist_read_from(cpus_present, "/sys/devices/system/cpu/present"); 627 cpulist_read_from(cpus_possible, "/sys/devices/system/cpu/possible"); 628 629 /* Compute the intersection of both sets to get the actual number of 630 * CPU cores that can be used on this device by the kernel. 631 */ 632 cpulist_and(cpus_present, cpus_possible); 633 634 return cpulist_count(cpus_present); 635} 636 637static void 638android_cpuInitFamily(void) 639{ 640#if defined(__arm__) 641 g_cpuFamily = ANDROID_CPU_FAMILY_ARM; 642#elif defined(__i386__) 643 g_cpuFamily = ANDROID_CPU_FAMILY_X86; 644#elif defined(__mips64) 645/* Needs to be before __mips__ since the compiler defines both */ 646 g_cpuFamily = ANDROID_CPU_FAMILY_MIPS64; 647#elif defined(__mips__) 648 g_cpuFamily = ANDROID_CPU_FAMILY_MIPS; 649#elif defined(__aarch64__) 650 g_cpuFamily = ANDROID_CPU_FAMILY_ARM64; 651#elif defined(__x86_64__) 652 g_cpuFamily = ANDROID_CPU_FAMILY_X86_64; 653#else 654 g_cpuFamily = ANDROID_CPU_FAMILY_UNKNOWN; 655#endif 656} 657 658static void 659android_cpuInit(void) 660{ 661 char* cpuinfo = NULL; 662 int cpuinfo_len; 663 664 android_cpuInitFamily(); 665 666 g_cpuFeatures = 0; 667 g_cpuCount = 1; 668 g_inited = 1; 669 670 cpuinfo_len = get_file_size("/proc/cpuinfo"); 671 if (cpuinfo_len < 0) { 672 D("cpuinfo_len cannot be computed!"); 673 return; 674 } 675 cpuinfo = malloc(cpuinfo_len); 676 if (cpuinfo == NULL) { 677 D("cpuinfo buffer could not be allocated"); 678 return; 679 } 680 cpuinfo_len = read_file("/proc/cpuinfo", cpuinfo, cpuinfo_len); 681 D("cpuinfo_len is (%d):\n%.*s\n", cpuinfo_len, 682 cpuinfo_len >= 0 ? cpuinfo_len : 0, cpuinfo); 683 684 if (cpuinfo_len < 0) /* should not happen */ { 685 free(cpuinfo); 686 return; 687 } 688 689 /* Count the CPU cores, the value may be 0 for single-core CPUs */ 690 g_cpuCount = get_cpu_count(); 691 if (g_cpuCount == 0) { 692 g_cpuCount = 1; 693 } 694 695 D("found cpuCount = %d\n", g_cpuCount); 696 697#ifdef __arm__ 698 { 699 /* Extract architecture from the "CPU Architecture" field. 700 * The list is well-known, unlike the the output of 701 * the 'Processor' field which can vary greatly. 702 * 703 * See the definition of the 'proc_arch' array in 704 * $KERNEL/arch/arm/kernel/setup.c and the 'c_show' function in 705 * same file. 706 */ 707 char* cpuArch = extract_cpuinfo_field(cpuinfo, cpuinfo_len, "CPU architecture"); 708 709 if (cpuArch != NULL) { 710 char* end; 711 long archNumber; 712 int hasARMv7 = 0; 713 714 D("found cpuArch = '%s'\n", cpuArch); 715 716 /* read the initial decimal number, ignore the rest */ 717 archNumber = strtol(cpuArch, &end, 10); 718 719 /* Note that ARMv8 is upwards compatible with ARMv7. */ 720 if (end > cpuArch && archNumber >= 7) { 721 hasARMv7 = 1; 722 } 723 724 /* Unfortunately, it seems that certain ARMv6-based CPUs 725 * report an incorrect architecture number of 7! 726 * 727 * See http://code.google.com/p/android/issues/detail?id=10812 728 * 729 * We try to correct this by looking at the 'elf_format' 730 * field reported by the 'Processor' field, which is of the 731 * form of "(v7l)" for an ARMv7-based CPU, and "(v6l)" for 732 * an ARMv6-one. 733 */ 734 if (hasARMv7) { 735 char* cpuProc = extract_cpuinfo_field(cpuinfo, cpuinfo_len, 736 "Processor"); 737 if (cpuProc != NULL) { 738 D("found cpuProc = '%s'\n", cpuProc); 739 if (has_list_item(cpuProc, "(v6l)")) { 740 D("CPU processor and architecture mismatch!!\n"); 741 hasARMv7 = 0; 742 } 743 free(cpuProc); 744 } 745 } 746 747 if (hasARMv7) { 748 g_cpuFeatures |= ANDROID_CPU_ARM_FEATURE_ARMv7; 749 } 750 751 /* The LDREX / STREX instructions are available from ARMv6 */ 752 if (archNumber >= 6) { 753 g_cpuFeatures |= ANDROID_CPU_ARM_FEATURE_LDREX_STREX; 754 } 755 756 free(cpuArch); 757 } 758 759 /* Extract the list of CPU features from ELF hwcaps */ 760 uint32_t hwcaps = 0; 761 hwcaps = get_elf_hwcap_from_getauxval(AT_HWCAP); 762 if (!hwcaps) { 763 D("Parsing /proc/self/auxv to extract ELF hwcaps!\n"); 764 hwcaps = get_elf_hwcap_from_proc_self_auxv(); 765 } 766 if (!hwcaps) { 767 // Parsing /proc/self/auxv will fail from regular application 768 // processes on some Android platform versions, when this happens 769 // parse proc/cpuinfo instead. 770 D("Parsing /proc/cpuinfo to extract ELF hwcaps!\n"); 771 hwcaps = get_elf_hwcap_from_proc_cpuinfo(cpuinfo, cpuinfo_len); 772 } 773 774 if (hwcaps != 0) { 775 int has_vfp = (hwcaps & HWCAP_VFP); 776 int has_vfpv3 = (hwcaps & HWCAP_VFPv3); 777 int has_vfpv3d16 = (hwcaps & HWCAP_VFPv3D16); 778 int has_vfpv4 = (hwcaps & HWCAP_VFPv4); 779 int has_neon = (hwcaps & HWCAP_NEON); 780 int has_idiva = (hwcaps & HWCAP_IDIVA); 781 int has_idivt = (hwcaps & HWCAP_IDIVT); 782 int has_iwmmxt = (hwcaps & HWCAP_IWMMXT); 783 784 // The kernel does a poor job at ensuring consistency when 785 // describing CPU features. So lots of guessing is needed. 786 787 // 'vfpv4' implies VFPv3|VFP_FMA|FP16 788 if (has_vfpv4) 789 g_cpuFeatures |= ANDROID_CPU_ARM_FEATURE_VFPv3 | 790 ANDROID_CPU_ARM_FEATURE_VFP_FP16 | 791 ANDROID_CPU_ARM_FEATURE_VFP_FMA; 792 793 // 'vfpv3' or 'vfpv3d16' imply VFPv3. Note that unlike GCC, 794 // a value of 'vfpv3' doesn't necessarily mean that the D32 795 // feature is present, so be conservative. All CPUs in the 796 // field that support D32 also support NEON, so this should 797 // not be a problem in practice. 798 if (has_vfpv3 || has_vfpv3d16) 799 g_cpuFeatures |= ANDROID_CPU_ARM_FEATURE_VFPv3; 800 801 // 'vfp' is super ambiguous. Depending on the kernel, it can 802 // either mean VFPv2 or VFPv3. Make it depend on ARMv7. 803 if (has_vfp) { 804 if (g_cpuFeatures & ANDROID_CPU_ARM_FEATURE_ARMv7) 805 g_cpuFeatures |= ANDROID_CPU_ARM_FEATURE_VFPv3; 806 else 807 g_cpuFeatures |= ANDROID_CPU_ARM_FEATURE_VFPv2; 808 } 809 810 // Neon implies VFPv3|D32, and if vfpv4 is detected, NEON_FMA 811 if (has_neon) { 812 g_cpuFeatures |= ANDROID_CPU_ARM_FEATURE_VFPv3 | 813 ANDROID_CPU_ARM_FEATURE_NEON | 814 ANDROID_CPU_ARM_FEATURE_VFP_D32; 815 if (has_vfpv4) 816 g_cpuFeatures |= ANDROID_CPU_ARM_FEATURE_NEON_FMA; 817 } 818 819 // VFPv3 implies VFPv2 and ARMv7 820 if (g_cpuFeatures & ANDROID_CPU_ARM_FEATURE_VFPv3) 821 g_cpuFeatures |= ANDROID_CPU_ARM_FEATURE_VFPv2 | 822 ANDROID_CPU_ARM_FEATURE_ARMv7; 823 824 if (has_idiva) 825 g_cpuFeatures |= ANDROID_CPU_ARM_FEATURE_IDIV_ARM; 826 if (has_idivt) 827 g_cpuFeatures |= ANDROID_CPU_ARM_FEATURE_IDIV_THUMB2; 828 829 if (has_iwmmxt) 830 g_cpuFeatures |= ANDROID_CPU_ARM_FEATURE_iWMMXt; 831 } 832 833 /* Extract the list of CPU features from ELF hwcaps2 */ 834 uint32_t hwcaps2 = 0; 835 hwcaps2 = get_elf_hwcap_from_getauxval(AT_HWCAP2); 836 if (hwcaps2 != 0) { 837 int has_aes = (hwcaps2 & HWCAP2_AES); 838 int has_pmull = (hwcaps2 & HWCAP2_PMULL); 839 int has_sha1 = (hwcaps2 & HWCAP2_SHA1); 840 int has_sha2 = (hwcaps2 & HWCAP2_SHA2); 841 int has_crc32 = (hwcaps2 & HWCAP2_CRC32); 842 843 if (has_aes) 844 g_cpuFeatures |= ANDROID_CPU_ARM_FEATURE_AES; 845 if (has_pmull) 846 g_cpuFeatures |= ANDROID_CPU_ARM_FEATURE_PMULL; 847 if (has_sha1) 848 g_cpuFeatures |= ANDROID_CPU_ARM_FEATURE_SHA1; 849 if (has_sha2) 850 g_cpuFeatures |= ANDROID_CPU_ARM_FEATURE_SHA2; 851 if (has_crc32) 852 g_cpuFeatures |= ANDROID_CPU_ARM_FEATURE_CRC32; 853 } 854 /* Extract the cpuid value from various fields */ 855 // The CPUID value is broken up in several entries in /proc/cpuinfo. 856 // This table is used to rebuild it from the entries. 857 static const struct CpuIdEntry { 858 const char* field; 859 char format; 860 char bit_lshift; 861 char bit_length; 862 } cpu_id_entries[] = { 863 { "CPU implementer", 'x', 24, 8 }, 864 { "CPU variant", 'x', 20, 4 }, 865 { "CPU part", 'x', 4, 12 }, 866 { "CPU revision", 'd', 0, 4 }, 867 }; 868 size_t i; 869 D("Parsing /proc/cpuinfo to recover CPUID\n"); 870 for (i = 0; 871 i < sizeof(cpu_id_entries)/sizeof(cpu_id_entries[0]); 872 ++i) { 873 const struct CpuIdEntry* entry = &cpu_id_entries[i]; 874 char* value = extract_cpuinfo_field(cpuinfo, 875 cpuinfo_len, 876 entry->field); 877 if (value == NULL) 878 continue; 879 880 D("field=%s value='%s'\n", entry->field, value); 881 char* value_end = value + strlen(value); 882 int val = 0; 883 const char* start = value; 884 const char* p; 885 if (value[0] == '0' && (value[1] == 'x' || value[1] == 'X')) { 886 start += 2; 887 p = parse_hexadecimal(start, value_end, &val); 888 } else if (entry->format == 'x') 889 p = parse_hexadecimal(value, value_end, &val); 890 else 891 p = parse_decimal(value, value_end, &val); 892 893 if (p > (const char*)start) { 894 val &= ((1 << entry->bit_length)-1); 895 val <<= entry->bit_lshift; 896 g_cpuIdArm |= (uint32_t) val; 897 } 898 899 free(value); 900 } 901 902 // Handle kernel configuration bugs that prevent the correct 903 // reporting of CPU features. 904 static const struct CpuFix { 905 uint32_t cpuid; 906 uint64_t or_flags; 907 } cpu_fixes[] = { 908 /* The Nexus 4 (Qualcomm Krait) kernel configuration 909 * forgets to report IDIV support. */ 910 { 0x510006f2, ANDROID_CPU_ARM_FEATURE_IDIV_ARM | 911 ANDROID_CPU_ARM_FEATURE_IDIV_THUMB2 }, 912 { 0x510006f3, ANDROID_CPU_ARM_FEATURE_IDIV_ARM | 913 ANDROID_CPU_ARM_FEATURE_IDIV_THUMB2 }, 914 }; 915 size_t n; 916 for (n = 0; n < sizeof(cpu_fixes)/sizeof(cpu_fixes[0]); ++n) { 917 const struct CpuFix* entry = &cpu_fixes[n]; 918 919 if (g_cpuIdArm == entry->cpuid) 920 g_cpuFeatures |= entry->or_flags; 921 } 922 923 // Special case: The emulator-specific Android 4.2 kernel fails 924 // to report support for the 32-bit ARM IDIV instruction. 925 // Technically, this is a feature of the virtual CPU implemented 926 // by the emulator. Note that it could also support Thumb IDIV 927 // in the future, and this will have to be slightly updated. 928 char* hardware = extract_cpuinfo_field(cpuinfo, 929 cpuinfo_len, 930 "Hardware"); 931 if (hardware) { 932 if (!strcmp(hardware, "Goldfish") && 933 g_cpuIdArm == 0x4100c080 && 934 (g_cpuFamily & ANDROID_CPU_ARM_FEATURE_ARMv7) != 0) { 935 g_cpuFeatures |= ANDROID_CPU_ARM_FEATURE_IDIV_ARM; 936 } 937 free(hardware); 938 } 939 } 940#endif /* __arm__ */ 941#ifdef __aarch64__ 942 { 943 /* Extract the list of CPU features from ELF hwcaps */ 944 uint32_t hwcaps = 0; 945 hwcaps = get_elf_hwcap_from_getauxval(AT_HWCAP); 946 if (hwcaps != 0) { 947 int has_fp = (hwcaps & HWCAP_FP); 948 int has_asimd = (hwcaps & HWCAP_ASIMD); 949 int has_aes = (hwcaps & HWCAP_AES); 950 int has_pmull = (hwcaps & HWCAP_PMULL); 951 int has_sha1 = (hwcaps & HWCAP_SHA1); 952 int has_sha2 = (hwcaps & HWCAP_SHA2); 953 int has_crc32 = (hwcaps & HWCAP_CRC32); 954 955 if(has_fp == 0) { 956 D("ERROR: Floating-point unit missing, but is required by Android on AArch64 CPUs\n"); 957 } 958 if(has_asimd == 0) { 959 D("ERROR: ASIMD unit missing, but is required by Android on AArch64 CPUs\n"); 960 } 961 962 if (has_fp) 963 g_cpuFeatures |= ANDROID_CPU_ARM64_FEATURE_FP; 964 if (has_asimd) 965 g_cpuFeatures |= ANDROID_CPU_ARM64_FEATURE_ASIMD; 966 if (has_aes) 967 g_cpuFeatures |= ANDROID_CPU_ARM64_FEATURE_AES; 968 if (has_pmull) 969 g_cpuFeatures |= ANDROID_CPU_ARM64_FEATURE_PMULL; 970 if (has_sha1) 971 g_cpuFeatures |= ANDROID_CPU_ARM64_FEATURE_SHA1; 972 if (has_sha2) 973 g_cpuFeatures |= ANDROID_CPU_ARM64_FEATURE_SHA2; 974 if (has_crc32) 975 g_cpuFeatures |= ANDROID_CPU_ARM64_FEATURE_CRC32; 976 } 977 } 978#endif /* __aarch64__ */ 979 980#ifdef __i386__ 981 int regs[4]; 982 983/* According to http://en.wikipedia.org/wiki/CPUID */ 984#define VENDOR_INTEL_b 0x756e6547 985#define VENDOR_INTEL_c 0x6c65746e 986#define VENDOR_INTEL_d 0x49656e69 987 988 x86_cpuid(0, regs); 989 int vendorIsIntel = (regs[1] == VENDOR_INTEL_b && 990 regs[2] == VENDOR_INTEL_c && 991 regs[3] == VENDOR_INTEL_d); 992 993 x86_cpuid(1, regs); 994 if ((regs[2] & (1 << 9)) != 0) { 995 g_cpuFeatures |= ANDROID_CPU_X86_FEATURE_SSSE3; 996 } 997 if ((regs[2] & (1 << 23)) != 0) { 998 g_cpuFeatures |= ANDROID_CPU_X86_FEATURE_POPCNT; 999 } 1000 if (vendorIsIntel && (regs[2] & (1 << 22)) != 0) { 1001 g_cpuFeatures |= ANDROID_CPU_X86_FEATURE_MOVBE; 1002 } 1003#endif 1004#if defined( __mips__) 1005 { /* MIPS and MIPS64 */ 1006 /* Extract the list of CPU features from ELF hwcaps */ 1007 uint32_t hwcaps = 0; 1008 hwcaps = get_elf_hwcap_from_getauxval(AT_HWCAP); 1009 if (hwcaps != 0) { 1010 int has_r6 = (hwcaps & HWCAP_MIPS_R6); 1011 int has_msa = (hwcaps & HWCAP_MIPS_MSA); 1012 if (has_r6) 1013 g_cpuFeatures |= ANDROID_CPU_MIPS_FEATURE_R6; 1014 if (has_msa) 1015 g_cpuFeatures |= ANDROID_CPU_MIPS_FEATURE_MSA; 1016 } 1017 } 1018#endif /* __mips__ */ 1019 1020 free(cpuinfo); 1021} 1022 1023 1024AndroidCpuFamily 1025android_getCpuFamily(void) 1026{ 1027 pthread_once(&g_once, android_cpuInit); 1028 return g_cpuFamily; 1029} 1030 1031 1032uint64_t 1033android_getCpuFeatures(void) 1034{ 1035 pthread_once(&g_once, android_cpuInit); 1036 return g_cpuFeatures; 1037} 1038 1039 1040int 1041android_getCpuCount(void) 1042{ 1043 pthread_once(&g_once, android_cpuInit); 1044 return g_cpuCount; 1045} 1046 1047static void 1048android_cpuInitDummy(void) 1049{ 1050 g_inited = 1; 1051} 1052 1053int 1054android_setCpu(int cpu_count, uint64_t cpu_features) 1055{ 1056 /* Fail if the library was already initialized. */ 1057 if (g_inited) 1058 return 0; 1059 1060 android_cpuInitFamily(); 1061 g_cpuCount = (cpu_count <= 0 ? 1 : cpu_count); 1062 g_cpuFeatures = cpu_features; 1063 pthread_once(&g_once, android_cpuInitDummy); 1064 1065 return 1; 1066} 1067 1068#ifdef __arm__ 1069uint32_t 1070android_getCpuIdArm(void) 1071{ 1072 pthread_once(&g_once, android_cpuInit); 1073 return g_cpuIdArm; 1074} 1075 1076int 1077android_setCpuArm(int cpu_count, uint64_t cpu_features, uint32_t cpu_id) 1078{ 1079 if (!android_setCpu(cpu_count, cpu_features)) 1080 return 0; 1081 1082 g_cpuIdArm = cpu_id; 1083 return 1; 1084} 1085#endif /* __arm__ */ 1086 1087/* 1088 * Technical note: Making sense of ARM's FPU architecture versions. 1089 * 1090 * FPA was ARM's first attempt at an FPU architecture. There is no Android 1091 * device that actually uses it since this technology was already obsolete 1092 * when the project started. If you see references to FPA instructions 1093 * somewhere, you can be sure that this doesn't apply to Android at all. 1094 * 1095 * FPA was followed by "VFP", soon renamed "VFPv1" due to the emergence of 1096 * new versions / additions to it. ARM considers this obsolete right now, 1097 * and no known Android device implements it either. 1098 * 1099 * VFPv2 added a few instructions to VFPv1, and is an *optional* extension 1100 * supported by some ARMv5TE, ARMv6 and ARMv6T2 CPUs. Note that a device 1101 * supporting the 'armeabi' ABI doesn't necessarily support these. 1102 * 1103 * VFPv3-D16 adds a few instructions on top of VFPv2 and is typically used 1104 * on ARMv7-A CPUs which implement a FPU. Note that it is also mandated 1105 * by the Android 'armeabi-v7a' ABI. The -D16 suffix in its name means 1106 * that it provides 16 double-precision FPU registers (d0-d15) and 32 1107 * single-precision ones (s0-s31) which happen to be mapped to the same 1108 * register banks. 1109 * 1110 * VFPv3-D32 is the name of an extension to VFPv3-D16 that provides 16 1111 * additional double precision registers (d16-d31). Note that there are 1112 * still only 32 single precision registers. 1113 * 1114 * VFPv3xD is a *subset* of VFPv3-D16 that only provides single-precision 1115 * registers. It is only used on ARMv7-M (i.e. on micro-controllers) which 1116 * are not supported by Android. Note that it is not compatible with VFPv2. 1117 * 1118 * NOTE: The term 'VFPv3' usually designate either VFPv3-D16 or VFPv3-D32 1119 * depending on context. For example GCC uses it for VFPv3-D32, but 1120 * the Linux kernel code uses it for VFPv3-D16 (especially in 1121 * /proc/cpuinfo). Always try to use the full designation when 1122 * possible. 1123 * 1124 * NEON, a.k.a. "ARM Advanced SIMD" is an extension that provides 1125 * instructions to perform parallel computations on vectors of 8, 16, 1126 * 32, 64 and 128 bit quantities. NEON requires VFPv32-D32 since all 1127 * NEON registers are also mapped to the same register banks. 1128 * 1129 * VFPv4-D16, adds a few instructions on top of VFPv3-D16 in order to 1130 * perform fused multiply-accumulate on VFP registers, as well as 1131 * half-precision (16-bit) conversion operations. 1132 * 1133 * VFPv4-D32 is VFPv4-D16 with 32, instead of 16, FPU double precision 1134 * registers. 1135 * 1136 * VPFv4-NEON is VFPv4-D32 with NEON instructions. It also adds fused 1137 * multiply-accumulate instructions that work on the NEON registers. 1138 * 1139 * NOTE: Similarly, "VFPv4" might either reference VFPv4-D16 or VFPv4-D32 1140 * depending on context. 1141 * 1142 * The following information was determined by scanning the binutils-2.22 1143 * sources: 1144 * 1145 * Basic VFP instruction subsets: 1146 * 1147 * #define FPU_VFP_EXT_V1xD 0x08000000 // Base VFP instruction set. 1148 * #define FPU_VFP_EXT_V1 0x04000000 // Double-precision insns. 1149 * #define FPU_VFP_EXT_V2 0x02000000 // ARM10E VFPr1. 1150 * #define FPU_VFP_EXT_V3xD 0x01000000 // VFPv3 single-precision. 1151 * #define FPU_VFP_EXT_V3 0x00800000 // VFPv3 double-precision. 1152 * #define FPU_NEON_EXT_V1 0x00400000 // Neon (SIMD) insns. 1153 * #define FPU_VFP_EXT_D32 0x00200000 // Registers D16-D31. 1154 * #define FPU_VFP_EXT_FP16 0x00100000 // Half-precision extensions. 1155 * #define FPU_NEON_EXT_FMA 0x00080000 // Neon fused multiply-add 1156 * #define FPU_VFP_EXT_FMA 0x00040000 // VFP fused multiply-add 1157 * 1158 * FPU types (excluding NEON) 1159 * 1160 * FPU_VFP_V1xD (EXT_V1xD) 1161 * | 1162 * +--------------------------+ 1163 * | | 1164 * FPU_VFP_V1 (+EXT_V1) FPU_VFP_V3xD (+EXT_V2+EXT_V3xD) 1165 * | | 1166 * | | 1167 * FPU_VFP_V2 (+EXT_V2) FPU_VFP_V4_SP_D16 (+EXT_FP16+EXT_FMA) 1168 * | 1169 * FPU_VFP_V3D16 (+EXT_Vx3D+EXT_V3) 1170 * | 1171 * +--------------------------+ 1172 * | | 1173 * FPU_VFP_V3 (+EXT_D32) FPU_VFP_V4D16 (+EXT_FP16+EXT_FMA) 1174 * | | 1175 * | FPU_VFP_V4 (+EXT_D32) 1176 * | 1177 * FPU_VFP_HARD (+EXT_FMA+NEON_EXT_FMA) 1178 * 1179 * VFP architectures: 1180 * 1181 * ARCH_VFP_V1xD (EXT_V1xD) 1182 * | 1183 * +------------------+ 1184 * | | 1185 * | ARCH_VFP_V3xD (+EXT_V2+EXT_V3xD) 1186 * | | 1187 * | ARCH_VFP_V3xD_FP16 (+EXT_FP16) 1188 * | | 1189 * | ARCH_VFP_V4_SP_D16 (+EXT_FMA) 1190 * | 1191 * ARCH_VFP_V1 (+EXT_V1) 1192 * | 1193 * ARCH_VFP_V2 (+EXT_V2) 1194 * | 1195 * ARCH_VFP_V3D16 (+EXT_V3xD+EXT_V3) 1196 * | 1197 * +-------------------+ 1198 * | | 1199 * | ARCH_VFP_V3D16_FP16 (+EXT_FP16) 1200 * | 1201 * +-------------------+ 1202 * | | 1203 * | ARCH_VFP_V4_D16 (+EXT_FP16+EXT_FMA) 1204 * | | 1205 * | ARCH_VFP_V4 (+EXT_D32) 1206 * | | 1207 * | ARCH_NEON_VFP_V4 (+EXT_NEON+EXT_NEON_FMA) 1208 * | 1209 * ARCH_VFP_V3 (+EXT_D32) 1210 * | 1211 * +-------------------+ 1212 * | | 1213 * | ARCH_VFP_V3_FP16 (+EXT_FP16) 1214 * | 1215 * ARCH_VFP_V3_PLUS_NEON_V1 (+EXT_NEON) 1216 * | 1217 * ARCH_NEON_FP16 (+EXT_FP16) 1218 * 1219 * -fpu=<name> values and their correspondance with FPU architectures above: 1220 * 1221 * {"vfp", FPU_ARCH_VFP_V2}, 1222 * {"vfp9", FPU_ARCH_VFP_V2}, 1223 * {"vfp3", FPU_ARCH_VFP_V3}, // For backwards compatbility. 1224 * {"vfp10", FPU_ARCH_VFP_V2}, 1225 * {"vfp10-r0", FPU_ARCH_VFP_V1}, 1226 * {"vfpxd", FPU_ARCH_VFP_V1xD}, 1227 * {"vfpv2", FPU_ARCH_VFP_V2}, 1228 * {"vfpv3", FPU_ARCH_VFP_V3}, 1229 * {"vfpv3-fp16", FPU_ARCH_VFP_V3_FP16}, 1230 * {"vfpv3-d16", FPU_ARCH_VFP_V3D16}, 1231 * {"vfpv3-d16-fp16", FPU_ARCH_VFP_V3D16_FP16}, 1232 * {"vfpv3xd", FPU_ARCH_VFP_V3xD}, 1233 * {"vfpv3xd-fp16", FPU_ARCH_VFP_V3xD_FP16}, 1234 * {"neon", FPU_ARCH_VFP_V3_PLUS_NEON_V1}, 1235 * {"neon-fp16", FPU_ARCH_NEON_FP16}, 1236 * {"vfpv4", FPU_ARCH_VFP_V4}, 1237 * {"vfpv4-d16", FPU_ARCH_VFP_V4D16}, 1238 * {"fpv4-sp-d16", FPU_ARCH_VFP_V4_SP_D16}, 1239 * {"neon-vfpv4", FPU_ARCH_NEON_VFP_V4}, 1240 * 1241 * 1242 * Simplified diagram that only includes FPUs supported by Android: 1243 * Only ARCH_VFP_V3D16 is actually mandated by the armeabi-v7a ABI, 1244 * all others are optional and must be probed at runtime. 1245 * 1246 * ARCH_VFP_V3D16 (EXT_V1xD+EXT_V1+EXT_V2+EXT_V3xD+EXT_V3) 1247 * | 1248 * +-------------------+ 1249 * | | 1250 * | ARCH_VFP_V3D16_FP16 (+EXT_FP16) 1251 * | 1252 * +-------------------+ 1253 * | | 1254 * | ARCH_VFP_V4_D16 (+EXT_FP16+EXT_FMA) 1255 * | | 1256 * | ARCH_VFP_V4 (+EXT_D32) 1257 * | | 1258 * | ARCH_NEON_VFP_V4 (+EXT_NEON+EXT_NEON_FMA) 1259 * | 1260 * ARCH_VFP_V3 (+EXT_D32) 1261 * | 1262 * +-------------------+ 1263 * | | 1264 * | ARCH_VFP_V3_FP16 (+EXT_FP16) 1265 * | 1266 * ARCH_VFP_V3_PLUS_NEON_V1 (+EXT_NEON) 1267 * | 1268 * ARCH_NEON_FP16 (+EXT_FP16) 1269 * 1270 */ 1271 1272#endif // defined(__le32__) || defined(__le64__) 1273