Lines Matching refs:dst

354   void movq(CpuRegister dst, const Immediate& src);
355 void movl(CpuRegister dst, const Immediate& src);
356 void movq(CpuRegister dst, CpuRegister src);
357 void movl(CpuRegister dst, CpuRegister src);
359 void movntl(const Address& dst, CpuRegister src);
360 void movntq(const Address& dst, CpuRegister src);
362 void movq(CpuRegister dst, const Address& src);
363 void movl(CpuRegister dst, const Address& src);
364 void movq(const Address& dst, CpuRegister src);
365 void movq(const Address& dst, const Immediate& imm);
366 void movl(const Address& dst, CpuRegister src);
367 void movl(const Address& dst, const Immediate& imm);
369 void cmov(Condition c, CpuRegister dst, CpuRegister src); // This is the 64b version.
370 void cmov(Condition c, CpuRegister dst, CpuRegister src, bool is64bit);
371 void cmov(Condition c, CpuRegister dst, const Address& src, bool is64bit);
373 void movzxb(CpuRegister dst, CpuRegister src);
374 void movzxb(CpuRegister dst, const Address& src);
375 void movsxb(CpuRegister dst, CpuRegister src);
376 void movsxb(CpuRegister dst, const Address& src);
377 void movb(CpuRegister dst, const Address& src);
378 void movb(const Address& dst, CpuRegister src);
379 void movb(const Address& dst, const Immediate& imm);
381 void movzxw(CpuRegister dst, CpuRegister src);
382 void movzxw(CpuRegister dst, const Address& src);
383 void movsxw(CpuRegister dst, CpuRegister src);
384 void movsxw(CpuRegister dst, const Address& src);
385 void movw(CpuRegister dst, const Address& src);
386 void movw(const Address& dst, CpuRegister src);
387 void movw(const Address& dst, const Immediate& imm);
389 void leaq(CpuRegister dst, const Address& src);
390 void leal(CpuRegister dst, const Address& src);
392 void movaps(XmmRegister dst, XmmRegister src);
394 void movss(XmmRegister dst, const Address& src);
395 void movss(const Address& dst, XmmRegister src);
396 void movss(XmmRegister dst, XmmRegister src);
398 void movsxd(CpuRegister dst, CpuRegister src);
399 void movsxd(CpuRegister dst, const Address& src);
401 void movd(XmmRegister dst, CpuRegister src); // Note: this is the r64 version, formally movq.
402 void movd(CpuRegister dst, XmmRegister src); // Note: this is the r64 version, formally movq.
403 void movd(XmmRegister dst, CpuRegister src, bool is64bit);
404 void movd(CpuRegister dst, XmmRegister src, bool is64bit);
406 void addss(XmmRegister dst, XmmRegister src);
407 void addss(XmmRegister dst, const Address& src);
408 void subss(XmmRegister dst, XmmRegister src);
409 void subss(XmmRegister dst, const Address& src);
410 void mulss(XmmRegister dst, XmmRegister src);
411 void mulss(XmmRegister dst, const Address& src);
412 void divss(XmmRegister dst, XmmRegister src);
413 void divss(XmmRegister dst, const Address& src);
415 void movsd(XmmRegister dst, const Address& src);
416 void movsd(const Address& dst, XmmRegister src);
417 void movsd(XmmRegister dst, XmmRegister src);
419 void addsd(XmmRegister dst, XmmRegister src);
420 void addsd(XmmRegister dst, const Address& src);
421 void subsd(XmmRegister dst, XmmRegister src);
422 void subsd(XmmRegister dst, const Address& src);
423 void mulsd(XmmRegister dst, XmmRegister src);
424 void mulsd(XmmRegister dst, const Address& src);
425 void divsd(XmmRegister dst, XmmRegister src);
426 void divsd(XmmRegister dst, const Address& src);
428 void cvtsi2ss(XmmRegister dst, CpuRegister src); // Note: this is the r/m32 version.
429 void cvtsi2ss(XmmRegister dst, CpuRegister src, bool is64bit);
430 void cvtsi2ss(XmmRegister dst, const Address& src, bool is64bit);
431 void cvtsi2sd(XmmRegister dst, CpuRegister src); // Note: this is the r/m32 version.
432 void cvtsi2sd(XmmRegister dst, CpuRegister src, bool is64bit);
433 void cvtsi2sd(XmmRegister dst, const Address& src, bool is64bit);
435 void cvtss2si(CpuRegister dst, XmmRegister src); // Note: this is the r32 version.
436 void cvtss2sd(XmmRegister dst, XmmRegister src);
437 void cvtss2sd(XmmRegister dst, const Address& src);
439 void cvtsd2si(CpuRegister dst, XmmRegister src); // Note: this is the r32 version.
440 void cvtsd2ss(XmmRegister dst, XmmRegister src);
441 void cvtsd2ss(XmmRegister dst, const Address& src);
443 void cvttss2si(CpuRegister dst, XmmRegister src); // Note: this is the r32 version.
444 void cvttss2si(CpuRegister dst, XmmRegister src, bool is64bit);
445 void cvttsd2si(CpuRegister dst, XmmRegister src); // Note: this is the r32 version.
446 void cvttsd2si(CpuRegister dst, XmmRegister src, bool is64bit);
448 void cvtdq2pd(XmmRegister dst, XmmRegister src);
459 void roundsd(XmmRegister dst, XmmRegister src, const Immediate& imm);
460 void roundss(XmmRegister dst, XmmRegister src, const Immediate& imm);
462 void sqrtsd(XmmRegister dst, XmmRegister src);
463 void sqrtss(XmmRegister dst, XmmRegister src);
465 void xorpd(XmmRegister dst, const Address& src);
466 void xorpd(XmmRegister dst, XmmRegister src);
467 void xorps(XmmRegister dst, const Address& src);
468 void xorps(XmmRegister dst, XmmRegister src);
470 void andpd(XmmRegister dst, const Address& src);
471 void andpd(XmmRegister dst, XmmRegister src);
472 void andps(XmmRegister dst, XmmRegister src);
474 void orpd(XmmRegister dst, XmmRegister src);
475 void orps(XmmRegister dst, XmmRegister src);
478 void fstps(const Address& dst);
479 void fsts(const Address& dst);
482 void fstpl(const Address& dst);
483 void fstl(const Address& dst);
489 void fnstcw(const Address& dst);
492 void fistpl(const Address& dst);
493 void fistps(const Address& dst);
505 void xchgl(CpuRegister dst, CpuRegister src);
506 void xchgq(CpuRegister dst, CpuRegister src);
529 void andl(CpuRegister dst, const Immediate& imm);
530 void andl(CpuRegister dst, CpuRegister src);
532 void andq(CpuRegister dst, const Immediate& imm);
533 void andq(CpuRegister dst, CpuRegister src);
536 void orl(CpuRegister dst, const Immediate& imm);
537 void orl(CpuRegister dst, CpuRegister src);
539 void orq(CpuRegister dst, CpuRegister src);
540 void orq(CpuRegister dst, const Immediate& imm);
543 void xorl(CpuRegister dst, CpuRegister src);
544 void xorl(CpuRegister dst, const Immediate& imm);
546 void xorq(CpuRegister dst, const Immediate& imm);
547 void xorq(CpuRegister dst, CpuRegister src);
550 void addl(CpuRegister dst, CpuRegister src);
557 void addq(CpuRegister dst, CpuRegister src);
558 void addq(CpuRegister dst, const Address& address);
560 void subl(CpuRegister dst, CpuRegister src);
565 void subq(CpuRegister dst, CpuRegister src);
566 void subq(CpuRegister dst, const Address& address);
574 void imull(CpuRegister dst, CpuRegister src);
576 void imull(CpuRegister dst, CpuRegister src, const Immediate& imm);
580 void imulq(CpuRegister dst, CpuRegister src);
583 void imulq(CpuRegister dst, CpuRegister reg, const Immediate& imm);
638 void setcc(Condition condition, CpuRegister dst);
640 void bswapl(CpuRegister dst);
641 void bswapq(CpuRegister dst);
643 void bsfl(CpuRegister dst, CpuRegister src);
644 void bsfl(CpuRegister dst, const Address& src);
645 void bsfq(CpuRegister dst, CpuRegister src);
646 void bsfq(CpuRegister dst, const Address& src);
648 void bsrl(CpuRegister dst, CpuRegister src);
649 void bsrl(CpuRegister dst, const Address& src);
650 void bsrq(CpuRegister dst, CpuRegister src);
651 void bsrq(CpuRegister dst, const Address& src);
653 void popcntl(CpuRegister dst, CpuRegister src);
654 void popcntl(CpuRegister dst, const Address& src);
655 void popcntq(CpuRegister dst, CpuRegister src);
656 void popcntq(CpuRegister dst, const Address& src);
680 void LoadDoubleConstant(XmmRegister dst, double value);
801 // src holds a handle scope entry (Object**) load this into dst
802 virtual void LoadReferenceFromHandleScope(ManagedRegister dst,
891 void EmitOptionalRex32(CpuRegister dst, CpuRegister src);
892 void EmitOptionalRex32(XmmRegister dst, XmmRegister src);
893 void EmitOptionalRex32(CpuRegister dst, XmmRegister src);
894 void EmitOptionalRex32(XmmRegister dst, CpuRegister src);
896 void EmitOptionalRex32(CpuRegister dst, const Operand& operand);
897 void EmitOptionalRex32(XmmRegister dst, const Operand& operand);
903 void EmitRex64(CpuRegister dst, CpuRegister src);
904 void EmitRex64(CpuRegister dst, const Operand& operand);
905 void EmitRex64(XmmRegister dst, const Operand& operand);
906 void EmitRex64(XmmRegister dst, CpuRegister src);
907 void EmitRex64(CpuRegister dst, XmmRegister src);
910 void EmitOptionalByteRegNormalizingRex32(CpuRegister dst, CpuRegister src);
911 void EmitOptionalByteRegNormalizingRex32(CpuRegister dst, const Operand& operand);