71 X86TargetLowering::X86TargetLowering(const X86TargetMachine &TM,
1849 bool X86TargetLowering::useLoadStackGuardNode() const {
1854 X86TargetLowering::getPreferredVectorAction(EVT VT) const {
1863 EVT X86TargetLowering::getSetCCResultType(const DataLayout &DL, LLVMContext &,
1939 unsigned X86TargetLowering::getByValTypeAlignment(Type *Ty,
1967 X86TargetLowering::getOptimalMemOpType(uint64_t Size,
2006 bool X86TargetLowering::isSafeMemOpType(MVT VT) const {
2015 X86TargetLowering::allowsMisalignedMemoryAccesses(EVT VT,
2041 unsigned X86TargetLowering::getJumpTableEncoding() const {
2052 bool X86TargetLowering::useSoftFloat() const {
2057 X86TargetLowering::LowerCustomJumpTableEntry(const MachineJumpTableInfo *MJTI,
2069 SDValue X86TargetLowering::getPICJumpTableRelocBase(SDValue Table,
2081 const MCExpr *X86TargetLowering::
2093 X86TargetLowering::findRepresentativeClass(const TargetRegisterInfo *TRI,
2117 bool X86TargetLowering::getStackCookieLocation(unsigned &AddressSpace,
2137 Value *X86TargetLowering::getSafeStackPointerLocation(IRBuilder<> &IRB) const {
2163 bool X86TargetLowering::isNoopAddrSpaceCast(unsigned SrcAS,
2176 bool X86TargetLowering::CanLowerReturn(
2184 const MCPhysReg *X86TargetLowering::getScratchRegisters(CallingConv::ID) const {
2190 X86TargetLowering::LowerReturn(SDValue Chain,
2320 bool X86TargetLowering::isUsedByReturnOnly(SDNode *N, SDValue &Chain) const {
2360 X86TargetLowering::getTypeForExtArgOrReturn(LLVMContext &Context, EVT VT,
2377 X86TargetLowering::LowerCallResult(SDValue Chain, SDValue InFlag,
2518 bool X86TargetLowering::mayBeEmittedAsTailCall(CallInst *CI) const {
2533 X86TargetLowering::LowerMemArgument(SDValue Chain,
2649 SDValue X86TargetLowering::LowerFormalArguments(
2981 X86TargetLowering::LowerMemOpCallTo(SDValue Chain,
3002 X86TargetLowering::EmitTailCallLoadRetAddr(SelectionDAG &DAG,
3049 X86TargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
3596 X86TargetLowering::GetAlignedArgumentStackSize(unsigned StackSize,
3671 bool X86TargetLowering::IsEligibleForTailCallOptimization(
3879 X86TargetLowering::createFastISel(FunctionLoweringInfo &funcInfo,
3959 SDValue X86TargetLowering::getReturnAddressFrameIndex(SelectionDAG &DAG) const {
4158 bool X86TargetLowering::isFPImmLegal(const APFloat &Imm, EVT VT) const {
4166 bool X86TargetLowering::shouldReduceLoadWidth(SDNode *Load,
4180 bool X86TargetLowering::shouldConvertConstantLoadToIntImm(const APInt &Imm,
4190 bool X86TargetLowering::isExtractSubvectorCheap(EVT ResVT,
4198 bool X86TargetLowering::isCheapToSpeculateCttz() const {
4203 bool X86TargetLowering::isCheapToSpeculateCtlz() const {
5780 X86TargetLowering::LowerBUILD_VECTORvXi1(SDValue Op, SelectionDAG &DAG) const {
6271 X86TargetLowering::LowerBUILD_VECTOR(SDValue Op, SelectionDAG &DAG) const {
11443 SDValue X86TargetLowering::LowerVSELECT(SDValue Op, SelectionDAG &DAG) const {
11548 X86TargetLowering::ExtractBitFromMaskVector(SDValue Op, SelectionDAG &DAG) const {
11583 X86TargetLowering::LowerEXTRACT_VECTOR_ELT(SDValue Op,
11696 X86TargetLowering::InsertBitToMaskVector(SDValue Op, SelectionDAG &DAG) const {
11724 SDValue X86TargetLowering::LowerINSERT_VECTOR_ELT(SDValue Op,
11936         const X86TargetLowering *TLI = Subtarget->getTargetLowering();
11967 X86TargetLowering::LowerConstantPool(SDValue Op, SelectionDAG &DAG) const {
11999 SDValue X86TargetLowering::LowerJumpTable(SDValue Op, SelectionDAG &DAG) const {
12031 X86TargetLowering::LowerExternalSymbol(SDValue Op, SelectionDAG &DAG) const {
12078 X86TargetLowering::LowerBlockAddress(SDValue Op, SelectionDAG &DAG) const {
12105 X86TargetLowering::LowerGlobalAddress(const GlobalValue *GV, SDLoc dl,
12152 X86TargetLowering::LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const {
12307 X86TargetLowering::LowerGlobalTLSAddress(SDValue Op, SelectionDAG &DAG) const {
12511 SDValue X86TargetLowering::LowerSINT_TO_FP(SDValue Op,
12556 SDValue X86TargetLowering::BuildFILD(SDValue Op, EVT SrcVT, SDValue Chain,
12618 SDValue X86TargetLowering::LowerUINT_TO_FP_i64(SDValue Op,
12687 SDValue X86TargetLowering::LowerUINT_TO_FP_i32(SDValue Op,
12847 SDValue X86TargetLowering::lowerUINT_TO_FP_vec(SDValue Op,
12875 SDValue X86TargetLowering::LowerUINT_TO_FP(SDValue Op,
12982 X86TargetLowering::FP_TO_INTHelper(SDValue Op, SelectionDAG &DAG,
13261 SDValue X86TargetLowering::LowerTRUNCATE(SDValue Op, SelectionDAG &DAG) const {
13416 SDValue X86TargetLowering::LowerFP_TO_SINT(SDValue Op,
13437 SDValue X86TargetLowering::LowerFP_TO_UINT(SDValue Op,
13761 SDValue X86TargetLowering::EmitTest(SDValue Op, unsigned X86CC, SDLoc dl,
13995 SDValue X86TargetLowering::EmitCmp(SDValue Op0, SDValue Op1, unsigned X86CC,
14027 SDValue X86TargetLowering::ConvertCmpIfNecessary(SDValue Cmp,
14055 SDValue X86TargetLowering::getRsqrtEstimate(SDValue Op,
14088 SDValue X86TargetLowering::getRecipEstimate(SDValue Op,
14123 unsigned X86TargetLowering::combineRepeatedFPDivisors() const {
14129 SDValue X86TargetLowering::LowerToBT(SDValue And, ISD::CondCode CC,
14683 SDValue X86TargetLowering::LowerSETCC(SDValue Op, SelectionDAG &DAG) const {
14753 SDValue X86TargetLowering::LowerSETCCE(SDValue Op, SelectionDAG &DAG) const {
14806 SDValue X86TargetLowering::LowerSELECT(SDValue Op, SelectionDAG &DAG) const {
15456 SDValue X86TargetLowering::LowerBRCOND(SDValue Op, SelectionDAG &DAG) const {
15734 X86TargetLowering::LowerDYNAMIC_STACKALLOC(SDValue Op,
15826 SDValue X86TargetLowering::LowerVASTART(SDValue Op, SelectionDAG &DAG) const {
15883 SDValue X86TargetLowering::LowerVAARG(SDValue Op, SelectionDAG &DAG) const {
17359 SDValue X86TargetLowering::LowerRETURNADDR(SDValue Op,
17387 SDValue X86TargetLowering::LowerFRAMEADDR(SDValue Op, SelectionDAG &DAG) const {
17428 unsigned X86TargetLowering::getRegisterByName(const char* RegName, EVT VT,
17461 SDValue X86TargetLowering::LowerFRAME_TO_ARGS_OFFSET(SDValue Op,
17467 unsigned X86TargetLowering::getExceptionPointerRegister(
17475 unsigned X86TargetLowering::getExceptionSelectorRegister(
17482 SDValue X86TargetLowering::LowerEH_RETURN(SDValue Op, SelectionDAG &DAG) const {
17509 SDValue X86TargetLowering::lowerEH_SJLJ_SETJMP(SDValue Op,
17517 SDValue X86TargetLowering::lowerEH_SJLJ_LONGJMP(SDValue Op,
17528 SDValue X86TargetLowering::LowerINIT_TRAMPOLINE(SDValue Op,
17680 SDValue X86TargetLowering::LowerFLT_ROUNDS_(SDValue Op,
18132 SDValue X86TargetLowering::LowerWin64_i128OP(SDValue Op, SelectionDAG &DAG) const {
19133 bool X86TargetLowering::needsCmpXchgNb(Type *MemType) const {
19144 bool X86TargetLowering::shouldExpandAtomicStoreInIR(StoreInst *SI) const {
19151 X86TargetLowering::shouldExpandAtomicLoadInIR(LoadInst *LI) const {
19158 X86TargetLowering::shouldExpandAtomicRMWInIR(AtomicRMWInst *AI) const {
19204 X86TargetLowering::lowerIdempotentRMWIntoFencedLoad(AtomicRMWInst *AI) const {
20009 SDValue X86TargetLowering::LowerGC_TRANSITION_START(SDValue Op,
20030 SDValue X86TargetLowering::LowerGC_TRANSITION_END(SDValue Op,
20053 SDValue X86TargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG) const {
20159 void X86TargetLowering::ReplaceNodeResults(SDNode *N,
20408 const char *X86TargetLowering::getTargetNodeName(unsigned Opcode) const {
20648 bool X86TargetLowering::isLegalAddressingMode(const DataLayout &DL,
20701 bool X86TargetLowering::isVectorShiftByScalarCheap(Type *Ty) const {
20719 bool X86TargetLowering::isTruncateFree(Type *Ty1, Type *Ty2) const {
20727 bool X86TargetLowering::allowTruncateForTailCall(Type *Ty1, Type *Ty2) const {
20741 bool X86TargetLowering::isLegalICmpImmediate(int64_t Imm) const {
20745 bool X86TargetLowering::isLegalAddImmediate(int64_t Imm) const {
20750 bool X86TargetLowering::isTruncateFree(EVT VT1, EVT VT2) const {
20758 bool X86TargetLowering::isZExtFree(Type *Ty1, Type *Ty2) const {
20763 bool X86TargetLowering::isZExtFree(EVT VT1, EVT VT2) const {
20768 bool X86TargetLowering::isZExtFree(SDValue Val, EVT VT2) const {
20792 bool X86TargetLowering::isVectorLoadExtDesirable(SDValue) const { return true; }
20795 X86TargetLowering::isFMAFasterThanFMulAndFAdd(EVT VT) const {
20815 bool X86TargetLowering::isNarrowingProfitable(EVT VT1, EVT VT2) const {
20825 X86TargetLowering::isShuffleMaskLegal(const SmallVectorImpl<int> &M,
20844 X86TargetLowering::isVectorClearMaskLegal(const SmallVectorImpl<int> &Mask,
21009 X86TargetLowering::EmitVAARG64WithCustomInserter(MachineInstr *MI,
21262 X86TargetLowering::EmitVAStartSaveXMMRegsWithCustomInserter(
21408 X86TargetLowering::EmitLoweredSelect(MachineInstr *MI,
21685 X86TargetLowering::EmitLoweredAtomicFP(MachineInstr *MI,
21729 X86TargetLowering::EmitLoweredSegAlloca(MachineInstr *MI,
21860 X86TargetLowering::EmitLoweredWinAlloca(MachineInstr *MI,
21872 X86TargetLowering::EmitLoweredCatchRet(MachineInstr *MI,
21904 X86TargetLowering::EmitLoweredCatchPad(MachineInstr *MI,
21920 X86TargetLowering::EmitLoweredTLSCall(MachineInstr *MI,
21980 X86TargetLowering::emitEHSjLjSetJmp(MachineInstr *MI,
22129 X86TargetLowering::emitEHSjLjLongJmp(MachineInstr *MI,
22195 X86TargetLowering::emitFMA3Instr(MachineInstr *MI,
22284 X86TargetLowering::EmitInstrWithCustomInserter(MachineInstr *MI,
22519 void X86TargetLowering::computeKnownBitsForTargetNode(const SDValue Op,
22586 unsigned X86TargetLowering::ComputeNumSignBitsForTargetNode(
22600 bool X86TargetLowering::isGAPlusOffset(SDNode *N,
27501                                  X86TargetLowering::DAGCombinerInfo &DCI) {
27679 SDValue X86TargetLowering::PerformDAGCombine(SDNode *N,
27758 bool X86TargetLowering::isTypeDesirableForOp(unsigned Opc, EVT VT) const {
27786 bool X86TargetLowering::IsDesirableToPromoteOp(SDValue Op, EVT &PVT) const {
27890 bool X86TargetLowering::ExpandInlineAsm(CallInst *CI) const {
27968 X86TargetLowering::ConstraintType
27969 X86TargetLowering::getConstraintType(StringRef Constraint) const {
28013   X86TargetLowering::getSingleConstraintMatchWeight(
28117 const char *X86TargetLowering::
28133 void X86TargetLowering::LowerAsmOperandForConstraint(SDValue Op,
28300 X86TargetLowering::getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,
28512 int X86TargetLowering::getScalingFactorCost(const DataLayout &DL,
28540 bool X86TargetLowering::isIntDivCheap(EVT VT, AttributeSet Attr) const {
28553 void X86TargetLowering::markInRegArguments(SelectionDAG &DAG,

Indexes created Wed Aug 24 13:21:36 CEST 2016