| /external/valgrind/VEX/priv/ |
| H A D | guest_tilegx_toIR.c | 76 #define DIP(format, args...) \ macro
347 DIP("r0 = client_request ( r12 )\n");
359 DIP("r11 = guest_NRADDR\n");
369 DIP("branch-and-link-to-noredir r12\n");
382 DIP("vex-inject-ir\n");
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| H A D | guest_mips_toIR.c | 86 #define DIP(format, args...) \ macro
1557 DIP("dsrl r%u, r%u, %lld", regRd, regRt, sImmsa);
1563 DIP("drotr r%u, r%u, %lld", regRd, regRt, sImmsa);
1578 DIP("dsrl32 r%u, r%u, %lld", regRd, regRt, sImmsa + 32);
1583 DIP("drotr32 r%u, r%u, %lld", regRd, regRt, sImmsa);
1601 DIP("dsrlv r%u, r%u, r%u", regRd, regRt, regRs);
1610 DIP("drotrv r%u, r%u, r%u", regRd, regRt, regRs);
1637 DIP("dsll r%u, r%u, %lld", regRd, regRt, sImmsa);
1644 DIP("dsll32 r%u, r%u, %lld", regRd, regRt, sImmsa);
1650 DIP("dsll
[all...] |
| H A D | guest_arm_toIR.c | 171 #define DIP(format, args...) \ macro
2873 DIP("vext.8 %c%u, %c%u, %c%u, #%u\n", reg_t, dreg, reg_t, nreg,
2973 DIP("vtb%c.8 d%u, {", op ? 'x' : 'l', dreg);
2975 DIP("d%u-d%u", nreg, nreg + len);
2977 DIP("d%u", nreg);
2979 DIP("}, d%u\n", mreg);
3033 DIP("vdup.%u %c%u, d%u[%u]\n", size, Q ? 'q' : 'd', dreg, mreg, index);
3140 DIP("vhadd.%c%d %c%u, %c%u, %c%u\n",
3199 DIP("vqadd.%c%d %c%u %c%u, %c%u\n",
3310 DIP("vrhad
22000 #undef DIP macro
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| H A D | guest_x86_toIR.c | 219 #define DIP(format, args...) \ macro
1879 DIP("%s%c %s,%s\n", t_x86opc, nameISize(size),
1908 DIP("%s%c %s,%s\n", t_x86opc, nameISize(size),
1992 DIP("%s%c %s,%s\n", t_x86opc, nameISize(size),
2044 DIP("%s%c %s,%s\n", t_x86opc, nameISize(size),
2078 DIP("mov%c %s,%s\n", nameISize(size),
2088 DIP("mov%c %s,%s\n", nameISize(size),
2122 DIP("mov%c %s,%s\n", nameISize(size),
2132 DIP("mov%c %s,%s\n", nameISize(size),
2182 DIP("
15415 #undef DIP macro
[all...] |
| H A D | guest_amd64_toIR.c | 373 #define DIP(format, args...) \ macro
2974 DIP("%s%c %s,%s\n", t_amd64opc, nameISize(size),
3003 DIP("%s%c %s,%s\n", t_amd64opc, nameISize(size),
3088 DIP("%s%c %s,%s\n", t_amd64opc, nameISize(size),
3140 DIP("%s%c %s,%s\n", t_amd64opc, nameISize(size),
3175 DIP("mov%c %s,%s\n", nameISize(size),
3185 DIP("mov%c %s,%s\n", nameISize(size),
3226 DIP("mov%c %s,%s\n", nameISize(size),
3238 DIP("mov%c %s,%s\n", nameISize(size),
3290 DIP("
32141 #undef DIP macro
[all...] |
| H A D | guest_arm64_toIR.c | 120 #define DIP(format, args...) \ macro
2429 DIP("%ss %s, %s, 0x%x\n",
2433 DIP("%s %s, %s, 0x%x\n",
2447 DIP("%ss %s, %s, 0x%x\n",
2451 DIP("%s %s, %s, 0x%x\n",
2474 DIP("adr%s %s, 0x%llx\n", bP ? "p" : "", nameIReg64orZR(rD), val);
2515 DIP("%s %s, %s, 0x%llx\n", names[op],
2520 DIP("%s %s, %s, 0x%llx\n", names[op],
2530 DIP("%s %s, %s, 0x%x\n", names[op],
2535 DIP("
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| H A D | guest_ppc_toIR.c | 252 #define DIP(format, args...) \ macro
3498 DIP("addic r%u,r%u,%d\n", rD_addr, rA_addr, (Int)simm16);
3507 DIP("addic. r%u,r%u,%d\n", rD_addr, rA_addr, (Int)simm16);
3521 DIP("li r%u,%d\n", rD_addr, (Int)simm16);
3524 DIP("addi r%u,r%u,%d\n", rD_addr, rA_addr, (Int)simm16);
3533 DIP("lis r%u,%d\n", rD_addr, (Int)simm16);
3536 DIP("addis r%u,r%u,0x%x\n", rD_addr, rA_addr, (UInt)simm16);
3543 DIP("mulli r%u,r%u,%d\n", rD_addr, rA_addr, (Int)simm16);
3555 DIP("subfic r%u,r%u,%d\n", rD_addr, rA_addr, (Int)simm16);
3571 DIP("ad
20479 #undef DIP macro
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