/external/llvm/lib/MC/ |
H A D | MCInstrAnalysis.cpp | 13 bool MCInstrAnalysis::evaluateBranch(const MCInst &Inst, uint64_t Addr, argument 15 if (Inst.getNumOperands() == 0 || 16 Info->get(Inst.getOpcode()).OpInfo[0].OperandType != MCOI::OPERAND_PCREL) 19 int64_t Imm = Inst.getOperand(0).getImm();
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/external/clang/test/Parser/ |
H A D | cxx-default-args.cpp | 10 typedef struct Inst { struct
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/external/llvm/include/llvm/MC/ |
H A D | MCInstBuilder.h | 23 MCInst Inst; member in class:llvm::MCInstBuilder 28 Inst.setOpcode(Opcode); 33 Inst.addOperand(MCOperand::createReg(Reg)); 39 Inst.addOperand(MCOperand::createImm(Val)); 45 Inst.addOperand(MCOperand::createFPImm(Val)); 51 Inst.addOperand(MCOperand::createExpr(Val)); 57 Inst.addOperand(MCOperand::createInst(Val)); 63 Inst.addOperand(Op); 68 return Inst;
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/external/llvm/lib/Analysis/ |
H A D | OrderedBasicBlock.cpp | 37 const Instruction *Inst = nullptr; local 49 Inst = cast<Instruction>(II); 50 NumberedInsts[Inst] = NextInstPos++; 51 if (Inst == A || Inst == B) 56 assert((Inst == A || Inst == B) && "Should find A or B"); 58 return Inst == A;
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H A D | Delinearization.cpp | 73 static Value *getPointerOperand(Instruction &Inst) { argument 74 if (LoadInst *Load = dyn_cast<LoadInst>(&Inst)) 76 else if (StoreInst *Store = dyn_cast<StoreInst>(&Inst)) 78 else if (GetElementPtrInst *Gep = dyn_cast<GetElementPtrInst>(&Inst)) 86 Instruction *Inst = &(*I); local 89 if (!isa<StoreInst>(Inst) && !isa<LoadInst>(Inst) && 90 !isa<GetElementPtrInst>(Inst)) 93 const BasicBlock *BB = Inst->getParent(); 97 const SCEV *AccessFn = SE->getSCEVAtScope(getPointerOperand(*Inst), 107 O << "Inst:" << *Inst << "\\n"; local [all...] |
H A D | Loads.cpp | 215 Instruction *Inst = &*--ScanFrom; local 216 if (isa<DbgInfoIntrinsic>(Inst)) 230 if (LoadInst *LI = dyn_cast<LoadInst>(Inst)) 239 if (StoreInst *SI = dyn_cast<StoreInst>(Inst)) { 271 if (Inst->mayWriteToMemory()) { 275 (AA->getModRefInfo(Inst, StrippedPtr, AccessSize) & MRI_Mod) == 0)
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/external/llvm/lib/MC/MCDisassembler/ |
H A D | MCDisassembler.cpp | 19 bool MCDisassembler::tryAddingSymbolicOperand(MCInst &Inst, int64_t Value, argument 25 return Symbolizer->tryAddingSymbolicOperand(Inst, cStream, Value, Address,
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/external/llvm/lib/Target/AArch64/MCTargetDesc/ |
H A D | AArch64TargetStreamer.cpp | 41 void AArch64TargetStreamer::emitInst(uint32_t Inst) {} argument
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/external/llvm/lib/Target/Mips/MCTargetDesc/ |
H A D | MipsMCCodeEmitter.cpp | 52 static void LowerLargeShift(MCInst& Inst) { argument 54 assert(Inst.getNumOperands() == 3 && "Invalid no. of operands for shift!"); 55 assert(Inst.getOperand(2).isImm()); 57 int64_t Shift = Inst.getOperand(2).getImm(); 63 Inst.getOperand(2).setImm(Shift); 65 switch (Inst.getOpcode()) { 70 Inst.setOpcode(Mips::DSLL32); 73 Inst.setOpcode(Mips::DSRL32); 76 Inst.setOpcode(Mips::DSRA32); 79 Inst [all...] |
H A D | MipsELFStreamer.cpp | 18 void MipsELFStreamer::EmitInstruction(const MCInst &Inst, argument 20 MCELFStreamer::EmitInstruction(Inst, STI); 25 for (unsigned OpIndex = 0; OpIndex < Inst.getNumOperands(); ++OpIndex) { 26 const MCOperand &Op = Inst.getOperand(OpIndex);
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/external/llvm/lib/Target/Mips/ |
H A D | MipsAnalyzeImmediate.h | 19 struct Inst { struct in class:llvm::MipsAnalyzeImmediate 21 Inst(unsigned Opc, unsigned ImmOpnd); 23 typedef SmallVector<Inst, 7 > InstSeq; 33 void AddInstr(InstSeqLs &SeqLs, const Inst &I);
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H A D | MipsOs16.cpp | 82 const Instruction &Inst = *I; local 83 switch (Inst.getOpcode()) {
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H A D | MipsAnalyzeImmediate.cpp | 15 MipsAnalyzeImmediate::Inst::Inst(unsigned O, unsigned I) : Opc(O), ImmOpnd(I) {} function in class:MipsAnalyzeImmediate::Inst 18 void MipsAnalyzeImmediate::AddInstr(InstSeqLs &SeqLs, const Inst &I) { 32 AddInstr(SeqLs, Inst(ADDiu, Imm & 0xffffULL)); 38 AddInstr(SeqLs, Inst(ORi, Imm & 0xffffULL)); 45 AddInstr(SeqLs, Inst(SLL, Shamt)); 58 AddInstr(SeqLs, Inst(ADDiu, MaskedImm));
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/external/llvm/lib/Target/SystemZ/Disassembler/ |
H A D | SystemZDisassembler.cpp | 49 static DecodeStatus decodeRegisterClass(MCInst &Inst, uint64_t RegNo, argument 55 Inst.addOperand(MCOperand::createReg(RegNo)); 59 static DecodeStatus DecodeGR32BitRegisterClass(MCInst &Inst, uint64_t RegNo, 62 return decodeRegisterClass(Inst, RegNo, SystemZMC::GR32Regs, 16); 65 static DecodeStatus DecodeGRH32BitRegisterClass(MCInst &Inst, uint64_t RegNo, 68 return decodeRegisterClass(Inst, RegNo, SystemZMC::GRH32Regs, 16); 71 static DecodeStatus DecodeGR64BitRegisterClass(MCInst &Inst, uint64_t RegNo, 74 return decodeRegisterClass(Inst, RegNo, SystemZMC::GR64Regs, 16); 77 static DecodeStatus DecodeGR128BitRegisterClass(MCInst &Inst, uint64_t RegNo, 80 return decodeRegisterClass(Inst, RegN [all...] |
/external/llvm/lib/Target/WebAssembly/ |
H A D | WebAssemblyOptimizeReturned.cpp | 58 Instruction *Inst = CS.getInstruction(); local 66 if (DT->dominates(Inst, U)) 67 U.set(Inst);
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/external/llvm/lib/Transforms/ObjCARC/ |
H A D | DependencyAnalysis.h | 61 Depends(DependenceKind Flavor, Instruction *Inst, const Value *Arg, 66 bool CanUse(const Instruction *Inst, const Value *Ptr, ProvenanceAnalysis &PA, 71 bool CanAlterRefCount(const Instruction *Inst, const Value *Ptr, 74 /// Returns true if we can not conservatively prove that Inst can not decrement 76 bool CanDecrementRefCount(const Instruction *Inst, const Value *Ptr, 79 static inline bool CanDecrementRefCount(const Instruction *Inst, argument 82 return CanDecrementRefCount(Inst, Ptr, PA, GetARCInstKind(Inst));
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H A D | ObjCARCExpand.cpp | 98 Instruction *Inst = &*I; local 100 DEBUG(dbgs() << "ObjCARCExpand: Visiting: " << *Inst << "\n"); 102 switch (GetBasicARCInstKind(Inst)) { 114 Value *Value = cast<CallInst>(Inst)->getArgOperand(0); 115 DEBUG(dbgs() << "ObjCARCExpand: Old = " << *Inst << "\n" 117 Inst->replaceAllUsesWith(Value);
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H A D | ObjCARCAPElim.cpp | 96 Instruction *Inst = &*I++; local 97 switch (GetBasicARCInstKind(Inst)) { 99 Push = Inst; 104 if (Push && cast<CallInst>(Inst)->getArgOperand(0) == Push) { 108 " Pop: " << *Inst << "\n" 110 Inst->eraseFromParent(); 116 if (MayAutorelease(ImmutableCallSite(Inst)))
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H A D | DependencyAnalysis.cpp | 35 bool llvm::objcarc::CanAlterRefCount(const Instruction *Inst, const Value *Ptr, argument 48 ImmutableCallSite CS(Inst); 56 const DataLayout &DL = Inst->getModule()->getDataLayout(); 71 bool llvm::objcarc::CanDecrementRefCount(const Instruction *Inst, argument 80 return CanAlterRefCount(Inst, Ptr, PA, Class); 85 bool llvm::objcarc::CanUse(const Instruction *Inst, const Value *Ptr, argument 92 const DataLayout &DL = Inst->getModule()->getDataLayout(); 96 if (const ICmpInst *ICI = dyn_cast<ICmpInst>(Inst)) { 102 } else if (auto CS = ImmutableCallSite(Inst)) { 112 } else if (const StoreInst *SI = dyn_cast<StoreInst>(Inst)) { 135 Depends(DependenceKind Flavor, Instruction *Inst, const Value *Arg, ProvenanceAnalysis &PA) argument 255 Instruction *Inst = &*--LocalStartPos; local [all...] |
/external/mesa3d/src/gallium/drivers/r300/compiler/ |
H A D | radeon_variable.h | 48 struct rc_instruction * Inst; member in struct:rc_variable
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/external/llvm/lib/Transforms/Scalar/ |
H A D | DCE.cpp | 12 // Dead Inst Elimination performs a single pass over the function removing 50 Instruction *Inst = &*DI++; variable 51 if (isInstructionTriviallyDead(Inst, TLI)) { 52 Inst->eraseFromParent();
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H A D | LowerAtomic.cpp | 123 Instruction *Inst = &*DI++; variable 124 if (FenceInst *FI = dyn_cast<FenceInst>(Inst)) 126 else if (AtomicCmpXchgInst *CXI = dyn_cast<AtomicCmpXchgInst>(Inst)) 128 else if (AtomicRMWInst *RMWI = dyn_cast<AtomicRMWInst>(Inst)) 130 else if (LoadInst *LI = dyn_cast<LoadInst>(Inst)) { 133 } else if (StoreInst *SI = dyn_cast<StoreInst>(Inst)) {
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/external/llvm/include/llvm/Analysis/ |
H A D | MemoryLocation.h | 70 static MemoryLocation get(const Instruction *Inst) { argument 71 if (auto *I = dyn_cast<LoadInst>(Inst)) 73 else if (auto *I = dyn_cast<StoreInst>(Inst)) 75 else if (auto *I = dyn_cast<VAArgInst>(Inst)) 77 else if (auto *I = dyn_cast<AtomicCmpXchgInst>(Inst)) 79 else if (auto *I = dyn_cast<AtomicRMWInst>(Inst))
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/external/llvm/lib/Object/ |
H A D | RecordStreamer.cpp | 70 void RecordStreamer::EmitInstruction(const MCInst &Inst, argument 72 MCStreamer::EmitInstruction(Inst, STI);
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/external/llvm/tools/llvm-mc/ |
H A D | Disassembler.cpp | 46 MCInst Inst; local 49 S = DisAsm.getInstruction(Inst, Size, Data.slice(Index), Index, 72 Streamer.EmitInstruction(Inst, STI);
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