Searched defs:Off (Results 1 - 25 of 42) sorted by relevance

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/external/google-breakpad/src/common/linux/
H A Delfutils.h51 typedef Elf32_Off Off; typedef in struct:google_breakpad::ElfClass32
64 typedef Elf64_Off Off; typedef in struct:google_breakpad::ElfClass64
114 typename ElfClass::Off offset);
/external/llvm/include/llvm/MC/
H A DMCWin64EH.h50 static WinEH::Instruction SetFPReg(MCSymbol *L, unsigned Reg, unsigned Off) { argument
51 return WinEH::Instruction(UOP_SetFPReg, L, Reg, Off);
H A DMCWinEH.h29 Instruction(unsigned Op, MCSymbol *L, unsigned Reg, unsigned Off) argument
30 : Label(L), Offset(Off), Register(Reg), Operation(Op) {}
/external/clang/test/Analysis/
H A Dunreachable-code-path.c70 enum test_enum { Off, On }; enumerator in enum:test_enum
78 if (Off)
/external/llvm/lib/MC/MCDisassembler/
H A DMCExternalSymbolizer.cpp112 const MCExpr *Off = nullptr; local
114 Off = MCConstantExpr::create(SymbolicOp.Value, Ctx);
123 if (Off)
124 Expr = MCBinaryExpr::createAdd(LHS, Off, Ctx);
128 if (Off)
129 Expr = MCBinaryExpr::createAdd(Add, Off, Ctx);
133 if (Off)
134 Expr = Off;
/external/llvm/lib/Target/AArch64/Disassembler/
H A DAArch64ExternalSymbolizer.cpp190 const MCExpr *Off = nullptr; local
192 Off = MCConstantExpr::create(SymbolicOp.Value, Ctx);
201 if (Off)
202 Expr = MCBinaryExpr::createAdd(LHS, Off, Ctx);
206 if (Off)
207 Expr = MCBinaryExpr::createAdd(Add, Off, Ctx);
211 if (Off)
212 Expr = Off;
/external/llvm/lib/Target/X86/
H A DX86TargetObjectFile.cpp60 const MCExpr *Off = MCConstantExpr::create(FinalOff, getContext()); local
61 return MCBinaryExpr::createAdd(Res, Off, getContext());
/external/llvm/lib/IR/
H A DMDBuilder.cpp159 ConstantInt *Off = ConstantInt::get(Type::getInt64Ty(Context), Offset); local
161 {createString(Name), Parent, createConstant(Off)});
169 ConstantInt *Off = ConstantInt::get(Int64, Offset); local
171 return MDNode::get(Context, {BaseType, AccessType, createConstant(Off),
174 return MDNode::get(Context, {BaseType, AccessType, createConstant(Off)});
/external/llvm/lib/Target/AArch64/
H A DAArch64RegisterInfo.cpp340 int Off = Offset; // ARM doesn't need the general 64-bit offsets local
350 bool Done = rewriteAArch64FrameIndex(MI, i, BaseReg, Off, TII);
/external/llvm/lib/Target/AMDGPU/
H A DSILowerControlFlow.cpp433 int Off = MI.getOperand(4).getImm(); local
436 computeIndirectRegAndOffset(Vec, Reg, Off);
443 LoadM0(MI, MovRel, Off);
452 int Off = MI.getOperand(4).getImm(); local
456 computeIndirectRegAndOffset(Dst, Reg, Off);
464 LoadM0(MI, MovRel, Off);
/external/llvm/lib/MC/MCParser/
H A DCOFFAsmParser.cpp615 int64_t Off; local
623 if (getParser().parseAbsoluteExpression(Off))
626 if (Off & 0x0F)
633 getStreamer().EmitWinCFISetFrame(Reg, Off);
656 int64_t Off; local
664 if (getParser().parseAbsoluteExpression(Off))
667 if (Off & 7)
675 getStreamer().EmitWinCFISaveReg(Reg, Off);
683 int64_t Off; local
691 if (getParser().parseAbsoluteExpression(Off))
[all...]
/external/llvm/lib/Target/Hexagon/
H A DHexagonBitTracker.cpp259 int Off = op(2).getImm(); variable
260 unsigned A = MFI.getObjectAlignment(FI) + std::abs(Off);
H A DHexagonStoreWidening.cpp440 int64_t Off = FirstSt->getOperand(1).getImm(); local
443 .addImm(Off)
462 int64_t Off = FirstSt->getOperand(1).getImm(); local
465 .addImm(Off)
H A DHexagonSplitDouble.cpp619 int64_t Off = PostInc ? 0 : MI->getOperand(2).getImm(); local
622 .addImm(Off);
625 .addImm(Off+4);
628 int64_t Off = PostInc ? 0 : MI->getOperand(1).getImm(); local
631 .addImm(Off)
635 .addImm(Off+4)
H A DHexagonFrameLowering.cpp1291 int Off = MinOffset - RC->getSize(); local
1294 Off &= -Align;
1295 int FI = MFI->CreateFixedSpillStackObject(RC->getSize(), Off);
1296 MinOffset = std::min(MinOffset, Off);
1305 int Off = MFI->getObjectOffset(FI);
1307 if (Off >= 0)
1309 dbgs() << Off;
/external/llvm/lib/Transforms/Instrumentation/
H A DSafeStack.cpp539 Value *Off = IRB.CreateGEP(BasePointer, // BasePointer is i8* local
541 Value *NewArg = IRB.CreateBitCast(Off, Arg->getType(),
549 IRB.CreateMemCpy(Off, Arg, Size, Arg->getParamAlignment());
570 Value *Off = IRB.CreateGEP(BasePointer, // BasePointer is i8* local
572 Value *NewAI = IRB.CreateBitCast(Off, AI->getType(), AI->getName());
/external/llvm/include/llvm/Support/
H A DOnDiskHashTable.h81 offset_type Off; member in struct:llvm::OnDiskChainedHashTableGenerator::Bucket
162 B.Off = Out.tell();
163 assert(B.Off && "Cannot write a bucket at offset 0. Please add padding.");
204 LE.write<offset_type>(Buckets[I].Off);
/external/llvm/lib/Target/ARM/
H A DARMBaseRegisterInfo.cpp589 int Off = Offset; // ARM doesn't need the general 64-bit offsets local
601 Done = rewriteARMFrameIndex(MI, i, BaseReg, Off, TII);
604 Done = rewriteT2FrameIndex(MI, i, BaseReg, Off, TII);
/external/skia/debugger/QT/
H A DSkDebuggerGUI.cpp395 QIcon::Normal, QIcon::Off); member in class:QIcon
406 QSize(), QIcon::Normal, QIcon::Off); member in class:QIcon
414 QIcon::Normal, QIcon::Off); member in class:QIcon
438 QSize(), QIcon::Normal, QIcon::Off); member in class:QIcon
445 QSize(), QIcon::Normal, QIcon::Off); member in class:QIcon
452 QIcon::Normal, QIcon::Off); member in class:QIcon
459 QIcon::Normal, QIcon::Off); member in class:QIcon
467 QIcon::Normal, QIcon::Off); member in class:QIcon
485 QIcon::Normal, QIcon::Off); member in class:QIcon
492 QSize(), QIcon::Normal, QIcon::Off); member in class:QIcon
[all...]
/external/clang/lib/Frontend/
H A DCacheTokens.cpp476 static void pwrite32le(raw_pwrite_stream &OS, uint32_t Val, uint64_t &Off) { argument
478 OS.pwrite(reinterpret_cast<const char *>(&LEVal), 4, Off); local
479 Off += 4;
534 uint64_t Off = PrologueOffset; local
535 pwrite32le(Out, IdTableOff.first, Off);
536 pwrite32le(Out, IdTableOff.second, Off);
537 pwrite32le(Out, FileTableOff, Off);
538 pwrite32le(Out, SpellingOff, Off);
/external/llvm/lib/CodeGen/
H A DMachineFunction.cpp703 int64_t Off = SO.SPOffset - ValOffset; local
705 if (Off > 0)
706 OS << "+" << Off; local
707 else if (Off < 0)
708 OS << Off; local
/external/llvm/lib/Target/Sparc/AsmParser/
H A DSparcAsmParser.cpp195 const MCExpr *Off; member in struct:__anon12302::SparcOperand::MemOp
255 return Mem.Off;
407 Op->Mem.Off = nullptr;
416 Op->Mem.Off = nullptr;
428 Op->Mem.Off = Imm;
/external/skia/include/core/
H A DSkPaint.h1072 Off = 0, On member in class:SkPaint::FakeGamma
/external/llvm/lib/Target/NVPTX/
H A DNVPTXISelLowering.cpp93 uint64_t Off = TempOffsets[i]; local
98 Offsets->push_back(Off+j*VT.getVectorElementType().getStoreSize());
103 Offsets->push_back(Off);
/external/llvm/lib/Transforms/InstCombine/
H A DInstCombineCasts.cpp135 Value *Off = ConstantInt::get(AI.getArraySize()->getType(), local
137 Amt = AllocaBuilder.CreateAdd(Amt, Off);

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