Searched defs:RegClassInfo (Results 1 - 9 of 9) sorted by relevance
| /external/llvm/lib/CodeGen/ |
| H A D | AllocationOrder.cpp | 32 const RegisterClassInfo &RegClassInfo,
37 Order = RegClassInfo.getOrder(MF.getRegInfo().getRegClass(VirtReg));
30 AllocationOrder(unsigned VirtReg, const VirtRegMap &VRM, const RegisterClassInfo &RegClassInfo, const LiveRegMatrix *Matrix) argument
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| H A D | CriticalAntiDepBreaker.h | 39 const RegisterClassInfo &RegClassInfo; member in class:llvm::CriticalAntiDepBreaker
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| H A D | RegAllocBase.h | 66 RegisterClassInfo RegClassInfo; member in class:llvm::RegAllocBase
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| H A D | AggressiveAntiDepBreaker.h | 117 const RegisterClassInfo &RegClassInfo; member in class:llvm::AggressiveAntiDepBreaker
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| H A D | PostRASchedulerList.cpp | 82 RegisterClassInfo RegClassInfo; member in class:__anon11824::PostRAScheduler
273 RegClassInfo.runOnMachineFunction(Fn);
301 SchedulePostRATDList Scheduler(Fn, MLI, AA, RegClassInfo, AntiDepMode,
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| H A D | RegAllocFast.cpp | 60 RegisterClassInfo RegClassInfo; member in class:__anon11830::RAFast
543 ArrayRef<MCPhysReg> AO = RegClassInfo.getOrder(RC);
1079 RegClassInfo.runOnMachineFunction(Fn);
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| H A D | RegisterCoalescer.cpp | 91 RegisterClassInfo RegClassInfo; member in class:__anon11835::RegisterCoalescer
1418 if (!CP.isPhys() && RegClassInfo.isProperSubClass(CP.getNewRC()))
2935 RegClassInfo.runOnMachineFunction(fn);
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| /external/llvm/lib/Target/ARM/ |
| H A D | ARMLoadStoreOptimizer.cpp | 85 RegisterClassInfo RegClassInfo; member in struct:__anon12100::ARMLoadStoreOpt
537 RegClassInfo.runOnMachineFunction(*MF);
541 for (unsigned Reg : RegClassInfo.getOrder(&RegClass))
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| /external/llvm/include/llvm/CodeGen/ |
| H A D | MachineScheduler.h | 109 RegisterClassInfo *RegClassInfo; member in struct:llvm::MachineSchedContext
358 RegisterClassInfo *RegClassInfo; member in class:llvm::ScheduleDAGMILive
394 RegClassInfo(C->RegClassInfo), DFSResult(nullptr),
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