Searched defs:Src2Reg (Results 1 - 7 of 7) sorted by relevance

/external/llvm/lib/Target/Hexagon/MCTargetDesc/
H A DHexagonMCCompound.cpp84 unsigned DstReg, SrcReg, Src1Reg, Src2Reg; local
102 Src2Reg = MI.getOperand(2).getReg();
105 HexagonMCInstrInfo::isIntRegForSubInst(Src2Reg))
H A DHexagonMCDuplexInfo.cpp181 unsigned DstReg, PredReg, SrcReg, Src1Reg, Src2Reg; local
321 Src2Reg = MCI.getOperand(2).getReg();
323 HexagonMCInstrInfo::isIntRegForSubInst(Src2Reg) &&
329 HexagonMCInstrInfo::isIntRegForSubInst(Src2Reg) &&
337 Src2Reg = MCI.getOperand(2).getReg();
339 HexagonMCInstrInfo::isIntRegForSubInst(Src2Reg) &&
356 Src2Reg = MCI.getOperand(2).getReg();
358 HexagonMCInstrInfo::isIntRegForSubInst(Src2Reg) &&
366 Src2Reg = MCI.getOperand(2).getReg();
367 if (HexagonMCInstrInfo::isDblRegForSubInst(Src2Reg)
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/external/llvm/lib/Target/ARM/
H A DMLxExpansionPass.cpp279 unsigned Src2Reg = MI->getOperand(3).getReg(); local
295 .addReg(Src2Reg, getKillRegState(Src2Kill));
/external/llvm/lib/Target/AMDGPU/
H A DSIInstrInfo.cpp1099 unsigned Src2Reg = Src2->getReg(); local
1105 Src1->setReg(Src2Reg);
/external/llvm/lib/Target/Mips/
H A DMipsFastISel.cpp982 unsigned Src2Reg = getRegForValue(SI->getFalseValue()); local
985 if (!Src1Reg || !Src2Reg || !CondReg)
1001 emitInst(TargetOpcode::COPY, TempReg).addReg(Src2Reg);
/external/llvm/lib/Target/AArch64/
H A DAArch64FastISel.cpp2541 unsigned Src2Reg = getRegForValue(Src2Val); local
2542 if (!Src2Reg)
2551 Src1IsKill, Src2Reg, Src2IsKill);
2669 unsigned Src2Reg = getRegForValue(SI->getFalseValue()); local
2672 if (!Src1Reg || !Src2Reg)
2676 Src2Reg = fastEmitInst_rri(Opc, RC, Src1Reg, Src1IsKill, Src2Reg,
2680 unsigned ResultReg = fastEmitInst_rri(Opc, RC, Src1Reg, Src1IsKill, Src2Reg,
/external/llvm/lib/Target/Hexagon/
H A DHexagonInstrInfo.cpp910 unsigned Src2Reg = MI->getOperand(2).getReg(); local
913 unsigned Src2SubHi = HRI.getSubReg(Src2Reg, Hexagon::subreg_hireg);
914 unsigned Src2SubLo = HRI.getSubReg(Src2Reg, Hexagon::subreg_loreg);
932 unsigned Src2Reg = MI->getOperand(2).getReg(); local
936 unsigned Src2SubHi = HRI.getSubReg(Src2Reg, Hexagon::subreg_hireg);
937 unsigned Src2SubLo = HRI.getSubReg(Src2Reg, Hexagon::subreg_loreg);
2839 unsigned DstReg, SrcReg, Src1Reg, Src2Reg; local
2855 Src2Reg = MI->getOperand(2).getReg();
2858 isIntRegForSubInst(Src1Reg) && isIntRegForSubInst(Src2Reg))
3172 unsigned DstReg, SrcReg, Src1Reg, Src2Reg; local
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