Searched defs:shifter (Results 1 - 3 of 3) sorted by relevance

/art/compiler/utils/x86/
H A Dassembler_x86.cc1390 void X86Assembler::shll(Register operand, Register shifter) { argument
1391 EmitGenericShift(4, Operand(operand), shifter);
1400 void X86Assembler::shll(const Address& address, Register shifter) { argument
1401 EmitGenericShift(4, address, shifter);
1410 void X86Assembler::shrl(Register operand, Register shifter) { argument
1411 EmitGenericShift(5, Operand(operand), shifter);
1420 void X86Assembler::shrl(const Address& address, Register shifter) { argument
1421 EmitGenericShift(5, address, shifter);
1430 void X86Assembler::sarl(Register operand, Register shifter) { argument
1431 EmitGenericShift(7, Operand(operand), shifter);
1440 sarl(const Address& address, Register shifter) argument
1445 shld(Register dst, Register src, Register shifter) argument
1463 shrd(Register dst, Register src, Register shifter) argument
1486 roll(Register operand, Register shifter) argument
1496 rorl(Register operand, Register shifter) argument
1912 EmitGenericShift(int reg_or_opcode, const Operand& operand, Register shifter) argument
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/art/compiler/utils/x86_64/
H A Dassembler_x86_64.cc1835 void X86_64Assembler::shll(CpuRegister operand, CpuRegister shifter) { argument
1836 EmitGenericShift(false, 4, operand, shifter);
1840 void X86_64Assembler::shlq(CpuRegister operand, CpuRegister shifter) { argument
1841 EmitGenericShift(true, 4, operand, shifter);
1855 void X86_64Assembler::shrl(CpuRegister operand, CpuRegister shifter) { argument
1856 EmitGenericShift(false, 5, operand, shifter);
1860 void X86_64Assembler::shrq(CpuRegister operand, CpuRegister shifter) { argument
1861 EmitGenericShift(true, 5, operand, shifter);
1870 void X86_64Assembler::sarl(CpuRegister operand, CpuRegister shifter) { argument
1871 EmitGenericShift(false, 7, operand, shifter);
1880 sarq(CpuRegister operand, CpuRegister shifter) argument
1890 roll(CpuRegister operand, CpuRegister shifter) argument
1900 rorl(CpuRegister operand, CpuRegister shifter) argument
1910 rolq(CpuRegister operand, CpuRegister shifter) argument
1920 rorq(CpuRegister operand, CpuRegister shifter) argument
2483 EmitGenericShift(bool wide, int reg_or_opcode, CpuRegister operand, CpuRegister shifter) argument
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/art/compiler/optimizing/
H A Dcode_generator_x86.cc3791 void InstructionCodeGeneratorX86::GenerateShlLong(const Location& loc, Register shifter) { argument
3793 __ shld(loc.AsRegisterPairHigh<Register>(), loc.AsRegisterPairLow<Register>(), shifter);
3794 __ shll(loc.AsRegisterPairLow<Register>(), shifter);
3795 __ testl(shifter, Immediate(32));
3823 void InstructionCodeGeneratorX86::GenerateShrLong(const Location& loc, Register shifter) { argument
3825 __ shrd(loc.AsRegisterPairLow<Register>(), loc.AsRegisterPairHigh<Register>(), shifter);
3826 __ sarl(loc.AsRegisterPairHigh<Register>(), shifter);
3827 __ testl(shifter, Immediate(32));
3858 void InstructionCodeGeneratorX86::GenerateUShrLong(const Location& loc, Register shifter) { argument
3860 __ shrd(loc.AsRegisterPairLow<Register>(), loc.AsRegisterPairHigh<Register>(), shifter);
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