Searched refs:DReg (Results 1 - 5 of 5) sorted by relevance
/external/llvm/lib/Target/ARM/ |
H A D | A15SDOptimizer.cpp | 78 unsigned DReg, unsigned Lane, 93 DebugLoc DL, unsigned DReg, unsigned Lane, 151 unsigned DReg = TRI->getMatchingSuperReg(SReg, ARM::ssub_1, local 153 if (DReg != ARM::NoRegister) return ARM::ssub_1; 452 unsigned DReg, unsigned Lane, 459 .addReg(DReg, 0, Lane); 503 DebugLoc DL, unsigned DReg, unsigned Lane, 510 .addReg(DReg) 449 createExtractSubreg(MachineBasicBlock &MBB, MachineBasicBlock::iterator InsertBefore, DebugLoc DL, unsigned DReg, unsigned Lane, const TargetRegisterClass *TRC) argument 501 createInsertSubreg(MachineBasicBlock &MBB, MachineBasicBlock::iterator InsertBefore, DebugLoc DL, unsigned DReg, unsigned Lane, unsigned ToInsert) argument
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H A D | ARMBaseInstrInfo.cpp | 4184 unsigned DReg = TRI->getMatchingSuperReg(SReg, ARM::ssub_0, &ARM::DPRRegClass); local 4187 if (DReg != ARM::NoRegister) 4188 return DReg; 4191 DReg = TRI->getMatchingSuperReg(SReg, ARM::ssub_1, &ARM::DPRRegClass); 4193 assert(DReg && "S-register with no D super-register?"); 4194 return DReg; 4214 unsigned DReg, unsigned Lane, 4218 if (MI->definesRegister(DReg, TRI) || MI->readsRegister(DReg, TRI)) { 4224 ImplicitSReg = TRI->getSubReg(DReg, 4212 getImplicitSPRUseForDPRUse(const TargetRegisterInfo *TRI, MachineInstr *MI, unsigned DReg, unsigned Lane, unsigned &ImplicitSReg) argument 4242 unsigned DstReg, SrcReg, DReg; local 4498 unsigned DReg = TRI->getMatchingSuperReg(Reg, ARM::ssub_0, local 4522 unsigned DReg = Reg; local [all...] |
/external/llvm/lib/Target/Mips/ |
H A D | Mips16FrameLowering.cpp | 74 unsigned DReg = MRI->getDwarfRegNum(Reg, true); local 76 MCCFIInstruction::createOffset(nullptr, DReg, Offset));
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/external/llvm/lib/Target/X86/ |
H A D | X86FloatingPoint.cpp | 851 unsigned DReg = countTrailingZeros(Defs); local 852 DEBUG(dbgs() << "Renaming %FP" << KReg << " as imp %FP" << DReg << "\n"); local 853 std::swap(Stack[getSlot(KReg)], Stack[getSlot(DReg)]); 854 std::swap(RegMap[KReg], RegMap[DReg]); 856 Defs &= ~(1 << DReg); 882 unsigned DReg = countTrailingZeros(Defs); local 883 DEBUG(dbgs() << "Defining %FP" << DReg << " as 0\n"); 885 pushReg(DReg); 886 Defs &= ~(1 << DReg);
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/external/llvm/lib/Target/Mips/AsmParser/ |
H A D | MipsAsmParser.cpp | 3241 unsigned DReg = Inst.getOperand(0).getReg(); local 3244 unsigned TmpReg = DReg; 3251 if (DReg == SReg) { 3259 emitRRR(Mips::ROTRV, DReg, SReg, TmpReg, Inst.getLoc(), Instructions); 3264 emitRRR(Mips::ROTRV, DReg, SReg, TReg, Inst.getLoc(), Instructions); 3292 emitRRR(SecondShift, DReg, SReg, TReg, Inst.getLoc(), Instructions); 3293 emitRRR(Mips::OR, DReg, DReg, ATReg, Inst.getLoc(), Instructions); 3305 unsigned DReg = Inst.getOperand(0).getReg(); local 3319 emitRRI(Mips::ROTR, DReg, SRe 3369 unsigned DReg = Inst.getOperand(0).getReg(); local 3433 unsigned DReg = Inst.getOperand(0).getReg(); local [all...] |
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