Searched refs:FPToInt64 (Results 1 - 5 of 5) sorted by relevance
/external/vixl/src/vixl/a64/ |
H A D | simulator-a64.cc | 1920 case FCVTAS_xs: set_xreg(dst, FPToInt64(sreg(src), FPTieAway)); break; 1922 case FCVTAS_xd: set_xreg(dst, FPToInt64(dreg(src), FPTieAway)); break; 1931 set_xreg(dst, FPToInt64(sreg(src), FPNegativeInfinity)); 1937 set_xreg(dst, FPToInt64(dreg(src), FPNegativeInfinity)); 1955 set_xreg(dst, FPToInt64(sreg(src), FPPositiveInfinity)); 1961 set_xreg(dst, FPToInt64(dreg(src), FPPositiveInfinity)); 1976 case FCVTNS_xs: set_xreg(dst, FPToInt64(sreg(src), FPTieEven)); break; 1978 case FCVTNS_xd: set_xreg(dst, FPToInt64(dreg(src), FPTieEven)); break; 1984 case FCVTZS_xs: set_xreg(dst, FPToInt64(sreg(src), FPZero)); break; 1986 case FCVTZS_xd: set_xreg(dst, FPToInt64(dre [all...] |
H A D | simulator-a64.h | 2428 int64_t FPToInt64(double value, FPRounding rmode);
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H A D | logic-a64.cc | 3830 int64_t Simulator::FPToInt64(double value, FPRounding rmode) { function in class:vixl::Simulator 4401 dst.SetInt(vform, i, FPToInt64(op, rounding_mode));
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/external/v8/src/arm64/ |
H A D | simulator-arm64.cc | 2226 case FCVTAS_xs: set_xreg(dst, FPToInt64(sreg(src), FPTieAway)); break; 2228 case FCVTAS_xd: set_xreg(dst, FPToInt64(dreg(src), FPTieAway)); break; 2237 set_xreg(dst, FPToInt64(sreg(src), FPNegativeInfinity)); 2243 set_xreg(dst, FPToInt64(dreg(src), FPNegativeInfinity)); 2258 case FCVTNS_xs: set_xreg(dst, FPToInt64(sreg(src), FPTieEven)); break; 2260 case FCVTNS_xd: set_xreg(dst, FPToInt64(dreg(src), FPTieEven)); break; 2266 case FCVTZS_xs: set_xreg(dst, FPToInt64(sreg(src), FPZero)); break; 2268 case FCVTZS_xd: set_xreg(dst, FPToInt64(dreg(src), FPZero)); break; 2356 int64_t Simulator::FPToInt64(double value, FPRounding rmode) { function in class:v8::internal::Simulator
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H A D | simulator-arm64.h | 722 int64_t FPToInt64(double value, FPRounding rmode);
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