| /external/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeVectorTypes.cpp | 742 EVT InVT = InOp.getValueType(); local
745 switch (getTypeAction(InVT)) {
1184 EVT InVT = N->getOperand(0).getValueType(); local
1185 if (getTypeAction(InVT) == TargetLowering::TypeSplitVector)
1509 EVT InVT = Lo.getValueType(); local
1512 InVT.getVectorNumElements());
1888 EVT InVT = InVec->getValueType(0); local
1897 unsigned InElementSize = InVT.getVectorElementType().getSizeInBits();
1959 EVT InVT = Lo.getValueType(); local
1962 InVT
2287 EVT InVT = InOp.getValueType(); local
2420 EVT InVT = InOp.getValueType(); local
2522 EVT InVT = N->getOperand(0).getValueType(); local
2600 EVT InVT = InOp.getValueType(); local
2682 EVT InVT = InOp.getValueType(); local
2912 EVT InVT = InOp1.getValueType(); local
3021 EVT InVT = InOp.getValueType(); local
3085 EVT InVT = InOp.getValueType(); local
3134 EVT InVT = N->getOperand(0).getValueType(); local
3712 EVT InVT = InOp.getValueType(); local
[all...] |
| H A D | LegalizeTypesGeneric.cpp | 45 EVT InVT = InOp.getValueType(); local
49 switch (getTypeAction(InVT)) {
72 if (TLI.hasBigEndianPartOrdering(InVT, DL) !=
93 assert(!(InVT.getVectorNumElements() & 1) && "Unsupported BITCAST");
96 std::tie(LoVT, HiVT) = DAG.GetSplitDestVTs(InVT);
106 if (InVT.isVector() && OutVT.isInteger()) {
167 SDValue StackPtr = DAG.CreateStackTemporary(InVT, Alignment);
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| H A D | LegalizeIntegerTypes.cpp | 246 EVT InVT = InOp.getValueType(); local
247 EVT NInVT = TLI.getTypeToTransformTo(*DAG.getContext(), InVT);
252 switch (getTypeAction(InVT)) {
703 EVT InVT = InOp.getValueType(); local
704 assert(InVT.isVector() && "Cannot split scalar types");
705 unsigned NumElts = InVT.getVectorNumElements();
3130 EVT InVT = InOp0.getValueType(); local
3149 InVT.getVectorElementType(), N->getOperand(0), Index);
3283 MVT InVT = V0.getValueType().getSimpleVT(); local
3284 MVT OutVT = MVT::getVectorVT(InVT
[all...] |
| H A D | SelectionDAG.cpp | 2293 EVT InVT = Op.getOperand(0).getValueType(); local
2294 unsigned InBits = InVT.getScalarType().getSizeInBits();
2305 EVT InVT = Op.getOperand(0).getValueType(); local
2306 unsigned InBits = InVT.getScalarType().getSizeInBits();
2328 EVT InVT = Op.getOperand(0).getValueType(); local
2329 unsigned InBits = InVT.getScalarType().getSizeInBits();
2338 EVT InVT = Op.getOperand(0).getValueType(); local
2339 unsigned InBits = InVT.getScalarType().getSizeInBits();
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| H A D | TargetLowering.cpp | 941 EVT InVT = Op.getOperand(0).getValueType(); local
942 unsigned InBits = InVT.getScalarType().getSizeInBits();
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| H A D | DAGCombiner.cpp | 12477 EVT InVT = In.getOperand(0).getValueType();
12482 SrcVT = InVT;
12483 if (SrcVT != InVT)
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| /external/llvm/utils/TableGen/ |
| H A D | CodeGenDAGPatterns.cpp | 154 bool EEVT::TypeSet::MergeInTypeInfo(const EEVT::TypeSet &InVT, TreePattern &TP){ argument
155 if (InVT.isCompletelyUnknown() || *this == InVT || TP.hasError())
159 *this = InVT;
163 assert(!TypeVec.empty() && !InVT.TypeVec.empty() && "No unknowns");
170 if (InVT.hasIntegerTypes()) {
171 EEVT::TypeSet InCopy(InVT);
177 TypeVec[0] = InVT.TypeVec[0];
190 if ((InVT.TypeVec[0] == MVT::iPTR || InVT
[all...] |
| H A D | CodeGenDAGPatterns.h | 113 bool MergeInTypeInfo(const EEVT::TypeSet &InVT, TreePattern &TP);
115 bool MergeInTypeInfo(MVT::SimpleValueType InVT, TreePattern &TP) {
116 return MergeInTypeInfo(EEVT::TypeSet(InVT, TP), TP);
|
| /external/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 11882 MVT InVT = In.getSimpleValueType();
11886 (InVT.is256BitVector() || InVT.is512BitVector()) &&
11890 if (ResVT.is256BitVector() && InVT.is512BitVector() &&
13165 MVT InVT = In.getSimpleValueType();
13168 if (VT.is512BitVector() || InVT.getVectorElementType() == MVT::i1)
13184 if (((VT != MVT::v16i16) || (InVT != MVT::v16i8)) &&
13185 ((VT != MVT::v8i32) || (InVT != MVT::v8i16)) &&
13186 ((VT != MVT::v4i64) || (InVT != MVT::v4i32)))
13192 SDValue ZeroVec = getZeroVector(InVT, Subtarge
[all...] |
| /external/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.cpp | 2647 EVT InVT = In.getValueType();
2657 if (InVT == MVT::i32 && ResVT == MVT::f32) {
2673 if (InVT == MVT::f32 && ResVT == MVT::i32) {
3564 MVT InVT = MVT::getVectorVT(MVT::getIntegerVT(InBytes * 8),
3566 Op0 = DAG.getNode(ISD::BITCAST, DL, InVT, Op0);
3567 Op1 = DAG.getNode(ISD::BITCAST, DL, InVT, Op1);
3571 Op = DAG.getNode(SystemZISD::PERMUTE_DWORDS, DL, InVT, Op0, Op1, Op2);
3577 Op = DAG.getNode(P.Opcode, DL, InVT, Op0, Op1);
4243 EVT InVT = PackedOp.getValueType();
4245 unsigned FromBits = InVT
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelDAGToDAG.cpp | 2720 EVT InVT = N->getOperand(0).getValueType(); local
2721 assert((InVT == MVT::i64 || InVT == MVT::i32) &&
2724 unsigned Opcode = (InVT == MVT::i64) ? PPC::ANDIo8 : PPC::ANDIo;
2725 SDValue AndI(CurDAG->getMachineNode(Opcode, dl, InVT, MVT::Glue,
2727 CurDAG->getTargetConstant(1, dl, InVT)),
|
| /external/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 1849 EVT InVT = Op.getOperand(0).getValueType(); local
1851 unsigned NumElts = InVT.getVectorNumElements();
1854 if (InVT.getVectorElementType() == MVT::f16) {
1862 if (VT.getSizeInBits() < InVT.getSizeInBits()) {
1865 DAG.getNode(Op.getOpcode(), dl, InVT.changeVectorElementTypeToInteger(),
1870 if (VT.getSizeInBits() > InVT.getSizeInBits()) {
1918 EVT InVT = In.getValueType(); local
1920 if (VT.getSizeInBits() < InVT.getSizeInBits()) {
1922 MVT::getVectorVT(MVT::getFloatingPointVT(InVT.getScalarSizeInBits()),
1923 InVT
[all...] |