/external/llvm/lib/CodeGen/ |
H A D | MachineCopyPropagation.cpp | 69 for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI) { 186 for (MCRegAliasIterator AI(Src, TRI, true); AI.isValid(); ++AI) { 210 for (MCRegAliasIterator AI(Def, TRI, false); AI.isValid(); ++AI) { 254 for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI) { 303 for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI) {
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H A D | MachineRegisterInfo.cpp | 423 for (MCRegAliasIterator AI(PhysReg, getTargetRegisterInfo(), true); 478 for (MCRegAliasIterator AI(PhysReg, TRI, true); AI.isValid(); ++AI) { 492 for (MCRegAliasIterator AliasReg(PhysReg, TRI, true); AliasReg.isValid();
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H A D | CriticalAntiDepBreaker.cpp | 61 for (MCRegAliasIterator AI(LI.PhysReg, TRI, true); AI.isValid(); ++AI) { 76 for (MCRegAliasIterator AI(*I, TRI, true); AI.isValid(); ++AI) { 190 for (MCRegAliasIterator AI(Reg, TRI, false); AI.isValid(); ++AI) { 308 for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI) {
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H A D | DeadMachineInstructionElim.cpp | 162 for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI)
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H A D | RegisterClassInfo.cpp | 58 for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI)
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H A D | AggressiveAntiDepBreaker.cpp | 153 for (MCRegAliasIterator AI(LI.PhysReg, TRI, true); AI.isValid(); ++AI) { 169 for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI) { 302 for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI) 378 for (MCRegAliasIterator AI(Reg, TRI, false); AI.isValid(); ++AI) { 409 for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI) { 668 for (MCRegAliasIterator AI(NewReg, TRI, false); AI.isValid(); ++AI) {
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H A D | CallingConvLower.cpp | 63 for (MCRegAliasIterator AI(Reg, &TRI, true); AI.isValid(); ++AI)
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H A D | RegAllocFast.cpp | 365 for (MCRegAliasIterator AI(PhysReg, TRI, false); AI.isValid(); ++AI) { 424 for (MCRegAliasIterator AI(PhysReg, TRI, false); AI.isValid(); ++AI) { 472 for (MCRegAliasIterator AI(PhysReg, TRI, false); AI.isValid(); ++AI) { 729 for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI) {
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H A D | MachineCSE.cpp | 234 for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI) 263 for (MCRegAliasIterator AI(PhysDefs[i], TRI, true); AI.isValid(); ++AI)
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H A D | MachineLICM.cpp | 393 for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI) 413 for (MCRegAliasIterator AS(Reg, TRI, true); AS.isValid(); ++AS) { 463 for (MCRegAliasIterator AI(LI.PhysReg, TRI, true); AI.isValid(); ++AI) 486 for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI)
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H A D | LiveDebugValues.cpp | 216 for (MCRegAliasIterator RAI(MO.getReg(), TRI, true); RAI.isValid(); ++RAI)
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H A D | RegisterScavenging.cpp | 325 for (MCRegAliasIterator AI(MO.getReg(), TRI, true); AI.isValid(); ++AI)
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H A D | MachineInstr.cpp | 1665 for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI) { 1811 MCRegAliasIterator(IncomingReg, RegInfo, false).isValid(); 1883 MCRegAliasIterator(Reg, RegInfo, false).isValid();
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H A D | ExecutionDepsFix.cpp | 749 for (MCRegAliasIterator AI(RC->getRegister(i), TRI, true);
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/external/llvm/lib/Target/Hexagon/MCTargetDesc/ |
H A D | HexagonMCChecker.cpp | 79 for(MCRegAliasIterator SRI(R, &RI, !MCSubRegIterator(R, &RI).isValid()); 123 for(MCRegAliasIterator SRI(R, &RI, !MCSubRegIterator(R, &RI).isValid()); 176 for(MCRegAliasIterator SRI(R, &RI, !MCSubRegIterator(R, &RI).isValid()); 189 for(MCRegAliasIterator SRI(R2, &RI, !MCSubRegIterator(R2, &RI).isValid());
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/external/llvm/include/llvm/MC/ |
H A D | MCRegisterInfo.h | 627 /// MCRegAliasIterator enumerates all registers aliasing Reg. If IncludeSelf is 630 class MCRegAliasIterator { class in namespace:llvm 640 MCRegAliasIterator(unsigned Reg, const MCRegisterInfo *MCRI, function in class:llvm::MCRegAliasIterator
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/external/llvm/lib/CodeGen/AsmPrinter/ |
H A D | DbgValueHistoryCalculator.cpp | 140 for (MCRegAliasIterator AI(MO.getReg(), TRI, true); AI.isValid(); ++AI)
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/external/llvm/lib/Target/Sparc/ |
H A D | SparcRegisterInfo.cpp | 93 for (MCRegAliasIterator AI(SP::D16 + n, this, true); AI.isValid(); ++AI)
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H A D | DelaySlotFiller.cpp | 332 for (MCRegAliasIterator AI(Reg, Subtarget->getRegisterInfo(), true);
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/external/llvm/lib/Target/Mips/ |
H A D | MipsDelaySlotFiller.cpp | 334 for (MCRegAliasIterator AI(*R, &TRI, true); AI.isValid(); ++AI) 344 for (MCRegAliasIterator AI(R, &TRI, false); AI.isValid(); ++AI) 394 for (MCRegAliasIterator AI(Reg, &TRI, true); AI.isValid(); ++AI)
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/external/llvm/lib/Target/X86/ |
H A D | X86RegisterInfo.cpp | 453 for (MCRegAliasIterator AI(X86::R8 + n, this, true); AI.isValid(); ++AI) 457 for (MCRegAliasIterator AI(X86::XMM8 + n, this, true); AI.isValid(); ++AI) 463 for (MCRegAliasIterator AI(X86::XMM0 + n, this, true); AI.isValid(); ++AI)
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/external/llvm/lib/Target/AArch64/ |
H A D | AArch64CollectLOH.cpp | 354 for (MCRegAliasIterator AI(CurReg, TRI, true); AI.isValid(); ++AI) { 1025 for (MCRegAliasIterator AI(CurReg, TRI, true); AI.isValid(); ++AI)
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H A D | AArch64A57FPLoadBalancing.cpp | 514 MCRegAliasIterator AI(J.getReg(), TRI, /*IncludeSelf=*/true);
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H A D | AArch64LoadStoreOptimizer.cpp | 816 for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI) 820 for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI)
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/external/llvm/lib/Target/AMDGPU/ |
H A D | SIRegisterInfo.cpp | 29 MCRegAliasIterator R(Reg, this, true);
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