| /external/llvm/lib/Target/ARM/ |
| H A D | ARMLoadStoreOptimizer.cpp | 145 void FormCandidates(const MemOpQueue &MemOps);
795 /// Call MergeOps and update MemOps and merges accordingly on success.
920 void ARMLoadStoreOpt::FormCandidates(const MemOpQueue &MemOps) { argument
921 const MachineInstr *FirstMI = MemOps[0].MI;
927 unsigned EIndex = MemOps.size();
930 const MachineInstr *MI = MemOps[SIndex].MI;
931 int Offset = MemOps[SIndex].Offset;
959 int NewOffset = MemOps[I].Offset;
962 const MachineOperand &MO = getLoadStoreRegOp(*MemOps[I].MI);
989 unsigned Position = MemOps[
[all...] |
| H A D | ARMISelLowering.cpp | 3018 SmallVector<SDValue, 4> MemOps; local
3028 MemOps.push_back(Store);
3032 if (!MemOps.empty())
3033 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, MemOps);
|
| /external/llvm/lib/Target/XCore/ |
| H A D | XCoreISelLowering.cpp | 1320 SmallVector<SDValue, 4> MemOps; local
1400 MemOps.push_back(Store);
1428 MemOps.push_back(DAG.getMemcpy(Chain, dl, FIN, ArgDI->SDV,
1439 if (!MemOps.empty()) {
1440 MemOps.push_back(Chain);
1441 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, MemOps);
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAG.cpp | 4156 static bool FindOptimalMemOpLowering(std::vector<EVT> &MemOps, argument
4252 MemOps.push_back(VT);
4283 std::vector<EVT> MemOps; local
4299 if (!FindOptimalMemOpLowering(MemOps, Limit, Size,
4306 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
4326 unsigned NumMemOps = MemOps.size();
4329 EVT VT = MemOps[i];
4396 std::vector<EVT> MemOps; local
4409 if (!FindOptimalMemOpLowering(MemOps, Limit, Size,
4415 Type *Ty = MemOps[
4490 std::vector<EVT> MemOps; local
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| /external/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 2941 SmallVector<SDValue, 8> MemOps; local
2987 MemOps.push_back(Store);
3006 MemOps.push_back(Store);
3014 if (!MemOps.empty())
3015 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, MemOps);
3109 SmallVector<SDValue, 8> MemOps; local
3213 MemOps.push_back(Store);
3240 MemOps.push_back(Store);
3445 MemOps.push_back(Store);
3452 if (!MemOps
3558 SmallVector<SDValue, 8> MemOps; local
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| /external/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 2573 SmallVector<SDValue, 8> MemOps; local
2595 MemOps.push_back(Store);
2625 MemOps.push_back(Store);
2634 if (!MemOps.empty()) {
2635 Chain = DAG.getNode(ISD::TokenFactor, DL, MVT::Other, MemOps);
4199 SmallVector<SDValue, 4> MemOps; local
4203 MemOps.push_back(DAG.getStore(Chain, DL, Stack, VAList,
4218 MemOps.push_back(DAG.getStore(Chain, DL, GRTop, GRTopAddr,
4233 MemOps.push_back(DAG.getStore(Chain, DL, VRTop, VRTopAddr,
4240 MemOps
[all...] |
| /external/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLowering.cpp | 1053 SmallVector<SDValue, 8> MemOps; local
1154 if (!MemOps.empty())
1155 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, MemOps);
|
| /external/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.cpp | 967 SDValue MemOps[SystemZ::NumArgFPRs]; local
975 MemOps[I] = DAG.getStore(ArgValue.getValue(1), DL, ArgValue, FIN,
981 makeArrayRef(&MemOps[NumFixedFPRs],
2710 SDValue MemOps[NumFields];
2717 MemOps[I] = DAG.getStore(Chain, DL, Fields[I], FieldAddr,
2722 return DAG.getNode(ISD::TokenFactor, DL, MVT::Other, MemOps);
|
| /external/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 2857 SmallVector<SDValue, 8> MemOps; local
2870 MemOps.push_back(Store);
2885 MemOps.push_back(DAG.getNode(X86ISD::VASTART_SAVE_XMM_REGS, dl,
2889 if (!MemOps.empty())
2890 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, MemOps);
15848 SmallVector<SDValue, 8> MemOps;
15855 MemOps.push_back(Store);
15863 MemOps.push_back(Store);
15871 MemOps.push_back(Store);
15879 MemOps
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