Searched refs:OpR (Results 1 - 5 of 5) sorted by relevance

/external/llvm/utils/TableGen/
H A DInstrInfoEmitter.cpp109 Record *OpR = cast<DefInit>(MIOI->getArg(j))->getDef(); local
110 OperandList.back().Rec = OpR;
115 Record *OpR = OperandList[j].Rec; local
118 if (OpR->isSubClassOf("RegisterOperand"))
119 OpR = OpR->getValueAsDef("RegClass");
120 if (OpR->isSubClassOf("RegisterClass"))
121 Res += getQualifiedName(OpR) + "RegClassID, ";
122 else if (OpR->isSubClassOf("PointerLikeRegClass"))
123 Res += utostr(OpR
[all...]
/external/llvm/lib/Target/Hexagon/
H A DHexagonVLIWPacketizer.cpp1193 const MachineOperand &OpR = secondRegMatch ? NOp0 : NOp1; local
1194 if (OpR.isReg() && PI->modifiesRegister(OpR.getReg(), HRI)) {
/external/llvm/include/llvm/IR/
H A DPatternMatch.h1285 Value *OpL = nullptr, *OpR = nullptr; local
1298 auto RHS = m_LShr(m_Neg(m_Value(OpR)), m_SpecificInt(ShiftWidth));
1301 return Signum.match(V) && OpL == OpR && Val.match(OpL);
/external/llvm/lib/Transforms/IPO/
H A DMergeFunctions.cpp1181 Value *OpR = InstR->getOperand(i); local
1182 if (int Res = cmpValues(OpL, OpR))
1185 assert(cmpTypes(OpL->getType(), OpR->getType()) == 0);
/external/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeIntegerTypes.cpp947 SDValue OpR = GetPromotedInteger(NewRHS); local
955 OpR->getOpcode() == ISD::AssertSext &&
956 cast<VTSDNode>(OpR->getOperand(1))->getVT() == NewRHS.getValueType()) {
958 NewRHS = OpR;

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