Searched refs:ResultVT (Results 1 - 5 of 5) sorted by relevance
/external/llvm/lib/IR/ |
H A D | ValueTypes.cpp | 42 EVT ResultVT; local 43 ResultVT.LLVMTy = VectorType::get(VT.getTypeForEVT(Context), NumElements); 44 assert(ResultVT.isExtended() && "Type is not extended!"); 45 return ResultVT;
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/external/llvm/lib/CodeGen/SelectionDAG/ |
H A D | LegalizeTypes.cpp | 223 EVT ResultVT = N->getValueType(i); local 224 switch (getTypeAction(ResultVT)) { 245 assert(isLegalInHWReg(ResultVT) &&
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H A D | DAGCombiner.cpp | 12079 EVT ResultVT = EVE->getValueType(0); local 12117 if (ResultVT.bitsGT(VecEltVT)) { 12120 ISD::LoadExtType ExtType = TLI.isLoadExtLegal(ISD::ZEXTLOAD, ResultVT, 12125 ExtType, SDLoc(EVE), ResultVT, OriginalLoad->getChain(), NewPtr, MPI, 12135 if (ResultVT.bitsLT(VecEltVT)) 12136 Load = DAG.getNode(ISD::TRUNCATE, SDLoc(EVE), ResultVT, Load); 12138 Load = DAG.getNode(ISD::BITCAST, SDLoc(EVE), ResultVT, Load);
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/external/llvm/lib/Target/X86/ |
H A D | X86ISelLowering.cpp | 4440 EVT ResultVT = EVT::getVectorVT(*DAG.getContext(), ElVT, local 4445 return DAG.getUNDEF(ResultVT); 4457 return DAG.getNode(ISD::BUILD_VECTOR, dl, ResultVT, 4461 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, ResultVT, Vec, VecIdx); 4494 EVT ResultVT = Result.getValueType(); local 4505 return DAG.getNode(ISD::INSERT_SUBVECTOR, dl, ResultVT, Result, Vec, VecIdx); 4525 EVT ResultVT = Result.getValueType(); local 4527 SDValue Undef = DAG.getUNDEF(ResultVT); 4528 SDValue Vec256 = DAG.getNode(ISD::INSERT_SUBVECTOR, dl, ResultVT, Undef, 4532 MVT ScalarType = ResultVT [all...] |
/external/llvm/lib/Target/AArch64/ |
H A D | AArch64FastISel.cpp | 185 unsigned emitLoad(MVT VT, MVT ResultVT, Address Addr, bool WantZExt = true,
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