Searched refs:Srl (Results 1 - 4 of 4) sorted by relevance

/external/llvm/lib/Target/ARM/
H A DARMISelDAGToDAG.cpp388 SDValue Srl = N1.getOperand(0); local
390 if (!isOpcWithIntImmediate(Srl.getNode(), ISD::SRL, Srl_imm) ||
409 Srl = CurDAG->getNode(ISD::SRL, SDLoc(Srl), MVT::i32,
410 Srl.getOperand(0),
411 CurDAG->getConstant(Srl_imm + TZ, SDLoc(Srl),
414 Srl,
415 CurDAG->getConstant(And_imm, SDLoc(Srl), MVT::i32));
417 N1, CurDAG->getConstant(TZ, SDLoc(Srl), MVT::i32));
/external/llvm/lib/Target/AMDGPU/
H A DAMDGPUISelDAGToDAG.cpp1312 const SDValue &Srl = N->getOperand(0); local
1313 ConstantSDNode *Shift = dyn_cast<ConstantSDNode>(Srl.getOperand(1));
1323 return getS_BFE(AMDGPU::S_BFE_U32, SDLoc(N), Srl.getOperand(0),
/external/llvm/lib/Target/X86/
H A DX86ISelDAGToDAG.cpp935 SDValue Srl = DAG.getNode(ISD::SRL, DL, VT, X, Eight); local
936 SDValue And = DAG.getNode(ISD::AND, DL, VT, Srl, NewMask);
946 insertDAGNode(DAG, N, Srl);
H A DX86ISelLowering.cpp14044 SDValue Srl = DAG.getNode(ISD::SRL, dl, MVT::i16, FNStSW,
14046 SDValue TruncSrl = DAG.getNode(ISD::TRUNCATE, dl, MVT::i8, Srl);
19562 SDValue Srl =
19564 SDValue And = GetMask(Srl, APInt::getSplat(Len, APInt(8, 0x55)));
19569 Srl = DAG.getBitcast(VT, GetShift(ISD::SRL, DAG.getBitcast(SrlVT, V), 2));
19570 SDValue AndRHS = GetMask(Srl, APInt::getSplat(Len, APInt(8, 0x33)));
19574 Srl = DAG.getBitcast(VT, GetShift(ISD::SRL, DAG.getBitcast(SrlVT, V), 4));
19575 SDValue Add = DAG.getNode(ISD::ADD, DL, VT, V, Srl);
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