Searched refs:TVal (Results 1 - 6 of 6) sorted by relevance

/external/llvm/lib/IR/
H A DDebugInfo.cpp206 } else if (auto *TVal = dyn_cast<DITemplateValueParameter>(Element)) {
207 processType(TVal->getType().resolve(TypeIdentifierMap));
/external/llvm/lib/Transforms/Scalar/
H A DSCCP.cpp839 LatticeVal TVal = getValueState(I.getTrueValue()); local
843 if (TVal.isConstant() && FVal.isConstant() &&
844 TVal.getConstant() == FVal.getConstant())
847 if (TVal.isUndefined()) // select ?, undef, X -> X.
850 return mergeInValue(&I, TVal);
/external/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp1685 SDValue TVal = Sel.getOperand(2); local
1694 ConstantSDNode *CTVal = dyn_cast<ConstantSDNode>(TVal);
1703 std::swap(TVal, FVal);
1714 TVal = DAG.getNode(ISD::XOR, dl, Other.getValueType(), Other,
1717 return DAG.getNode(AArch64ISD::CSEL, dl, Sel.getValueType(), FVal, TVal,
1772 SDValue TVal = DAG.getConstant(1, dl, MVT::i32); local
1779 Overflow = DAG.getNode(AArch64ISD::CSEL, dl, MVT::i32, FVal, TVal,
3829 SDValue TVal = DAG.getConstant(1, dl, VT); local
3853 return DAG.getNode(AArch64ISD::CSEL, dl, VT, FVal, TVal, CCVal, Cmp);
3872 return DAG.getNode(AArch64ISD::CSEL, dl, VT, FVal, TVal, CC1Va
3889 LowerSELECT_CC(ISD::CondCode CC, SDValue LHS, SDValue RHS, SDValue TVal, SDValue FVal, SDLoc dl, SelectionDAG &DAG) const argument
4035 SDValue TVal = Op.getOperand(2); local
4044 SDValue TVal = Op->getOperand(1); local
[all...]
H A DAArch64ISelLowering.h466 SDValue TVal, SDValue FVal, SDLoc dl,
/external/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp3438 SDValue TVal = DAG.getConstant(1, dl, MVT::i32); local
3442 SDValue Overflow = DAG.getNode(ARMISD::CMOV, dl, VT, TVal, FVal,
/external/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp24567 ConstantSDNode *TVal = dyn_cast<ConstantSDNode>(SetCC.getOperand(1));
24569 if (!TVal)
24593 // Quit if TVal is not the constant opposite of FVal.
24594 if (FValIsFalse && TVal->getZExtValue() != 1)
24596 if (!FValIsFalse && TVal->getZExtValue() != 0)
[all...]

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