| /external/llvm/lib/Target/AArch64/MCTargetDesc/ |
| H A D | AArch64AddressingModes.h | 40 UXTB, enumerator in enum:llvm::AArch64_AM::ShiftExtendType
60 case AArch64_AM::UXTB: return "uxtb";
127 case 0: return AArch64_AM::UXTB;
154 case AArch64_AM::UXTB: return 0; break;
|
| /external/v8/test/cctest/ |
| H A D | test-disasm-arm64.cc | 154 COMPARE(Mov(w10, Operand(w11, UXTB)), "uxtb w10, w11");
155 COMPARE(Mov(x12, Operand(x13, UXTB, 1)), "ubfiz x12, x13, #1, #8");
389 COMPARE(add(w0, w1, Operand(w2, UXTB)), "add w0, w1, w2, uxtb");
390 COMPARE(adds(x3, x4, Operand(w5, UXTB, 1)), "adds x3, x4, w5, uxtb #1");
399 COMPARE(cmn(w0, Operand(w1, UXTB, 2)), "cmn w0, w1, uxtb #2");
402 COMPARE(add(w0, wcsp, Operand(w1, UXTB)), "add w0, wcsp, w1, uxtb");
415 COMPARE(sub(w0, w1, Operand(w2, UXTB)), "sub w0, w1, w2, uxtb");
416 COMPARE(subs(x3, x4, Operand(w5, UXTB, 1)), "subs x3, x4, w5, uxtb #1");
428 COMPARE(sub(w0, wcsp, Operand(w1, UXTB)), "sub w0, wcsp, w1, uxtb");
|
| H A D | test-assembler-arm64.cc | 307 __ Mvn(w10, Operand(w2, UXTB));
380 __ Mov(w23, Operand(w13, UXTB));
564 __ Orr(w6, w0, Operand(w1, UXTB));
661 __ Orn(w6, w0, Operand(w1, UXTB));
730 __ And(w6, w0, Operand(w1, UXTB));
871 __ Bic(w6, w0, Operand(w1, UXTB));
999 __ Eor(w6, w0, Operand(w1, UXTB));
1068 __ Eon(w6, w0, Operand(w1, UXTB));
3595 __ Add(x10, x0, Operand(x1, UXTB, 0));
3596 __ Add(x11, x0, Operand(x1, UXTB,
[all...] |
| /external/v8/src/compiler/arm64/ |
| H A D | code-generator-arm64.cc | 97 return Operand(InputRegister32(index), UXTB);
125 return Operand(InputRegister64(index), UXTB);
|
| /external/llvm/test/MC/ARM/ |
| H A D | basic-thumb-instructions.s | 656 @ UXTB/UXTH
|
| H A D | v8_IT_manual.s | 541 @ UXTB, encoding T1
545 @ UXTB, encoding T2 (32-bit)
|
| H A D | basic-arm-instructions.s | 3482 @ UXTB
|
| H A D | basic-thumb2-instructions.s | 3631 @ UXTB
|
| /external/vixl/test/ |
| H A D | test-disasm-a64.cc | 159 COMPARE(Mov(w10, Operand(w11, UXTB)), "uxtb w10, w11");
160 COMPARE(Mov(x12, Operand(x13, UXTB, 1)), "ubfiz x12, x13, #1, #8");
388 COMPARE(add(w0, w1, Operand(w2, UXTB)), "add w0, w1, w2, uxtb");
389 COMPARE(adds(x3, x4, Operand(w5, UXTB, 1)), "adds x3, x4, w5, uxtb #1");
398 COMPARE(cmn(w0, Operand(w1, UXTB, 2)), "cmn w0, w1, uxtb #2");
401 COMPARE(add(w0, wsp, Operand(w1, UXTB)), "add w0, wsp, w1, uxtb");
414 COMPARE(sub(w0, w1, Operand(w2, UXTB)), "sub w0, w1, w2, uxtb");
415 COMPARE(subs(x3, x4, Operand(w5, UXTB, 1)), "subs x3, x4, w5, uxtb #1");
427 COMPARE(sub(w0, wsp, Operand(w1, UXTB)), "sub w0, wsp, w1, uxtb");
|
| H A D | test-assembler-a64.cc | 300 __ Mvn(w10, Operand(w2, UXTB));
473 __ Mov(w23, Operand(w13, UXTB));
558 __ Orr(w6, w0, Operand(w1, UXTB));
652 __ Orn(w6, w0, Operand(w1, UXTB));
719 __ And(w6, w0, Operand(w1, UXTB));
857 __ Bic(w6, w0, Operand(w1, UXTB));
981 __ Eor(w6, w0, Operand(w1, UXTB));
1048 __ Eon(w6, w0, Operand(w1, UXTB));
7457 __ Add(x10, x0, Operand(x1, UXTB, 0));
7458 __ Add(x11, x0, Operand(x1, UXTB,
[all...] |
| /external/pcre/dist/sljit/ |
| H A D | sljitNativeARM_T2_32.c | 165 #define UXTB 0xb2c0 macro
695 return push_inst16(compiler, UXTB | RD3(dst) | RN3(arg2));
|
| H A D | sljitNativeARM_32.c | 123 #define UXTB 0xe6ef0070 macro
1014 return push_inst(compiler, (op == SLJIT_MOV_UB ? UXTB : SXTB) | RD(dst) | RM(src2));
|
| /external/llvm/lib/Target/AArch64/Utils/ |
| H A D | AArch64BaseInfo.h | 505 UXTB, enumerator in enum:llvm::AArch64SE::ShiftExtSpecifiers
|
| /external/v8/src/arm64/ |
| H A D | constants-arm64.h | 339 UXTB = 0, enumerator in enum:v8::internal::Extend
|
| H A D | assembler-arm64.cc | 2421 case UXTB:
|
| H A D | simulator-arm64.cc | 946 case UXTB:
|
| H A D | macro-assembler-arm64.cc | 2117 Cmp(input.W(), Operand(input.W(), UXTB));
|
| /external/vixl/src/vixl/a64/ |
| H A D | constants-a64.h | 276 UXTB = 0, enumerator in enum:vixl::Extend
|
| H A D | simulator-a64.cc | 355 case UXTB:
|
| H A D | assembler-a64.cc | 4859 case UXTB:
|
| /external/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelDAGToDAG.cpp | 387 return AArch64_AM::UXTB;
405 return !IsLoadStore ? AArch64_AM::UXTB : AArch64_AM::InvalidShiftExtend;
|
| H A D | AArch64FastISel.cpp | 1102 ExtendType = IsZExt ? AArch64_AM::UXTB : AArch64_AM::SXTB;
|
| /external/llvm/lib/Target/AArch64/AsmParser/ |
| H A D | AArch64AsmParser.cpp | 1002 return (ET == AArch64_AM::UXTB || ET == AArch64_AM::SXTB ||
2412 .Case("uxtb", AArch64_AM::UXTB)
|
| /external/llvm/lib/Target/ARM/ |
| H A D | ARMFastISel.cpp | 2893 { { ARM::UXTB, ARM::t2UXTB }, 0, 1, MVT::i8 }
|
| /external/valgrind/none/tests/arm/ |
| H A D | v6intThumb.stdout.exp | 343 UXTB-16 0x2CB
[all...] |