Searched refs:fminnmv (Results 1 - 11 of 11) sorted by relevance

/external/llvm/test/MC/AArch64/
H A Dneon-across.s94 fminnmv h0, v1.4h
98 fminnmv h0, v1.8h
102 fminnmv s0, v1.4s
107 // CHECK: fminnmv h0, v1.4h // encoding: [0x20,0xc8,0xb0,0x0e]
111 // CHECK: fminnmv h0, v1.8h // encoding: [0x20,0xc8,0xb0,0x4e]
115 // CHECK: fminnmv s0, v1.4s // encoding: [0x20,0xc8,0xb0,0x6e]
H A Dfullfp16-neon-neg.s74 fminnmv h0, v1.8h
H A Dneon-diagnostics.s3818 fminnmv b0, v1.16b
3826 // CHECK-ERROR: fminnmv b0, v1.16b
3836 fminnmv h0, v1.8h
3844 // CHECK-ERROR: fminnmv h0, v1.8h
3854 fminnmv d0, v1.2d
3862 // CHECK-ERROR: fminnmv d0, v1.2d
/external/vixl/src/vixl/a64/
H A Dsimulator-a64.h2389 LogicVRegister fminnmv(VectorFormat vform,
H A Dassembler-a64.h3027 void fminnmv(const VRegister& vd,
H A Dmacro-assembler-a64.h2273 V(fminnmv, Fminnmv) \
H A Dsimulator-a64.cc2771 case NEON_FMINNMV: fminnmv(vf, rd, rn); break;
H A Dassembler-a64.cc4066 V(fminnmv, NEON_FMINNMV, vd.Is1S()) \
H A Dlogic-a64.cc4269 LogicVRegister Simulator::fminnmv(VectorFormat vform, function in class:vixl::Simulator
/external/vixl/test/
H A Dtest-simulator-a64.cc4047 DEFINE_TEST_NEON_ACROSS_FP(fminnmv, Basic)
/external/valgrind/none/tests/arm64/
H A Dfp_and_simd.stdout.exp26526 fminnmv s2, v23.4s c595bfd49dbccd2eb43572bb95b66522 66aca57d313a184ca7c8b93143a2eb96 000000000000000000000000a7c8b931 66aca57d313a184ca7c8b93143a2eb96 fpsr=00000000
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