| /external/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SDNodeDbgValue.h | 94 unsigned getResNo() const { assert (kind==SDNODE); return u.s.ResNo; } function in class:llvm::SDDbgValue
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| H A D | SelectionDAGPrinter.cpp | 71 std::advance(NI, I.getNode()->getOperand(I.getOperand()).getResNo());
138 GW.emitEdge(nullptr, -1, G->getRoot().getNode(), G->getRoot().getResNo(),
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| H A D | InstrEmitter.cpp | 115 User->getOperand(2).getResNo() == ResNo) {
125 if (Op.getNode() != Node || Op.getResNo() != ResNo)
127 MVT VT = Node->getSimpleValueType(Op.getResNo());
198 User->getOperand(2).getResNo() == ResNo) {
247 User->getOperand(2).getResNo() == i) {
288 unsigned VReg = getDstOfOnlyCopyToRegUse(Op.getNode(), Op.getResNo());
672 SDValue Op = SDValue(Node, SD->getResNo());
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| H A D | ResourcePriorityQueue.cpp | 134 MVT VT = Op.getNode()->getSimpleValueType(Op.getResNo());
343 MVT VT = Op.getNode()->getSimpleValueType(Op.getResNo());
497 MVT VT = Op.getNode()->getSimpleValueType(Op.getResNo());
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| H A D | ScheduleDAGSDNodes.cpp | 121 unsigned ResNo = User->getOperand(2).getResNo();
634 unsigned DefIdx = Use->getOperand(OpIdx).getResNo();
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| H A D | SelectionDAG.cpp | 366 ID.AddInteger(Op.getResNo());
376 ID.AddInteger(Op.getResNo());
2156 if (Op.getResNo() != 1)
2282 if (ISD::isZEXTLoad(Op.getNode()) && Op.getResNo() == 0) {
2617 if (Op.getResNo() != 1)
2724 if (Op.getResNo() == 0) {
6306 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 &&
6390 setRoot(SDValue(To, getRoot().getResNo()));
6418 const SDValue &ToOp = To[Use.getResNo()];
6430 setRoot(SDValue(To[getRoot().getResNo()]));
[all...] |
| H A D | SelectionDAGBuilder.cpp | 734 getCopyToParts(DAG, dl, Val.getValue(Val.getResNo() + Value),
957 SDV = DAG.getDbgValue(Variable, Expr, Val.getNode(), Val.getResNo(),
1340 SDValue(RetOp.getNode(), RetOp.getResNo() + i),
1378 SDValue(RetOp.getNode(), RetOp.getResNo() + j),
2531 Ops.push_back(SDValue(LHSVal.getNode(), LHSVal.getResNo() + i));
2532 Ops.push_back(SDValue(RHSVal.getNode(), RHSVal.getResNo() + i));
2534 LHSVal.getNode()->getValueType(LHSVal.getResNo()+i),
2919 SDValue(Agg.getNode(), Agg.getResNo() + i);
2925 SDValue(Val.getNode(), Val.getResNo() + i - LinearIndex);
2930 SDValue(Agg.getNode(), Agg.getResNo()
[all...] |
| H A D | LegalizeVectorOps.cpp | 182 return Result.getValue(Op.getResNo());
642 return (Op.getResNo() ? NewChain : Value);
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| H A D | ScheduleDAGFast.cpp | 231 MVT VT = Op.getNode()->getSimpleValueType(Op.getResNo());
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| H A D | SelectionDAGDumper.cpp | 627 if (unsigned RN = Value.getResNo())
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| H A D | LegalizeTypes.cpp | 91 if (UI.getUse().getResNo() == i)
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| H A D | ScheduleDAGRRList.cpp | 964 MVT VT = Op.getNode()->getSimpleValueType(Op.getResNo());
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| H A D | SelectionDAGISel.cpp | 1829 if (Use.getResNo() == FlagResNo)
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| H A D | DAGCombiner.cpp | 5794 if (UI.getUse().getResNo() != N0.getResNo())
5829 if (Use.getResNo() == 0 && Use.getUser()->getOpcode() == ISD::CopyToReg) {
7212 return Elt.getOperand(Elt.getResNo()).getNode();
10524 if (UI.getUse().getResNo() != 0)
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| /external/llvm/utils/TableGen/ |
| H A D | DAGISelMatcher.cpp | 393 if (CT->getResNo() >= getOpcode().getNumResults())
396 MVT::SimpleValueType NodeType = getOpcode().getKnownType(CT->getResNo());
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| H A D | DAGISelMatcherOpt.cpp | 53 CT->getResNo() == 0) // CheckChildType checks res #0
436 CTM->getResNo() != 0 ||
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| H A D | DAGISelMatcherEmitter.cpp | 381 assert(cast<CheckTypeMatcher>(N)->getResNo() == 0 &&
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| H A D | DAGISelMatcher.h | 538 unsigned getResNo() const { return ResNo; } function in class:llvm::CheckTypeMatcher
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| /external/llvm/include/llvm/CodeGen/ |
| H A D | SelectionDAGNodes.h | 111 unsigned getResNo() const { return ResNo; } function in class:llvm::SDValue
201 (unsigned)((uintptr_t)Val.getNode() >> 9)) + Val.getResNo();
260 /// Convenience function for get().getResNo().
261 unsigned getResNo() const { return Val.getResNo(); } function in class:llvm::SDUse
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| /external/llvm/lib/Target/X86/ |
| H A D | X86ISelDAGToDAG.cpp | 1237 if (N.getResNo() != 0) break;
2028 if (FlagUI.getUse().getResNo() != 1) continue;
2083 if (StoredVal.getResNo() != 0) return false;
2137 if (UI.getUse().getResNo() != 0)
2796 (N0.getResNo() == 0 && N0.getNode()->getOpcode() == X86ISD::AND)) &&
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| H A D | X86ISelLowering.cpp | 13803 if (Op.getResNo() != 0 || NeedOF || NeedCF) {
14776 if (Op.getResNo() == 1 &&
14790 if (Op.getResNo() == 2 && Opc == X86ISD::UMUL)
15469 Cond.getOperand(0).getResNo() == 1 &&
22548 if (Op.getResNo() == 0)
23823 if (UI.getUse().getResNo() != InputVector.getResNo())
24581 Op.getOpcode() != X86ISD::RDSEED) || Op.getResNo() != 0)
[all...] |
| /external/llvm/lib/Target/Mips/ |
| H A D | MipsSEISelLowering.cpp | 415 if (MultHi.getResNo() != 1 || MultLo.getResNo() != 0)
487 if (MultHi.getResNo() != 1 || MultLo.getResNo() != 0)
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| /external/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 3457 if (Cond.getResNo() == 1 &&
9255 Op0.getResNo() == 0 && Op1.getResNo() == 1)
9502 UI.getUse().getResNo() != Addr.getResNo())
9737 if (UI.getUse().getResNo() == NumVecs)
9761 unsigned ResNo = UI.getUse().getResNo();
11176 if (Op.getResNo() == 0)
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| /external/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 3602 if (LHS.getResNo() == 1 && isOneConstant(RHS) &&
4051 if (CCVal.getResNo() == 1 &&
8685 if (UI.getUse().getResNo() == 1) // Ignore uses of the chain result.
8698 || UI.getUse().getResNo() != Addr.getResNo())
9065 UI.getUse().getResNo() != Addr.getResNo())
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| /external/llvm/lib/Target/XCore/ |
| H A D | XCoreISelLowering.cpp | 1864 if (Op.getResNo() == 1) {
|