| /external/mesa3d/src/gallium/drivers/nv50/codegen/ |
| H A D | nv50_ir_build_util.h | 88 ImmediateValue *mkImm(float);
89 ImmediateValue *mkImm(uint32_t);
90 ImmediateValue *mkImm(uint64_t);
92 ImmediateValue *mkImm(int i) { return mkImm((uint32_t)i); } function in class:nv50_ir::BuildUtil
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| H A D | nv50_ir_build_util.cpp | 354 BuildUtil::mkImm(uint32_t u) function in class:nv50_ir::BuildUtil
370 BuildUtil::mkImm(uint64_t u) function in class:nv50_ir::BuildUtil
382 BuildUtil::mkImm(float f) function in class:nv50_ir::BuildUtil
389 return mkImm(u.u32);
395 return mkOp1v(OP_MOV, TYPE_F32, dst ? dst : getScratch(), mkImm(f));
401 return mkOp1v(OP_MOV, TYPE_U32, dst ? dst : getScratch(), mkImm(u));
407 return mkOp1v(OP_MOV, TYPE_U64, dst ? dst : getScratch(8), mkImm(u));
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| H A D | nv50_ir_lowering_nv50.cpp | 74 i[7] = bld->mkOp2(OP_SHL, fTy, t[2], t[1], bld->mkImm(halfSize * 8));
85 i[8] = bld->mkOp2(OP_SHR, fTy, r[0], t[1], bld->mkImm(halfSize * 8));
348 arl = bld.mkOp2(OP_SHL, TYPE_U32, i->getDef(0), bld.getSSA(), bld.mkImm(0));
415 bf = bld.mkOp2v(OP_ADD, TYPE_U32, bld.getSSA(), bf, bld.mkImm(-2));
908 bld.mkOp2(OP_AND, TYPE_U32, def, def, bld.mkImm(0x80000000));
909 bld.mkOp2(OP_XOR, TYPE_U32, def, def, bld.mkImm(0xbf800000));
917 bld.mkMov(def, bld.mkImm(1));
919 bld.mkMov(def, bld.mkImm(0));
929 bld.mkOp2(OP_AND, TYPE_U32, def, tid, bld.mkImm(0x0000ffff));
931 bld.mkOp2(OP_AND, TYPE_U32, def, tid, bld.mkImm(
[all...] |
| H A D | nv50_ir_from_tgsi.cpp | 1251 vtxBase[s] = mkOp2v(OP_PFETCH, TYPE_U32, getSSA(), mkImm(index), rel);
1382 mkOp2(OP_MAX, dstTy, val, val, mkImm(-1.0f));
1383 mkOp2(OP_MIN, dstTy, val, val, mkImm(+1.0f));
1817 mkOp2(OP_SHL, TYPE_U32, dst0[c], dst0[c], mkImm(4));
1822 mkOp2(OP_SHL, TYPE_U32, dst0[c], fetchSrc(0, c), mkImm(4));
2067 mkImm(tgsi.getSrc(0).getValueU32(0, info)) : zero;
2337 zero = mkImm((uint32_t)0);
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| H A D | nv50_ir_from_sm4.cpp | 1150 srcPtr[s][dim] = mkOp2v(OP_SHL, TYPE_U32, getSSA(), index, mkImm(shl));
1167 index = mkOp2v(OP_SHL, TYPE_U32, getSSA(), index, mkImm(shl));
1185 vtxBase[s] = mkOp2v(OP_PFETCH, TYPE_U32, getSSA(), mkImm(idx), vtxBase[s]);
1940 mkOp1(OP_RESTART, TYPE_U32, NULL, mkImm(0))->fixed = 1;
1944 mkOp1(OP_EMIT, TYPE_U32, NULL, mkImm(0))->fixed = 1;
1949 Instruction *cut = mkOp1(OP_EMIT, TYPE_U32, NULL, mkImm(0));
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| H A D | nv50_ir_peephole.cpp | 686 i->setSrc(1, bld.mkImm(util_logbase2(imm0.reg.data.u32)));
709 bld.mkOp2(OP_SHR, TYPE_U32, tA, tB, bld.mkImm(r));
715 bld.mkOp2(OP_SHR, TYPE_U32, i->getDef(0), tB, bld.mkImm(s));
739 bld.mkOp2(OP_SHR, TYPE_S32, tB, tA, bld.mkImm(l - 1));
743 bld.mkCmp(OP_SET, CC_LT, TYPE_S32, tA, i->getSrc(0), bld.mkImm(0));
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| /external/mesa3d/src/gallium/drivers/nvc0/codegen/ |
| H A D | nv50_ir_lowering_nvc0.cpp | 724 bld.mkOp3(OP_INSBF, TYPE_U32, src, ticRel, bld.mkImm(0x0917), src);
728 bld.mkOp3(OP_INSBF, TYPE_U32, src, tscRel, bld.mkImm(0x0710), src);
912 bld.mkOp2(OP_AND, TYPE_U32, face, face, bld.mkImm(0x80000000));
913 bld.mkOp2(OP_XOR, TYPE_U32, face, face, bld.mkImm(0xbf800000));
923 vtx = bld.mkOp1v(OP_PFETCH, TYPE_U32, bld.getSSA(), bld.mkImm(0));
1041 bld.mkCmp(OP_SET, CC_NEU, TYPE_U32, pdst, bld.mkImm(0), pred);
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