/external/deqp/external/vulkancts/modules/vulkan/api/ |
H A D | vktApiBufferComputeInstance.hpp | 51 deUint32 offsetB,
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H A D | vktApiBufferComputeInstance.cpp | 115 deUint32 offsetB, 126 vk::makeDescriptorBufferInfo(viewB, (vk::VkDeviceSize)offsetB, (vk::VkDeviceSize)sizeof(tcu::Vec4[2])), 110 createDescriptorSet(VkDescriptorPool pool, VkDescriptorSetLayout layout, VkBuffer viewA, deUint32 offsetA, VkBuffer viewB, deUint32 offsetB, VkBuffer resBuf, vkt::Context& context) argument
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/external/valgrind/VEX/priv/ |
H A D | host_arm64_defs.c | 2505 HReg rreg, Int offsetB, Bool mode64 ) 2508 vassert(offsetB >= 0); 2515 vassert(0 == (offsetB & 7)); 2516 offsetB >>= 3; 2517 vassert(offsetB < 4096); 2521 ARM64AMode_RI12(hregARM64_X21(), offsetB, 8) 2525 vassert(0 == (offsetB & 7)); 2526 vassert(offsetB >= 0 && offsetB < 32768); 2528 rreg, hregARM64_X21(), offsetB); 2504 genSpill_ARM64( HInstr** i1, HInstr** i2, HReg rreg, Int offsetB, Bool mode64 ) argument 2545 genReload_ARM64( HInstr** i1, HInstr** i2, HReg rreg, Int offsetB, Bool mode64 ) argument [all...] |
H A D | host_arm_defs.c | 2557 HReg rreg, Int offsetB, Bool mode64 ) 2560 vassert(offsetB >= 0); 2567 vassert(offsetB <= 4095); 2570 ARMAMode1_RI(hregARM_R8(), offsetB) ); 2577 vassert(0 == (offsetB & 3)); 2578 if (offsetB >= 1024) { 2579 Int offsetKB = offsetB / 1024; 2583 offsetB -= (1024 * offsetKB); 2586 vassert(offsetB <= 1020); 2590 mkARMAModeV(base, offsetB) ); 2556 genSpill_ARM( HInstr** i1, HInstr** i2, HReg rreg, Int offsetB, Bool mode64 ) argument 2611 genReload_ARM( HInstr** i1, HInstr** i2, HReg rreg, Int offsetB, Bool mode64 ) argument [all...] |
H A D | host_tilegx_defs.c | 1202 Int offsetB ) 1205 vassert(offsetB >= 0); 1208 am = TILEGXAMode_IR(offsetB, TILEGXGuestStatePointer()); 1224 Int offsetB ) 1228 am = TILEGXAMode_IR(offsetB, TILEGXGuestStatePointer());
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H A D | host_ppc_defs.h | 1124 HReg rreg, Int offsetB, Bool mode64 ); 1126 HReg rreg, Int offsetB, Bool mode64 );
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H A D | host_amd64_defs.c | 1955 HReg rreg, Int offsetB, Bool mode64 ) 1958 vassert(offsetB >= 0); 1962 am = AMD64AMode_IR(offsetB, hregAMD64_RBP()); 1977 HReg rreg, Int offsetB, Bool mode64 ) 1980 vassert(offsetB >= 0); 1984 am = AMD64AMode_IR(offsetB, hregAMD64_RBP()); 1954 genSpill_AMD64( HInstr** i1, HInstr** i2, HReg rreg, Int offsetB, Bool mode64 ) argument 1976 genReload_AMD64( HInstr** i1, HInstr** i2, HReg rreg, Int offsetB, Bool mode64 ) argument
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H A D | host_x86_defs.c | 1706 HReg rreg, Int offsetB, Bool mode64 ) 1709 vassert(offsetB >= 0); 1713 am = X86AMode_IR(offsetB, hregX86_EBP()); 1731 HReg rreg, Int offsetB, Bool mode64 ) 1734 vassert(offsetB >= 0); 1738 am = X86AMode_IR(offsetB, hregX86_EBP()); 1705 genSpill_X86( HInstr** i1, HInstr** i2, HReg rreg, Int offsetB, Bool mode64 ) argument 1730 genReload_X86( HInstr** i1, HInstr** i2, HReg rreg, Int offsetB, Bool mode64 ) argument
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H A D | host_mips_defs.c | 1972 Int offsetB, Bool mode64) 1975 vassert(offsetB >= 0); 1978 am = MIPSAMode_IR(offsetB, GuestStatePointer(mode64)); 2004 Int offsetB, Bool mode64) 2008 am = MIPSAMode_IR(offsetB, GuestStatePointer(mode64)); 1971 genSpill_MIPS( HInstr ** i1, HInstr ** i2, HReg rreg, Int offsetB, Bool mode64) argument 2003 genReload_MIPS( HInstr ** i1, HInstr ** i2, HReg rreg, Int offsetB, Bool mode64) argument
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H A D | host_ppc_defs.c | 2995 HReg rreg, Int offsetB, Bool mode64 ) 3000 am = PPCAMode_IR( offsetB, GuestStatePtr(mode64) ); 3025 HReg rreg, Int offsetB, Bool mode64 ) 3030 am = PPCAMode_IR( offsetB, GuestStatePtr(mode64) ); 2994 genSpill_PPC( HInstr** i1, HInstr** i2, HReg rreg, Int offsetB, Bool mode64 ) argument 3024 genReload_PPC( HInstr** i1, HInstr** i2, HReg rreg, Int offsetB, Bool mode64 ) argument
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H A D | host_s390_defs.c | 470 genSpill_S390(HInstr **i1, HInstr **i2, HReg rreg, Int offsetB, Bool mode64) argument 474 vassert(offsetB >= 0); 479 am = s390_amode_for_guest_state(offsetB); 496 genReload_S390(HInstr **i1, HInstr **i2, HReg rreg, Int offsetB, Bool mode64) argument 500 vassert(offsetB >= 0); 505 am = s390_amode_for_guest_state(offsetB);
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/external/pdfium/third_party/lcms2-2.6/src/ |
H A D | cmstypes.c | 2462 cmsUInt32Number offsetB; // Offset to first "B" curve local 2477 if (!_cmsReadUInt32Number(io, &offsetB)) return NULL; 2507 if (offsetB != 0) { 2508 if (!cmsPipelineInsertStage(NewLUT, cmsAT_END, ReadSetOfCurves(self, io, BaseOffset + offsetB, outputChan))) 2669 cmsUInt32Number offsetB = 0, offsetMat = 0, offsetM = 0, offsetC = 0, offsetA = 0; local 2729 offsetB = io ->Tell(io) - BaseOffset; 2737 if (!_cmsWriteUInt32Number(io, offsetB)) return FALSE; 2778 cmsUInt32Number offsetB; // Offset to first "B" curve local 2794 if (!_cmsReadUInt32Number(io, &offsetB)) return NULL; 2804 if (offsetB ! 2854 cmsUInt32Number offsetB = 0, offsetMat = 0, offsetM = 0, offsetC = 0, offsetA = 0; local [all...] |
/external/eigen/Eigen/src/Core/products/ |
H A D | GeneralBlockPanelKernel.h | 532 Index strideA=-1, Index strideB=-1, Index offsetA=0, Index offsetB=0, RhsScalar* unpackedB=0); 539 Index strideA, Index strideB, Index offsetA, Index offsetB, RhsScalar* unpackedB) 559 traits.unpackRhs(depth*nr,&blockB[j2*strideB+offsetB*nr],unpackedB); 966 const RhsScalar* blB = &blockB[j2*strideB+offsetB*nr]; 1010 traits.unpackRhs(depth, &blockB[j2*strideB+offsetB], unpackedB); 1088 const RhsScalar* blB = &blockB[j2*strideB+offsetB]; 538 operator ()(ResScalar* res, Index resStride, const LhsScalar* blockA, const RhsScalar* blockB, Index rows, Index depth, Index cols, ResScalar alpha, Index strideA, Index strideB, Index offsetA, Index offsetB, RhsScalar* unpackedB) argument
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/external/deqp/external/vulkancts/modules/vulkan/binding_model/ |
H A D | vktBindingShaderAccessTests.cpp | 1357 deUint32 offsetB) 1362 vk::makeDescriptorBufferInfo(bufferB, (vk::VkDeviceSize)offsetB, (vk::VkDeviceSize)BUFFER_DATA_SIZE), 1833 vk::Move<vk::VkDescriptorSet> createDescriptorSet (vk::VkDescriptorPool pool, vk::VkDescriptorSetLayout layout, vk::VkBuffer viewA, deUint32 offsetA, vk::VkBuffer viewB, deUint32 offsetB, vk::VkBuffer resBuf) const; 1954 vk::Move<vk::VkDescriptorSet> BufferComputeInstance::createDescriptorSet (vk::VkDescriptorPool pool, vk::VkDescriptorSetLayout layout, vk::VkBuffer viewA, deUint32 offsetA, vk::VkBuffer viewB, deUint32 offsetB, vk::VkBuffer resBuf) const argument 1960 vk::makeDescriptorBufferInfo(viewB, (vk::VkDeviceSize)offsetB, (vk::VkDeviceSize)sizeof(tcu::Vec4[2])), 1348 createDescriptorSet(const vk::DeviceInterface& vki, vk::VkDevice device, vk::VkDescriptorSetLayout descriptorSetLayout, vk::VkDescriptorPool descriptorPool, vk::VkDescriptorType descriptorType, ShaderInputInterface shaderInterface, vk::VkBuffer bufferA, deUint32 offsetA, vk::VkBuffer bufferB, deUint32 offsetB) argument
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