| /external/llvm/test/MC/AArch64/ |
| H A D | neon-scalar-shift.s | 13 ushl d17, d31, d8
15 // CHECK: ushl d17, d31, d8 // encoding: [0xf1,0x47,0xe8,0x7e]
|
| H A D | neon-shift.s | 28 ushl v0.8b, v1.8b, v2.8b
29 ushl v0.16b, v1.16b, v2.16b
30 ushl v0.4h, v1.4h, v2.4h
31 ushl v0.8h, v1.8h, v2.8h
32 ushl v0.2s, v1.2s, v2.2s
33 ushl v0.4s, v1.4s, v2.4s
34 ushl v0.2d, v1.2d, v2.2d
36 // CHECK: ushl v0.8b, v1.8b, v2.8b // encoding: [0x20,0x44,0x22,0x2e]
37 // CHECK: ushl v0.16b, v1.16b, v2.16b // encoding: [0x20,0x44,0x22,0x6e]
38 // CHECK: ushl v
[all...] |
| H A D | neon-diagnostics.s | 916 ushl v1.16b, v25.16b, v6.8h
922 // CHECK-ERROR: ushl v1.16b, v25.16b, v6.8h
972 ushl b2, b0, b1
978 // CHECK-ERROR: ushl b2, b0, b1
|
| H A D | arm64-advsimd.s | 370 ushl.8b v0, v0, v0
441 ; CHECK: ushl.8b v0, v0, v0 ; encoding: [0x00,0x44,0x20,0x2e]
|
| /external/libavc/common/armv8/ |
| H A D | ih264_resi_trans_quant_av8.s | 586 ushl v14.4s, v14.4s, v22.4s
587 ushl v15.4s, v15.4s, v22.4s
588 ushl v16.4s, v16.4s, v22.4s
589 ushl v17.4s, v17.4s, v22.4s
698 ushl v2.4s, v25.4s, v24.4s //>>qbit
699 ushl v3.4s, v26.4s, v24.4s //>>qbit
|
| /external/vixl/src/vixl/a64/ |
| H A D | simulator-a64.cc | 2643 case NEON_USHL: ushl(vf, rd, rn, rm); break;
2654 case NEON_UQSHL: ushl(vf, rd, rn, rm).UnsignedSaturate(vf); break;
2656 case NEON_URSHL: ushl(vf, rd, rn, rm).Round(vf); break;
2659 ushl(vf, rd, rn, rm).Round(vf).UnsignedSaturate(vf);
3519 case NEON_USHL_scalar: ushl(vf, rd, rn, rm); break;
3536 ushl(vf, rd, rn, rm).UnsignedSaturate(vf);
3542 ushl(vf, rd, rn, rm).Round(vf);
3548 ushl(vf, rd, rn, rm).Round(vf).UnsignedSaturate(vf);
|
| H A D | logic-a64.cc | 1612 return ushl(vform, dst, src, shiftreg);
1664 return ushl(vform, dst, extendedreg, shiftreg);
1676 return ushl(vform, dst, extendedreg, shiftreg);
1715 return ushl(vform, dst, src, shiftreg).UnsignedSaturate(vform);
1763 return ushl(vform, dst, src, shiftreg);
1923 LogicVRegister Simulator::ushl(VectorFormat vform, function in class:vixl::Simulator
|
| H A D | simulator-a64.h | 1724 LogicVRegister ushl(VectorFormat vform,
|
| H A D | assembler-a64.h | 2554 void ushl(const VRegister& vd,
|
| H A D | macro-assembler-a64.h | 2229 V(ushl, Ushl) \
|
| H A D | assembler-a64.cc | 3213 V(ushl, NEON_USHL, vd.IsVector() || vd.Is1D()) \
|
| /external/vixl/test/ |
| H A D | test-simulator-a64.cc | 3757 DEFINE_TEST_NEON_3SAME(ushl, Basic)
3810 DEFINE_TEST_NEON_3SAME_SCALAR_D(ushl, Basic)
|
| /external/valgrind/none/tests/arm64/ |
| H A D | fp_and_simd.stdout.exp | [all...] |