/external/llvm/test/MC/ARM/ |
H A D | load-store-acquire-release-v8.s | 8 @ CHECK: ldaexb r3, [r4] @ encoding: [0x9f,0x3e,0xd4,0xe1] 9 @ CHECK: ldaexh r2, [r5] @ encoding: [0x9f,0x2e,0xf5,0xe1] 10 @ CHECK: ldaex r1, [r7] @ encoding: [0x9f,0x1e,0x97,0xe1] 11 @ CHECK: ldaexd r6, r7, [r8] @ encoding: [0x9f,0x6e,0xb8,0xe1] 21 @ CHECK: stlexb r1, r3, [r4] @ encoding: [0x93,0x1e,0xc4,0xe1] 22 @ CHECK: stlexh r4, r2, [r5] @ encoding: [0x92,0x4e,0xe5,0xe1] 23 @ CHECK: stlex r2, r1, [r7] @ encoding: [0x91,0x2e,0x87,0xe1] 24 @ CHECK: stlexd r6, r2, r3, [r8] @ encoding: [0x92,0x6e,0xa8,0xe1] 33 @ CHECK: lda r5, [r6] @ encoding: [0x9f,0x5c,0x96,0xe1] 34 @ CHECK: ldab r5, [r6] @ encoding: [0x9f,0x5c,0xd6,0xe1] [all...] |
H A D | move-banked-regs.s | 11 @ CHECK-ARM: mrs r2, r8_usr @ encoding: [0x00,0x22,0x00,0xe1] 12 @ CHECK-ARM: mrs r3, r9_usr @ encoding: [0x00,0x32,0x01,0xe1] 13 @ CHECK-ARM: mrs r5, r10_usr @ encoding: [0x00,0x52,0x02,0xe1] 14 @ CHECK-ARM: mrs r7, r11_usr @ encoding: [0x00,0x72,0x03,0xe1] 15 @ CHECK-ARM: mrs r11, r12_usr @ encoding: [0x00,0xb2,0x04,0xe1] 16 @ CHECK-ARM: mrs r1, sp_usr @ encoding: [0x00,0x12,0x05,0xe1] 17 @ CHECK-ARM: mrs r2, lr_usr @ encoding: [0x00,0x22,0x06,0xe1] 19 @ CHECK-THUMB: mrs r3, r9_usr @ encoding: [0xe1,0xf3,0x20,0x83] 34 @ CHECK-ARM: mrs r2, r8_fiq @ encoding: [0x00,0x22,0x08,0xe1] 35 @ CHECK-ARM: mrs r3, r9_fiq @ encoding: [0x00,0x32,0x09,0xe1] [all...] |
H A D | ldrd-strd-gnu-arm.s | 8 @ CHECK: ldrd r0, r1, [r10, #32]! @ encoding: [0xd0,0x02,0xea,0xe1] 10 @ CHECK: ldrd r0, r1, [r10, #32] @ encoding: [0xd0,0x02,0xca,0xe1] 15 @ CHECK: strd r0, r1, [r10, #32]! @ encoding: [0xf0,0x02,0xea,0xe1] 17 @ CHECK: strd r0, r1, [r10, #32] @ encoding: [0xf0,0x02,0xca,0xe1]
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H A D | virtexts-arm.s | 7 # CHECK-ARM: [0x71,0x00,0x40,0xe1] 8 # CHECK-ARM: [0x77,0x00,0x40,0xe1] 9 # CHECK-ARM: [0x71,0x10,0x40,0xe1] 10 # CHECK-ARM: [0x7f,0xff,0x4f,0xe1] 27 # CHECK-ARM: [0x6e,0x00,0x60,0xe1]
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H A D | dot-req.s | 13 @ CHECK: mov r11, r5 @ encoding: [0x05,0xb0,0xa0,0xe1] 14 @ CHECK: mov r1, r6 @ encoding: [0x06,0x10,0xa0,0xe1]
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H A D | crc32.s | 8 @ CHECK: crc32b r0, r1, r2 @ encoding: [0x42,0x00,0x01,0xe1] 9 @ CHECK: crc32h r0, r1, r2 @ encoding: [0x42,0x00,0x21,0xe1] 10 @ CHECK: crc32w r0, r1, r2 @ encoding: [0x42,0x00,0x41,0xe1] 22 @ CHECK: crc32cb r0, r1, r2 @ encoding: [0x42,0x02,0x01,0xe1] 23 @ CHECK: crc32ch r0, r1, r2 @ encoding: [0x42,0x02,0x21,0xe1] 24 @ CHECK: crc32cw r0, r1, r2 @ encoding: [0x42,0x02,0x41,0xe1]
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H A D | arm_instructions.s | 15 @ CHECK: encoding: [0x1e,0xff,0x2f,0xe1] 19 @ CHECK: encoding: [0xa0,0x0d,0xe1,0xf2] 49 @ CHECK: bic r1, r2, r3 @ encoding: [0x03,0x10,0xc2,0xe1] 52 @ CHECK: bics r1, r2, r3 @ encoding: [0x03,0x10,0xd2,0xe1] 55 @ CHECK: mov r1, r2 @ encoding: [0x02,0x10,0xa0,0xe1] 58 @ CHECK: mvn r1, r2 @ encoding: [0x02,0x10,0xe0,0xe1] 61 @ CHECK: mvns r1, r2 @ encoding: [0x02,0x10,0xf0,0xe1] 67 @ CHECK: bkpt #10 @ encoding: [0x7a,0x00,0x20,0xe1] 84 @ CHECK: strh r3, [r2, #-0] @ encoding: [0xb0,0x30,0x42,0xe1]
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H A D | arm-aliases.s | 15 @ CHECK: orr r1, r2, r3 @ encoding: [0x03,0x10,0x82,0xe1] 17 @ CHECK: bic r1, r2, r3 @ encoding: [0x03,0x10,0xc2,0xe1]
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H A D | arm-thumb-cpus-default.s | 22 @ CHECK-ARM-THUMB: movs r0, r0 @ encoding: [0x00,0x00,0xb0,0xe1] 23 @ CHECK-ARM-ONLY: movs r0, r0 @ encoding: [0x00,0x00,0xb0,0xe1]
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H A D | basic-arm-instructions-v8.s | 9 @ CHECK-V8: hlt #0 @ encoding: [0x70,0x00,0x00,0xe1] 10 @ CHECK-V8: hlt #65535 @ encoding: [0x7f,0xff,0x0f,0xe1] 16 @ CHECK-V8: hlt #0 @ encoding: [0x70,0x00,0x00,0xe1]
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H A D | basic-arm-instructions.s | 442 @ CHECK: asr r2, r4, #32 @ encoding: [0x44,0x20,0xa0,0xe1] 443 @ CHECK: asr r2, r4, #2 @ encoding: [0x44,0x21,0xa0,0xe1] 444 @ CHECK: mov r2, r4 @ encoding: [0x04,0x20,0xa0,0xe1] 445 @ CHECK: asr r4, r4, #2 @ encoding: [0x44,0x41,0xa0,0xe1] 548 @ CHECK: bic r10, r1, r6 @ encoding: [0x06,0xa0,0xc1,0xe1] 549 @ CHECK: bic r10, r1, r6, lsl #10 @ encoding: [0x06,0xa5,0xc1,0xe1] 550 @ CHECK: bic r10, r1, r6, lsr #10 @ encoding: [0x26,0xa5,0xc1,0xe1] 551 @ CHECK: bic r10, r1, r6, lsr #10 @ encoding: [0x26,0xa5,0xc1,0xe1] 552 @ CHECK: bic r10, r1, r6, asr #10 @ encoding: [0x46,0xa5,0xc1,0xe1] 553 @ CHECK: bic r10, r1, r6, ror #10 @ encoding: [0x66,0xa5,0xc1,0xe1] [all...] |
H A D | arm-shift-encoding.s | 111 @ CHECK: cmp sp, lr @ encoding: [0x0e,0x00,0x5d,0xe1] 112 @ CHECK: cmp r1, r8, lsr #32 @ encoding: [0x28,0x00,0x51,0xe1] 113 @ CHECK: cmp r2, r7, lsr #16 @ encoding: [0x27,0x08,0x52,0xe1] 114 @ CHECK: cmp r3, r6 @ encoding: [0x06,0x00,0x53,0xe1] 115 @ CHECK: cmp r4, r5, lsl #16 @ encoding: [0x05,0x08,0x54,0xe1] 116 @ CHECK: cmp r5, r4, asr #32 @ encoding: [0x44,0x00,0x55,0xe1] 117 @ CHECK: cmp r6, r3, asr #16 @ encoding: [0x43,0x08,0x56,0xe1] 118 @ CHECK: cmp r7, r2, rrx @ encoding: [0x62,0x00,0x57,0xe1] 119 @ CHECK: cmp r8, r1, ror #16 @ encoding: [0x61,0x08,0x58,0xe1]
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H A D | arm-trustzone.s | 23 @ TZ: smc #15 @ encoding: [0x7f,0x00,0x60,0xe1]
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/external/clang/test/SemaTemplate/ |
H A D | instantiate-enum.cpp | 23 int xe1 = enumerator2; local
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/external/curl/tests/libtest/ |
H A D | lib543.c | 32 0x1d, 0x57, 0xe1};
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/external/vboot_reference/firmware/2lib/include/ |
H A D | 2guid.h | 34 {{{0xcfb5687a,0x6092,0x11e4,0x96,0xe1,{0x8f,0x3b,0x1a,0x60,0xa2,0x1d}}}}
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/external/vixl/test/traces/a64/ |
H A D | sim-srshr-8b-2opimm-trace-a64.h | 39 0x0d, 0x15, 0x1f, 0x20, 0x20, 0xe0, 0xe0, 0xe1, 47 0x15, 0x1f, 0x20, 0x20, 0xe0, 0xe0, 0xe1, 0xe1, 55 0x1f, 0x20, 0x20, 0xe0, 0xe0, 0xe1, 0xe1, 0xeb, 63 0x20, 0x20, 0xe0, 0xe0, 0xe1, 0xe1, 0xeb, 0xf3, 71 0x20, 0xe0, 0xe0, 0xe1, 0xe1, 0xeb, 0xf3, 0xfe, 79 0xe0, 0xe0, 0xe1, [all...] |
H A D | sim-srshr-16b-2opimm-trace-a64.h | 39 0x0d, 0x15, 0x1f, 0x20, 0x20, 0xe0, 0xe0, 0xe1, 0xe1, 0xeb, 0xf3, 0xfe, 0xff, 0x00, 0x00, 0x00, 47 0x15, 0x1f, 0x20, 0x20, 0xe0, 0xe0, 0xe1, 0xe1, 0xeb, 0xf3, 0xfe, 0xff, 0x00, 0x00, 0x00, 0x00, 55 0x1f, 0x20, 0x20, 0xe0, 0xe0, 0xe1, 0xe1, 0xeb, 0xf3, 0xfe, 0xff, 0x00, 0x00, 0x00, 0x00, 0x01, 63 0x20, 0x20, 0xe0, 0xe0, 0xe1, 0xe1, 0xeb, 0xf3, 0xfe, 0xff, 0x00, 0x00, 0x00, 0x00, 0x01, 0x02, 71 0x20, 0xe0, 0xe0, 0xe1, 0xe1, [all...] |
/external/kernel-headers/original/uapi/linux/ |
H A D | dn.h | 144 #define SIOCGNETADDR _IOR(DECNET_IOCTL_BASE, 0xe1, struct dn_naddr) 146 #define OSIOCGNETADDR _IOR(DECNET_IOCTL_BASE, 0xe1, int)
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/external/skia/tests/ |
H A D | MD5Test.cpp | 55 { "abc", {{ 0x90, 0x01, 0x50, 0x98, 0x3c, 0xd2, 0x4f, 0xb0, 0xd6, 0x96, 0x3f, 0x7d, 0x28, 0xe1, 0x7f, 0x72 }} }, 57 { "abcdefghijklmnopqrstuvwxyz", {{ 0xc3, 0xfc, 0xd3, 0xd7, 0x61, 0x92, 0xe4, 0x00, 0x7d, 0xfb, 0x49, 0x6c, 0xca, 0x67, 0xe1, 0x3b }} },
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/external/ppp/pppd/include/net/ |
H A D | pppio.h | 94 #define PPPCTL_IERROR 0xe1 /* input error (e.g. FCS) [up] */
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/external/valgrind/none/tests/s390x/ |
H A D | cu12.c | 38 0xe1, 0x80, 0x80, 39 0xe1, 0x80, 0x81, 40 0xe1, 0x80, 0x82, 41 0xe1, 0x80, 0x83, 58 0xe1, 0x90, 0x93, // 3 bytes 63 0xe1, 0x91, 0x94, // 3 bytes 67 0xe1, 0x91, 0x94, // 3 bytes 69 0xe1, 0x91, 0x94, // 3 bytes 376 0xe1, 0x90, 0x90, // valid 377 0xe1, [all...] |
H A D | cu12_1.c | 38 0xe1, 0x80, 0x80, 39 0xe1, 0x80, 0x81, 40 0xe1, 0x80, 0x82, 41 0xe1, 0x80, 0x83, 58 0xe1, 0x90, 0x93, // 3 bytes 63 0xe1, 0x91, 0x94, // 3 bytes 67 0xe1, 0x91, 0x94, // 3 bytes 69 0xe1, 0x91, 0x94, // 3 bytes 376 0xe1, 0x90, 0x90, // valid 377 0xe1, [all...] |
H A D | cu14.c | 38 0xe1, 0x80, 0x80, 39 0xe1, 0x80, 0x81, 40 0xe1, 0x80, 0x82, 41 0xe1, 0x80, 0x83, 58 0xe1, 0x90, 0x93, // 3 bytes 63 0xe1, 0x91, 0x94, // 3 bytes 67 0xe1, 0x91, 0x94, // 3 bytes 69 0xe1, 0x91, 0x94, // 3 bytes 376 0xe1, 0x90, 0x90, // valid 377 0xe1, [all...] |
H A D | cu14_1.c | 38 0xe1, 0x80, 0x80, 39 0xe1, 0x80, 0x81, 40 0xe1, 0x80, 0x82, 41 0xe1, 0x80, 0x83, 58 0xe1, 0x90, 0x93, // 3 bytes 63 0xe1, 0x91, 0x94, // 3 bytes 67 0xe1, 0x91, 0x94, // 3 bytes 69 0xe1, 0x91, 0x94, // 3 bytes 376 0xe1, 0x90, 0x90, // valid 377 0xe1, [all...] |