| /hardware/qcom/media/msm8974/mm-video-legacy/vidc/vdec/inc/ |
| H A D | omx_vdec.h | 415 OMX_COMPONENT_OUTPUT_FLUSH_IN_DISABLE_PENDING =0xD, enumerator in enum:omx_vdec::flags_bit_positions
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| /hardware/qcom/media/msm8974/mm-video-v4l2/vidc/vdec/inc/ |
| H A D | omx_vdec_hevc.h | 420 OMX_COMPONENT_OUTPUT_FLUSH_IN_DISABLE_PENDING =0xD, enumerator in enum:omx_vdec::flags_bit_positions
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| H A D | omx_vdec.h | 483 OMX_COMPONENT_OUTPUT_FLUSH_IN_DISABLE_PENDING =0xD, enumerator in enum:omx_vdec::flags_bit_positions
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| /hardware/qcom/media/msm8996/mm-video-v4l2/vidc/vdec/inc/ |
| H A D | omx_vdec_hevc.h | 417 OMX_COMPONENT_OUTPUT_FLUSH_IN_DISABLE_PENDING =0xD, enumerator in enum:omx_vdec::flags_bit_positions
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| H A D | omx_vdec.h | 488 OMX_COMPONENT_OUTPUT_FLUSH_IN_DISABLE_PENDING =0xD, enumerator in enum:omx_vdec::flags_bit_positions
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| H A D | omx_vdec_hevc_swvdec.h | 486 OMX_COMPONENT_OUTPUT_FLUSH_IN_DISABLE_PENDING =0xD, enumerator in enum:omx_vdec::flags_bit_positions
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| /hardware/qcom/media/msm8996/videopp/inc/ |
| H A D | omx_vdpp.h | 593 OMX_COMPONENT_OUTPUT_FLUSH_IN_DISABLE_PENDING =0xD, enumerator in enum:omx_vdpp::flags_bit_positions
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| /hardware/qcom/media/msm8974/mm-video-legacy/vidc/vdec/src/ |
| H A D | omx_vdec.cpp | 712 OMX_COMPONENT_OUTPUT_FLUSH_IN_DISABLE_PENDING))
921 OMX_COMPONENT_OUTPUT_FLUSH_IN_DISABLE_PENDING))
925 OMX_COMPONENT_OUTPUT_FLUSH_IN_DISABLE_PENDING);
2245 BITMASK_SET(&m_flags, OMX_COMPONENT_OUTPUT_FLUSH_IN_DISABLE_PENDING);
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| H A D | omx_vdec_copper.cpp | 705 OMX_COMPONENT_OUTPUT_FLUSH_IN_DISABLE_PENDING))
916 OMX_COMPONENT_OUTPUT_FLUSH_IN_DISABLE_PENDING))
920 OMX_COMPONENT_OUTPUT_FLUSH_IN_DISABLE_PENDING);
2165 BITMASK_SET(&m_flags, OMX_COMPONENT_OUTPUT_FLUSH_IN_DISABLE_PENDING);
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| /hardware/qcom/media/msm8974/mm-video-v4l2/vidc/vdec/src/ |
| H A D | omx_vdec.cpp | 706 OMX_COMPONENT_OUTPUT_FLUSH_IN_DISABLE_PENDING)) {
898 OMX_COMPONENT_OUTPUT_FLUSH_IN_DISABLE_PENDING)) {
901 OMX_COMPONENT_OUTPUT_FLUSH_IN_DISABLE_PENDING);
2148 BITMASK_SET(&m_flags, OMX_COMPONENT_OUTPUT_FLUSH_IN_DISABLE_PENDING);
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| H A D | omx_vdec_hevc.cpp | 820 OMX_COMPONENT_OUTPUT_FLUSH_IN_DISABLE_PENDING)) {
994 OMX_COMPONENT_OUTPUT_FLUSH_IN_DISABLE_PENDING)) {
997 OMX_COMPONENT_OUTPUT_FLUSH_IN_DISABLE_PENDING);
2105 BITMASK_SET(&m_flags, OMX_COMPONENT_OUTPUT_FLUSH_IN_DISABLE_PENDING);
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| H A D | omx_vdec_hevc_swvdec.cpp | 972 OMX_COMPONENT_OUTPUT_FLUSH_IN_DISABLE_PENDING))
1211 OMX_COMPONENT_OUTPUT_FLUSH_IN_DISABLE_PENDING))
1215 OMX_COMPONENT_OUTPUT_FLUSH_IN_DISABLE_PENDING);
2648 BITMASK_SET(&m_flags, OMX_COMPONENT_OUTPUT_FLUSH_IN_DISABLE_PENDING);
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| H A D | omx_vdec_msm8974.cpp | 938 OMX_COMPONENT_OUTPUT_FLUSH_IN_DISABLE_PENDING)) {
1109 OMX_COMPONENT_OUTPUT_FLUSH_IN_DISABLE_PENDING)) {
1112 OMX_COMPONENT_OUTPUT_FLUSH_IN_DISABLE_PENDING);
2592 BITMASK_SET(&m_flags, OMX_COMPONENT_OUTPUT_FLUSH_IN_DISABLE_PENDING);
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| /hardware/qcom/media/msm8996/mm-video-v4l2/vidc/vdec/src/ |
| H A D | omx_vdec_hevc.cpp | 815 OMX_COMPONENT_OUTPUT_FLUSH_IN_DISABLE_PENDING)) {
989 OMX_COMPONENT_OUTPUT_FLUSH_IN_DISABLE_PENDING)) {
992 OMX_COMPONENT_OUTPUT_FLUSH_IN_DISABLE_PENDING);
2084 BITMASK_SET(&m_flags, OMX_COMPONENT_OUTPUT_FLUSH_IN_DISABLE_PENDING);
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| H A D | omx_vdec_hevc_swvdec.cpp | 980 OMX_COMPONENT_OUTPUT_FLUSH_IN_DISABLE_PENDING))
1228 OMX_COMPONENT_OUTPUT_FLUSH_IN_DISABLE_PENDING))
1232 OMX_COMPONENT_OUTPUT_FLUSH_IN_DISABLE_PENDING);
2679 BITMASK_SET(&m_flags, OMX_COMPONENT_OUTPUT_FLUSH_IN_DISABLE_PENDING);
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| H A D | omx_vdec_v4l2.cpp | 1259 OMX_COMPONENT_OUTPUT_FLUSH_IN_DISABLE_PENDING)) {
1431 OMX_COMPONENT_OUTPUT_FLUSH_IN_DISABLE_PENDING)) {
1434 OMX_COMPONENT_OUTPUT_FLUSH_IN_DISABLE_PENDING);
3041 BITMASK_SET(&m_flags, OMX_COMPONENT_OUTPUT_FLUSH_IN_DISABLE_PENDING);
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| /hardware/qcom/media/msm8996/videopp/src/ |
| H A D | omx_vdpp.cpp | 912 OMX_COMPONENT_OUTPUT_FLUSH_IN_DISABLE_PENDING))
1128 OMX_COMPONENT_OUTPUT_FLUSH_IN_DISABLE_PENDING))
1132 OMX_COMPONENT_OUTPUT_FLUSH_IN_DISABLE_PENDING);
2348 BITMASK_SET(&m_flags, OMX_COMPONENT_OUTPUT_FLUSH_IN_DISABLE_PENDING);
|