Searched defs:EltSize (Results 1 - 25 of 26) sorted by relevance

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/external/clang/lib/CodeGen/
H A DCGBuilder.h207 /// \param EltSize - the size of the type T in bytes
208 Address CreateConstArrayGEP(Address Addr, uint64_t Index, CharUnits EltSize, argument
214 Addr.getAlignment().alignmentAtOffset(Index * EltSize));
223 /// \param EltSize - the size of the type T in bytes
225 CharUnits EltSize,
229 Addr.getAlignment().alignmentAtOffset(Index * EltSize));
238 /// \param EltSize - the size of the type T in bytes
239 Address CreateConstGEP(Address Addr, uint64_t Index, CharUnits EltSize, argument
243 Addr.getAlignment().alignmentAtOffset(Index * EltSize));
224 CreateConstInBoundsGEP(Address Addr, uint64_t Index, CharUnits EltSize, const llvm::Twine &Name = �) argument
H A DCGCall.cpp764 CharUnits EltSize = CGF.getContext().getTypeSizeInChars(CAE->EltTy); local
766 BaseAddr.getAlignment().alignmentOfArrayElement(EltSize);
H A DCGClass.cpp585 CharUnits EltSize = CGF.getContext().getTypeSizeInChars(T); local
586 CharUnits Align = LV.getAlignment().alignmentOfArrayElement(EltSize);
H A DCGBuiltin.cpp2190 int EltSize = VTy->getScalarSizeInBits(); local
2196 if (ShiftAmt == EltSize) {
/external/llvm/lib/Target/AMDGPU/
H A DSILoadStoreOptimizer.cpp67 unsigned EltSize);
70 unsigned EltSize);
79 unsigned EltSize);
84 unsigned EltSize);
163 unsigned EltSize){
189 if (offsetsCanBeCombined(Offset0, Offset1, EltSize))
210 unsigned EltSize) {
225 unsigned NewOffset0 = Offset0 / EltSize;
226 unsigned NewOffset1 = Offset1 / EltSize;
227 unsigned Opc = (EltSize
162 findMatchingDSInst(MachineBasicBlock::iterator I, unsigned EltSize) argument
207 mergeRead2Pair( MachineBasicBlock::iterator I, MachineBasicBlock::iterator Paired, unsigned EltSize) argument
302 mergeWrite2Pair( MachineBasicBlock::iterator I, MachineBasicBlock::iterator Paired, unsigned EltSize) argument
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H A DSIInstrInfo.cpp237 unsigned EltSize; local
239 EltSize = getOpRegClass(*LdSt, 0)->getSize() / 2;
243 EltSize = getOpRegClass(*LdSt, Data0Idx)->getSize();
247 EltSize *= 64;
252 Offset = EltSize * Offset0;
H A DAMDGPUISelLowering.cpp739 unsigned EltSize = TD.getTypeAllocSize(SeqTy->getElementType()); local
742 SDValue Offset = DAG.getConstant(i * EltSize, DL, PtrVT);
1327 unsigned EltSize = MemEltVT.getStoreSize(); local
1339 SrcValue.getWithOffset(i * EltSize),
/external/llvm/lib/CodeGen/
H A DAnalysis.cpp104 uint64_t EltSize = DL.getTypeAllocSize(EltTy); local
107 StartingOffset + i * EltSize);
/external/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeDAG.cpp627 unsigned EltSize = EltVT.getSizeInBits()/8; local
629 DAG.getConstant(EltSize, dl, IdxVT));
1505 unsigned EltSize =
1508 DAG.getConstant(EltSize, SDLoc(Vec), Idx.getValueType()));
1558 unsigned EltSize =
1562 DAG.getConstant(EltSize, SDLoc(Vec), Idx.getValueType()));
H A DLegalizeTypes.cpp1032 unsigned EltSize = EltVT.getSizeInBits() / 8; // FIXME: should be ABI size. local
1033 assert(EltSize * 8 == EltVT.getSizeInBits() &&
1037 DAG.getConstant(EltSize, dl, Index.getValueType()));
H A DSelectionDAG.cpp124 unsigned EltSize = N->getValueType(0).getVectorElementType().getSizeInBits(); local
126 if (CN->getAPIntValue().countTrailingOnes() < EltSize)
129 if (CFPN->getValueAPF().bitcastToAPInt().countTrailingOnes() < EltSize)
167 unsigned EltSize = N->getValueType(0).getVectorElementType().getSizeInBits(); local
169 if (CN->getAPIntValue().countTrailingZeros() < EltSize)
172 if (CFPN->getValueAPF().bitcastToAPInt().countTrailingZeros() < EltSize)
H A DDAGCombiner.cpp3840 // range [0, EltSize), Neg == (Pos == 0 ? 0 : EltSize - Pos). This means that
3846 // in direction shift1 by Neg. The range [0, EltSize) means that we only need
3848 static bool matchRotateSub(SDValue Pos, SDValue Neg, unsigned EltSize) { argument
3849 // If EltSize is a power of 2 then:
3851 // (a) (Pos == 0 ? 0 : EltSize - Pos) == (EltSize - Pos) & (EltSize - 1)
3852 // (b) Neg == Neg & (EltSize - 1) whenever Neg is in [0, EltSize)
14050 unsigned EltSize = (unsigned)TD.getTypeAllocSize(Elts[0]->getType()); local
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/external/llvm/lib/Analysis/
H A DConstantFolding.cpp332 uint64_t EltSize = DL.getTypeAllocSize(CS->getOperand(Index)->getType()); local
334 if (ByteOffset < EltSize &&
363 uint64_t EltSize = DL.getTypeAllocSize(EltTy); local
364 uint64_t Index = ByteOffset / EltSize;
365 uint64_t Offset = ByteOffset - Index * EltSize;
377 uint64_t BytesWritten = EltSize - Offset;
378 assert(BytesWritten <= EltSize && "Not indexing into this element?");
/external/llvm/lib/Transforms/Scalar/
H A DScalarReplAggregates.cpp424 unsigned EltSize = In->getPrimitiveSizeInBits()/8; local
425 if (EltSize == AllocaSize)
431 if (Offset % EltSize == 0 && AllocaSize % EltSize == 0 &&
432 (!VectorTy || EltSize == VectorTy->getElementType()
436 VectorTy = VectorType::get(In, AllocaSize/EltSize);
789 unsigned EltSize = DL.getTypeAllocSizeInBits(VTy->getElementType()); local
790 Elt = Offset/EltSize;
791 assert(EltSize*Elt == Offset && "Invalid modulus in validity checking");
829 uint64_t EltSize local
926 uint64_t EltSize = DL.getTypeAllocSizeInBits(EltTy); local
958 uint64_t EltSize = DL.getTypeAllocSizeInBits(AT->getElementType()); local
1848 uint64_t EltSize; local
2038 uint64_t EltSize = DL.getTypeAllocSize(T); local
2046 uint64_t EltSize = DL.getTypeAllocSize(T); local
2141 uint64_t EltSize = DL.getTypeAllocSize(IdxTy) - NewOffset; local
2157 uint64_t EltSize = DL.getTypeAllocSize(IdxTy); local
2294 unsigned EltSize = DL.getTypeSizeInBits(ValTy); local
2324 unsigned EltSize = DL.getTypeAllocSize(EltTy); local
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/external/llvm/lib/IR/
H A DConstants.cpp2762 unsigned EltSize = getElementByteSize(); local
2764 if (memcmp(Base, Base+i*EltSize, EltSize))
/external/llvm/lib/Target/Hexagon/
H A DHexagonISelLowering.cpp2278 unsigned EltSize = Size / NElts; local
2280 uint64_t Mask = ~uint64_t(0ULL) >> (64 - EltSize);
2298 Res = (Res << EltSize) | Val;
2415 int EltSize = EltVT.getSizeInBits(); local
2417 EltSize : VTN * EltSize, dl, MVT::i64);
2422 SDValue Offset = DAG.getConstant(X * EltSize, dl, MVT::i32);
2461 DAG.getConstant(EltSize, dl, MVT::i32));
2490 int EltSize = EltVT.getSizeInBits(); local
2492 EltSize
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/external/llvm/lib/Target/Mips/
H A DMipsSEISelLowering.cpp855 unsigned EltSize = Ty.getVectorElementType().getSizeInBits(); local
863 EltSize, !Subtarget.isLittle()) ||
864 (SplatBitSize != EltSize) ||
865 (SplatValue.getZExtValue() >= EltSize))
/external/llvm/lib/Transforms/IPO/
H A DGlobalOpt.cpp525 uint64_t EltSize = DL.getTypeAllocSize(STy->getElementType()); local
543 unsigned NewAlign = (unsigned)MinAlign(StartAlignment, EltSize*i);
/external/llvm/lib/Transforms/InstCombine/
H A DInstructionCombining.cpp976 uint64_t EltSize = DL.getTypeAllocSize(AT->getElementType()); local
977 assert(EltSize && "Cannot index into a zero-sized array");
978 NewIndices.push_back(ConstantInt::get(IntPtrTy,Offset/EltSize));
979 Offset %= EltSize;
/external/llvm/lib/Target/PowerPC/
H A DPPCISelDAGToDAG.cpp3011 int EltSize = N->getConstantOperandVal(1); local
3015 if (EltSize == 1) {
3020 } else if (EltSize == 2) {
3026 assert(EltSize == 4 && "Invalid element size on VADD_SPLAT!");
H A DPPCISelLowering.cpp1451 bool PPC::isSplatShuffleMask(ShuffleVectorSDNode *N, unsigned EltSize) { argument
1453 (EltSize == 1 || EltSize == 2 || EltSize == 4));
1457 if (N->getMaskElt(0) % EltSize != 0)
1470 for (unsigned i = 1; i != EltSize; ++i)
1474 for (unsigned i = EltSize, e = 16; i != e; i += EltSize) {
1476 for (unsigned j = 0; j != EltSize; ++j)
1485 unsigned PPC::getVSPLTImmediate(SDNode *N, unsigned EltSize, argument
1506 unsigned EltSize = 16/N->getNumOperands(); local
6981 SDValue EltSize = DAG.getConstant(SplatSize, dl, MVT::i32); local
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/external/llvm/lib/Transforms/Instrumentation/
H A DMemorySanitizer.cpp880 uint32_t EltSize = DL.getTypeSizeInBits(VT->getElementType()); local
881 return VectorType::get(IntegerType::get(*MS.C, EltSize),
/external/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp1576 unsigned EltSize = VT.getVectorElementType().getSizeInBits(); local
1577 if (EltSize == 1) {
1582 if ((VT.is128BitVector() || VT.is256BitVector()) && EltSize >= 32) {
1598 if (EltSize >= 32) {
8067 const unsigned EltSize = EltVT.getSizeInBits();
8071 if (V0EltSize <= EltSize)
8074 assert(((V0EltSize % EltSize) == 0) &&
8078 const unsigned Scale = V0EltSize / EltSize;
8093 DAG.getConstant(OffsetIdx * EltSize, DL, Scalar.getValueType()));
23881 unsigned EltSize
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/external/clang/lib/AST/
H A DExprConstant.cpp1669 unsigned EltSize = Info.Ctx.getTypeSize(EltTy); local
1687 Res |= EltAsInt.zextOrTrunc(VecSize).rotr(i*EltSize+BaseEltSize);
1689 Res |= EltAsInt.zextOrTrunc(VecSize).rotl(i*EltSize);
5693 unsigned EltSize = Info.Ctx.getTypeSize(EltTy); local
5698 unsigned FloatEltSize = EltSize;
5704 Elt = SValInt.rotl(i*EltSize+FloatEltSize).trunc(FloatEltSize);
5706 Elt = SValInt.rotr(i*EltSize).trunc(FloatEltSize);
5713 Elt = SValInt.rotl(i*EltSize+EltSize).zextOrTrunc(EltSize);
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/external/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp2061 unsigned EltSize = VT.getVectorElementType().getSizeInBits(); local
2062 unsigned HalfSize = EltSize / 2;
2088 unsigned EltSize = VT.getVectorElementType().getSizeInBits() / 2; local
2090 MVT TruncVT = MVT::getIntegerVT(EltSize);
6540 unsigned EltSize = VT.getVectorElementType().getSizeInBits(); local
6547 if (isVShiftLImm(Op.getOperand(1), VT, false, Cnt) && Cnt < EltSize)
6557 if (isVShiftRImm(Op.getOperand(1), VT, false, Cnt) && Cnt < EltSize) {

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