1/****************************************************************************
2 ****************************************************************************
3 ***
4 ***   This header was automatically generated from a Linux kernel header
5 ***   of the same name, to make information necessary for userspace to
6 ***   call into the kernel available to libc.  It contains only constants,
7 ***   structures, and macros generated from the original header, and thus,
8 ***   contains no copyrightable information.
9 ***
10 ***   To edit the content of this header, modify the corresponding
11 ***   source file (e.g. under external/kernel-headers/original/) then
12 ***   run bionic/libc/kernel/tools/update_all.py
13 ***
14 ***   Any manual change here will be lost the next time this script will
15 ***   be run. You've been warned!
16 ***
17 ****************************************************************************
18 ****************************************************************************/
19#ifndef KFD_IOCTL_H_INCLUDED
20#define KFD_IOCTL_H_INCLUDED
21#include <linux/types.h>
22#include <linux/ioctl.h>
23/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
24#define KFD_IOCTL_MAJOR_VERSION 1
25#define KFD_IOCTL_MINOR_VERSION 1
26struct kfd_ioctl_get_version_args {
27  uint32_t major_version;
28/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
29  uint32_t minor_version;
30};
31#define KFD_IOC_QUEUE_TYPE_COMPUTE 0
32#define KFD_IOC_QUEUE_TYPE_SDMA 1
33/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
34#define KFD_IOC_QUEUE_TYPE_COMPUTE_AQL 2
35#define KFD_MAX_QUEUE_PERCENTAGE 100
36#define KFD_MAX_QUEUE_PRIORITY 15
37struct kfd_ioctl_create_queue_args {
38/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
39  uint64_t ring_base_address;
40  uint64_t write_pointer_address;
41  uint64_t read_pointer_address;
42  uint64_t doorbell_offset;
43/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
44  uint32_t ring_size;
45  uint32_t gpu_id;
46  uint32_t queue_type;
47  uint32_t queue_percentage;
48/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
49  uint32_t queue_priority;
50  uint32_t queue_id;
51  uint64_t eop_buffer_address;
52  uint64_t eop_buffer_size;
53/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
54  uint64_t ctx_save_restore_address;
55  uint64_t ctx_save_restore_size;
56};
57struct kfd_ioctl_destroy_queue_args {
58/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
59  uint32_t queue_id;
60  uint32_t pad;
61};
62struct kfd_ioctl_update_queue_args {
63/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
64  uint64_t ring_base_address;
65  uint32_t queue_id;
66  uint32_t ring_size;
67  uint32_t queue_percentage;
68/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
69  uint32_t queue_priority;
70};
71#define KFD_IOC_CACHE_POLICY_COHERENT 0
72#define KFD_IOC_CACHE_POLICY_NONCOHERENT 1
73/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
74struct kfd_ioctl_set_memory_policy_args {
75  uint64_t alternate_aperture_base;
76  uint64_t alternate_aperture_size;
77  uint32_t gpu_id;
78/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
79  uint32_t default_policy;
80  uint32_t alternate_policy;
81  uint32_t pad;
82};
83/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
84struct kfd_ioctl_get_clock_counters_args {
85  uint64_t gpu_clock_counter;
86  uint64_t cpu_clock_counter;
87  uint64_t system_clock_counter;
88/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
89  uint64_t system_clock_freq;
90  uint32_t gpu_id;
91  uint32_t pad;
92};
93/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
94#define NUM_OF_SUPPORTED_GPUS 7
95struct kfd_process_device_apertures {
96  uint64_t lds_base;
97  uint64_t lds_limit;
98/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
99  uint64_t scratch_base;
100  uint64_t scratch_limit;
101  uint64_t gpuvm_base;
102  uint64_t gpuvm_limit;
103/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
104  uint32_t gpu_id;
105  uint32_t pad;
106};
107struct kfd_ioctl_get_process_apertures_args {
108/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
109  struct kfd_process_device_apertures process_apertures[NUM_OF_SUPPORTED_GPUS];
110  uint32_t num_of_nodes;
111  uint32_t pad;
112};
113/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
114#define MAX_ALLOWED_NUM_POINTS 100
115#define MAX_ALLOWED_AW_BUFF_SIZE 4096
116#define MAX_ALLOWED_WAC_BUFF_SIZE 128
117struct kfd_ioctl_dbg_register_args {
118/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
119  uint32_t gpu_id;
120  uint32_t pad;
121};
122struct kfd_ioctl_dbg_unregister_args {
123/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
124  uint32_t gpu_id;
125  uint32_t pad;
126};
127struct kfd_ioctl_dbg_address_watch_args {
128/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
129  uint64_t content_ptr;
130  uint32_t gpu_id;
131  uint32_t buf_size_in_bytes;
132};
133/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
134struct kfd_ioctl_dbg_wave_control_args {
135  uint64_t content_ptr;
136  uint32_t gpu_id;
137  uint32_t buf_size_in_bytes;
138/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
139};
140#define KFD_IOC_EVENT_SIGNAL 0
141#define KFD_IOC_EVENT_NODECHANGE 1
142#define KFD_IOC_EVENT_DEVICESTATECHANGE 2
143/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
144#define KFD_IOC_EVENT_HW_EXCEPTION 3
145#define KFD_IOC_EVENT_SYSTEM_EVENT 4
146#define KFD_IOC_EVENT_DEBUG_EVENT 5
147#define KFD_IOC_EVENT_PROFILE_EVENT 6
148/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
149#define KFD_IOC_EVENT_QUEUE_EVENT 7
150#define KFD_IOC_EVENT_MEMORY 8
151#define KFD_IOC_WAIT_RESULT_COMPLETE 0
152#define KFD_IOC_WAIT_RESULT_TIMEOUT 1
153/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
154#define KFD_IOC_WAIT_RESULT_FAIL 2
155#define KFD_SIGNAL_EVENT_LIMIT 256
156struct kfd_ioctl_create_event_args {
157  uint64_t event_page_offset;
158/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
159  uint32_t event_trigger_data;
160  uint32_t event_type;
161  uint32_t auto_reset;
162  uint32_t node_id;
163/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
164  uint32_t event_id;
165  uint32_t event_slot_index;
166};
167struct kfd_ioctl_destroy_event_args {
168/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
169  uint32_t event_id;
170  uint32_t pad;
171};
172struct kfd_ioctl_set_event_args {
173/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
174  uint32_t event_id;
175  uint32_t pad;
176};
177struct kfd_ioctl_reset_event_args {
178/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
179  uint32_t event_id;
180  uint32_t pad;
181};
182struct kfd_memory_exception_failure {
183/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
184  uint32_t NotPresent;
185  uint32_t ReadOnly;
186  uint32_t NoExecute;
187  uint32_t pad;
188/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
189};
190struct kfd_hsa_memory_exception_data {
191  struct kfd_memory_exception_failure failure;
192  uint64_t va;
193/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
194  uint32_t gpu_id;
195  uint32_t pad;
196};
197struct kfd_event_data {
198/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
199  union {
200    struct kfd_hsa_memory_exception_data memory_exception_data;
201  };
202  uint64_t kfd_event_data_ext;
203/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
204  uint32_t event_id;
205  uint32_t pad;
206};
207struct kfd_ioctl_wait_events_args {
208/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
209  uint64_t events_ptr;
210  uint32_t num_events;
211  uint32_t wait_for_all;
212  uint32_t timeout;
213/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
214  uint32_t wait_result;
215};
216#define AMDKFD_IOCTL_BASE 'K'
217#define AMDKFD_IO(nr) _IO(AMDKFD_IOCTL_BASE, nr)
218/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
219#define AMDKFD_IOR(nr,type) _IOR(AMDKFD_IOCTL_BASE, nr, type)
220#define AMDKFD_IOW(nr,type) _IOW(AMDKFD_IOCTL_BASE, nr, type)
221#define AMDKFD_IOWR(nr,type) _IOWR(AMDKFD_IOCTL_BASE, nr, type)
222#define AMDKFD_IOC_GET_VERSION AMDKFD_IOR(0x01, struct kfd_ioctl_get_version_args)
223/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
224#define AMDKFD_IOC_CREATE_QUEUE AMDKFD_IOWR(0x02, struct kfd_ioctl_create_queue_args)
225#define AMDKFD_IOC_DESTROY_QUEUE AMDKFD_IOWR(0x03, struct kfd_ioctl_destroy_queue_args)
226#define AMDKFD_IOC_SET_MEMORY_POLICY AMDKFD_IOW(0x04, struct kfd_ioctl_set_memory_policy_args)
227#define AMDKFD_IOC_GET_CLOCK_COUNTERS AMDKFD_IOWR(0x05, struct kfd_ioctl_get_clock_counters_args)
228/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
229#define AMDKFD_IOC_GET_PROCESS_APERTURES AMDKFD_IOR(0x06, struct kfd_ioctl_get_process_apertures_args)
230#define AMDKFD_IOC_UPDATE_QUEUE AMDKFD_IOW(0x07, struct kfd_ioctl_update_queue_args)
231#define AMDKFD_IOC_CREATE_EVENT AMDKFD_IOWR(0x08, struct kfd_ioctl_create_event_args)
232#define AMDKFD_IOC_DESTROY_EVENT AMDKFD_IOW(0x09, struct kfd_ioctl_destroy_event_args)
233/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
234#define AMDKFD_IOC_SET_EVENT AMDKFD_IOW(0x0A, struct kfd_ioctl_set_event_args)
235#define AMDKFD_IOC_RESET_EVENT AMDKFD_IOW(0x0B, struct kfd_ioctl_reset_event_args)
236#define AMDKFD_IOC_WAIT_EVENTS AMDKFD_IOWR(0x0C, struct kfd_ioctl_wait_events_args)
237#define AMDKFD_IOC_DBG_REGISTER AMDKFD_IOW(0x0D, struct kfd_ioctl_dbg_register_args)
238/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
239#define AMDKFD_IOC_DBG_UNREGISTER AMDKFD_IOW(0x0E, struct kfd_ioctl_dbg_unregister_args)
240#define AMDKFD_IOC_DBG_ADDRESS_WATCH AMDKFD_IOW(0x0F, struct kfd_ioctl_dbg_address_watch_args)
241#define AMDKFD_IOC_DBG_WAVE_CONTROL AMDKFD_IOW(0x10, struct kfd_ioctl_dbg_wave_control_args)
242#define AMDKFD_COMMAND_START 0x01
243/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
244#define AMDKFD_COMMAND_END 0x11
245#endif
246