1/****************************************************************************
2 ****************************************************************************
3 ***
4 ***   This header was automatically generated from a Linux kernel header
5 ***   of the same name, to make information necessary for userspace to
6 ***   call into the kernel available to libc.  It contains only constants,
7 ***   structures, and macros generated from the original header, and thus,
8 ***   contains no copyrightable information.
9 ***
10 ***   To edit the content of this header, modify the corresponding
11 ***   source file (e.g. under external/kernel-headers/original/) then
12 ***   run bionic/libc/kernel/tools/update_all.py
13 ***
14 ***   Any manual change here will be lost the next time this script will
15 ***   be run. You've been warned!
16 ***
17 ****************************************************************************
18 ****************************************************************************/
19#ifndef _UAPI_LINUX_PERF_EVENT_H
20#define _UAPI_LINUX_PERF_EVENT_H
21#include <linux/types.h>
22#include <linux/ioctl.h>
23/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
24#include <asm/byteorder.h>
25enum perf_type_id {
26  PERF_TYPE_HARDWARE = 0,
27  PERF_TYPE_SOFTWARE = 1,
28/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
29  PERF_TYPE_TRACEPOINT = 2,
30  PERF_TYPE_HW_CACHE = 3,
31  PERF_TYPE_RAW = 4,
32  PERF_TYPE_BREAKPOINT = 5,
33/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
34  PERF_TYPE_MAX,
35};
36enum perf_hw_id {
37  PERF_COUNT_HW_CPU_CYCLES = 0,
38/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
39  PERF_COUNT_HW_INSTRUCTIONS = 1,
40  PERF_COUNT_HW_CACHE_REFERENCES = 2,
41  PERF_COUNT_HW_CACHE_MISSES = 3,
42  PERF_COUNT_HW_BRANCH_INSTRUCTIONS = 4,
43/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
44  PERF_COUNT_HW_BRANCH_MISSES = 5,
45  PERF_COUNT_HW_BUS_CYCLES = 6,
46  PERF_COUNT_HW_STALLED_CYCLES_FRONTEND = 7,
47  PERF_COUNT_HW_STALLED_CYCLES_BACKEND = 8,
48/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
49  PERF_COUNT_HW_REF_CPU_CYCLES = 9,
50  PERF_COUNT_HW_MAX,
51};
52enum perf_hw_cache_id {
53/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
54  PERF_COUNT_HW_CACHE_L1D = 0,
55  PERF_COUNT_HW_CACHE_L1I = 1,
56  PERF_COUNT_HW_CACHE_LL = 2,
57  PERF_COUNT_HW_CACHE_DTLB = 3,
58/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
59  PERF_COUNT_HW_CACHE_ITLB = 4,
60  PERF_COUNT_HW_CACHE_BPU = 5,
61  PERF_COUNT_HW_CACHE_NODE = 6,
62  PERF_COUNT_HW_CACHE_MAX,
63/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
64};
65enum perf_hw_cache_op_id {
66  PERF_COUNT_HW_CACHE_OP_READ = 0,
67  PERF_COUNT_HW_CACHE_OP_WRITE = 1,
68/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
69  PERF_COUNT_HW_CACHE_OP_PREFETCH = 2,
70  PERF_COUNT_HW_CACHE_OP_MAX,
71};
72enum perf_hw_cache_op_result_id {
73/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
74  PERF_COUNT_HW_CACHE_RESULT_ACCESS = 0,
75  PERF_COUNT_HW_CACHE_RESULT_MISS = 1,
76  PERF_COUNT_HW_CACHE_RESULT_MAX,
77};
78/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
79enum perf_sw_ids {
80  PERF_COUNT_SW_CPU_CLOCK = 0,
81  PERF_COUNT_SW_TASK_CLOCK = 1,
82  PERF_COUNT_SW_PAGE_FAULTS = 2,
83/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
84  PERF_COUNT_SW_CONTEXT_SWITCHES = 3,
85  PERF_COUNT_SW_CPU_MIGRATIONS = 4,
86  PERF_COUNT_SW_PAGE_FAULTS_MIN = 5,
87  PERF_COUNT_SW_PAGE_FAULTS_MAJ = 6,
88/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
89  PERF_COUNT_SW_ALIGNMENT_FAULTS = 7,
90  PERF_COUNT_SW_EMULATION_FAULTS = 8,
91  PERF_COUNT_SW_DUMMY = 9,
92  PERF_COUNT_SW_BPF_OUTPUT = 10,
93/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
94  PERF_COUNT_SW_MAX,
95};
96enum perf_event_sample_format {
97  PERF_SAMPLE_IP = 1U << 0,
98/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
99  PERF_SAMPLE_TID = 1U << 1,
100  PERF_SAMPLE_TIME = 1U << 2,
101  PERF_SAMPLE_ADDR = 1U << 3,
102  PERF_SAMPLE_READ = 1U << 4,
103/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
104  PERF_SAMPLE_CALLCHAIN = 1U << 5,
105  PERF_SAMPLE_ID = 1U << 6,
106  PERF_SAMPLE_CPU = 1U << 7,
107  PERF_SAMPLE_PERIOD = 1U << 8,
108/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
109  PERF_SAMPLE_STREAM_ID = 1U << 9,
110  PERF_SAMPLE_RAW = 1U << 10,
111  PERF_SAMPLE_BRANCH_STACK = 1U << 11,
112  PERF_SAMPLE_REGS_USER = 1U << 12,
113/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
114  PERF_SAMPLE_STACK_USER = 1U << 13,
115  PERF_SAMPLE_WEIGHT = 1U << 14,
116  PERF_SAMPLE_DATA_SRC = 1U << 15,
117  PERF_SAMPLE_IDENTIFIER = 1U << 16,
118/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
119  PERF_SAMPLE_TRANSACTION = 1U << 17,
120  PERF_SAMPLE_REGS_INTR = 1U << 18,
121  PERF_SAMPLE_MAX = 1U << 19,
122};
123/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
124enum perf_branch_sample_type_shift {
125  PERF_SAMPLE_BRANCH_USER_SHIFT = 0,
126  PERF_SAMPLE_BRANCH_KERNEL_SHIFT = 1,
127  PERF_SAMPLE_BRANCH_HV_SHIFT = 2,
128/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
129  PERF_SAMPLE_BRANCH_ANY_SHIFT = 3,
130  PERF_SAMPLE_BRANCH_ANY_CALL_SHIFT = 4,
131  PERF_SAMPLE_BRANCH_ANY_RETURN_SHIFT = 5,
132  PERF_SAMPLE_BRANCH_IND_CALL_SHIFT = 6,
133/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
134  PERF_SAMPLE_BRANCH_ABORT_TX_SHIFT = 7,
135  PERF_SAMPLE_BRANCH_IN_TX_SHIFT = 8,
136  PERF_SAMPLE_BRANCH_NO_TX_SHIFT = 9,
137  PERF_SAMPLE_BRANCH_COND_SHIFT = 10,
138/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
139  PERF_SAMPLE_BRANCH_CALL_STACK_SHIFT = 11,
140  PERF_SAMPLE_BRANCH_IND_JUMP_SHIFT = 12,
141  PERF_SAMPLE_BRANCH_CALL_SHIFT = 13,
142  PERF_SAMPLE_BRANCH_MAX_SHIFT
143/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
144};
145enum perf_branch_sample_type {
146  PERF_SAMPLE_BRANCH_USER = 1U << PERF_SAMPLE_BRANCH_USER_SHIFT,
147  PERF_SAMPLE_BRANCH_KERNEL = 1U << PERF_SAMPLE_BRANCH_KERNEL_SHIFT,
148/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
149  PERF_SAMPLE_BRANCH_HV = 1U << PERF_SAMPLE_BRANCH_HV_SHIFT,
150  PERF_SAMPLE_BRANCH_ANY = 1U << PERF_SAMPLE_BRANCH_ANY_SHIFT,
151  PERF_SAMPLE_BRANCH_ANY_CALL = 1U << PERF_SAMPLE_BRANCH_ANY_CALL_SHIFT,
152  PERF_SAMPLE_BRANCH_ANY_RETURN = 1U << PERF_SAMPLE_BRANCH_ANY_RETURN_SHIFT,
153/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
154  PERF_SAMPLE_BRANCH_IND_CALL = 1U << PERF_SAMPLE_BRANCH_IND_CALL_SHIFT,
155  PERF_SAMPLE_BRANCH_ABORT_TX = 1U << PERF_SAMPLE_BRANCH_ABORT_TX_SHIFT,
156  PERF_SAMPLE_BRANCH_IN_TX = 1U << PERF_SAMPLE_BRANCH_IN_TX_SHIFT,
157  PERF_SAMPLE_BRANCH_NO_TX = 1U << PERF_SAMPLE_BRANCH_NO_TX_SHIFT,
158/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
159  PERF_SAMPLE_BRANCH_COND = 1U << PERF_SAMPLE_BRANCH_COND_SHIFT,
160  PERF_SAMPLE_BRANCH_CALL_STACK = 1U << PERF_SAMPLE_BRANCH_CALL_STACK_SHIFT,
161  PERF_SAMPLE_BRANCH_IND_JUMP = 1U << PERF_SAMPLE_BRANCH_IND_JUMP_SHIFT,
162  PERF_SAMPLE_BRANCH_CALL = 1U << PERF_SAMPLE_BRANCH_CALL_SHIFT,
163/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
164  PERF_SAMPLE_BRANCH_MAX = 1U << PERF_SAMPLE_BRANCH_MAX_SHIFT,
165};
166#define PERF_SAMPLE_BRANCH_PLM_ALL (PERF_SAMPLE_BRANCH_USER | PERF_SAMPLE_BRANCH_KERNEL | PERF_SAMPLE_BRANCH_HV)
167enum perf_sample_regs_abi {
168/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
169  PERF_SAMPLE_REGS_ABI_NONE = 0,
170  PERF_SAMPLE_REGS_ABI_32 = 1,
171  PERF_SAMPLE_REGS_ABI_64 = 2,
172};
173/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
174enum {
175  PERF_TXN_ELISION = (1 << 0),
176  PERF_TXN_TRANSACTION = (1 << 1),
177  PERF_TXN_SYNC = (1 << 2),
178/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
179  PERF_TXN_ASYNC = (1 << 3),
180  PERF_TXN_RETRY = (1 << 4),
181  PERF_TXN_CONFLICT = (1 << 5),
182  PERF_TXN_CAPACITY_WRITE = (1 << 6),
183/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
184  PERF_TXN_CAPACITY_READ = (1 << 7),
185  PERF_TXN_MAX = (1 << 8),
186  PERF_TXN_ABORT_MASK = (0xffffffffULL << 32),
187  PERF_TXN_ABORT_SHIFT = 32,
188/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
189};
190enum perf_event_read_format {
191  PERF_FORMAT_TOTAL_TIME_ENABLED = 1U << 0,
192  PERF_FORMAT_TOTAL_TIME_RUNNING = 1U << 1,
193/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
194  PERF_FORMAT_ID = 1U << 2,
195  PERF_FORMAT_GROUP = 1U << 3,
196  PERF_FORMAT_MAX = 1U << 4,
197};
198/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
199#define PERF_ATTR_SIZE_VER0 64
200#define PERF_ATTR_SIZE_VER1 72
201#define PERF_ATTR_SIZE_VER2 80
202#define PERF_ATTR_SIZE_VER3 96
203/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
204#define PERF_ATTR_SIZE_VER4 104
205#define PERF_ATTR_SIZE_VER5 112
206struct perf_event_attr {
207  __u32 type;
208/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
209  __u32 size;
210  __u64 config;
211  union {
212    __u64 sample_period;
213/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
214    __u64 sample_freq;
215  };
216  __u64 sample_type;
217  __u64 read_format;
218/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
219  __u64 disabled : 1, inherit : 1, pinned : 1, exclusive : 1, exclude_user : 1, exclude_kernel : 1, exclude_hv : 1, exclude_idle : 1, mmap : 1, comm : 1, freq : 1, inherit_stat : 1, enable_on_exec : 1, task : 1, watermark : 1, precise_ip : 2, mmap_data : 1, sample_id_all : 1, exclude_host : 1, exclude_guest : 1, exclude_callchain_kernel : 1, exclude_callchain_user : 1, mmap2 : 1, comm_exec : 1, use_clockid : 1, context_switch : 1, __reserved_1 : 37;
220  union {
221    __u32 wakeup_events;
222    __u32 wakeup_watermark;
223/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
224  };
225  __u32 bp_type;
226  union {
227    __u64 bp_addr;
228/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
229    __u64 config1;
230  };
231  union {
232    __u64 bp_len;
233/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
234    __u64 config2;
235  };
236  __u64 branch_sample_type;
237  __u64 sample_regs_user;
238/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
239  __u32 sample_stack_user;
240  __s32 clockid;
241  __u64 sample_regs_intr;
242  __u32 aux_watermark;
243/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
244  __u32 __reserved_2;
245};
246#define perf_flags(attr) (* (& (attr)->read_format + 1))
247#define PERF_EVENT_IOC_ENABLE _IO('$', 0)
248/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
249#define PERF_EVENT_IOC_DISABLE _IO('$', 1)
250#define PERF_EVENT_IOC_REFRESH _IO('$', 2)
251#define PERF_EVENT_IOC_RESET _IO('$', 3)
252#define PERF_EVENT_IOC_PERIOD _IOW('$', 4, __u64)
253/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
254#define PERF_EVENT_IOC_SET_OUTPUT _IO('$', 5)
255#define PERF_EVENT_IOC_SET_FILTER _IOW('$', 6, char *)
256#define PERF_EVENT_IOC_ID _IOR('$', 7, __u64 *)
257#define PERF_EVENT_IOC_SET_BPF _IOW('$', 8, __u32)
258/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
259enum perf_event_ioc_flags {
260  PERF_IOC_FLAG_GROUP = 1U << 0,
261};
262struct perf_event_mmap_page {
263/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
264  __u32 version;
265  __u32 compat_version;
266  __u32 lock;
267  __u32 index;
268/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
269  __s64 offset;
270  __u64 time_enabled;
271  __u64 time_running;
272  union {
273/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
274    __u64 capabilities;
275    struct {
276      __u64 cap_bit0 : 1, cap_bit0_is_deprecated : 1, cap_user_rdpmc : 1, cap_user_time : 1, cap_user_time_zero : 1, cap_____res : 59;
277    };
278/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
279  };
280  __u16 pmc_width;
281  __u16 time_shift;
282  __u32 time_mult;
283/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
284  __u64 time_offset;
285  __u64 time_zero;
286  __u32 size;
287  __u8 __reserved[118 * 8 + 4];
288/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
289  __u64 data_head;
290  __u64 data_tail;
291  __u64 data_offset;
292  __u64 data_size;
293/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
294  __u64 aux_head;
295  __u64 aux_tail;
296  __u64 aux_offset;
297  __u64 aux_size;
298/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
299};
300#define PERF_RECORD_MISC_CPUMODE_MASK (7 << 0)
301#define PERF_RECORD_MISC_CPUMODE_UNKNOWN (0 << 0)
302#define PERF_RECORD_MISC_KERNEL (1 << 0)
303/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
304#define PERF_RECORD_MISC_USER (2 << 0)
305#define PERF_RECORD_MISC_HYPERVISOR (3 << 0)
306#define PERF_RECORD_MISC_GUEST_KERNEL (4 << 0)
307#define PERF_RECORD_MISC_GUEST_USER (5 << 0)
308/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
309#define PERF_RECORD_MISC_PROC_MAP_PARSE_TIMEOUT (1 << 12)
310#define PERF_RECORD_MISC_MMAP_DATA (1 << 13)
311#define PERF_RECORD_MISC_COMM_EXEC (1 << 13)
312#define PERF_RECORD_MISC_SWITCH_OUT (1 << 13)
313/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
314#define PERF_RECORD_MISC_EXACT_IP (1 << 14)
315#define PERF_RECORD_MISC_EXT_RESERVED (1 << 15)
316struct perf_event_header {
317  __u32 type;
318/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
319  __u16 misc;
320  __u16 size;
321};
322enum perf_event_type {
323/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
324  PERF_RECORD_MMAP = 1,
325  PERF_RECORD_LOST = 2,
326  PERF_RECORD_COMM = 3,
327  PERF_RECORD_EXIT = 4,
328/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
329  PERF_RECORD_THROTTLE = 5,
330  PERF_RECORD_UNTHROTTLE = 6,
331  PERF_RECORD_FORK = 7,
332  PERF_RECORD_READ = 8,
333/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
334  PERF_RECORD_SAMPLE = 9,
335  PERF_RECORD_MMAP2 = 10,
336  PERF_RECORD_AUX = 11,
337  PERF_RECORD_ITRACE_START = 12,
338/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
339  PERF_RECORD_LOST_SAMPLES = 13,
340  PERF_RECORD_SWITCH = 14,
341  PERF_RECORD_SWITCH_CPU_WIDE = 15,
342  PERF_RECORD_MAX,
343/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
344};
345#define PERF_MAX_STACK_DEPTH 127
346enum perf_callchain_context {
347  PERF_CONTEXT_HV = (__u64) - 32,
348/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
349  PERF_CONTEXT_KERNEL = (__u64) - 128,
350  PERF_CONTEXT_USER = (__u64) - 512,
351  PERF_CONTEXT_GUEST = (__u64) - 2048,
352  PERF_CONTEXT_GUEST_KERNEL = (__u64) - 2176,
353/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
354  PERF_CONTEXT_GUEST_USER = (__u64) - 2560,
355  PERF_CONTEXT_MAX = (__u64) - 4095,
356};
357#define PERF_AUX_FLAG_TRUNCATED 0x01
358/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
359#define PERF_AUX_FLAG_OVERWRITE 0x02
360#define PERF_FLAG_FD_NO_GROUP (1UL << 0)
361#define PERF_FLAG_FD_OUTPUT (1UL << 1)
362#define PERF_FLAG_PID_CGROUP (1UL << 2)
363/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
364#define PERF_FLAG_FD_CLOEXEC (1UL << 3)
365union perf_mem_data_src {
366  __u64 val;
367  struct {
368/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
369    __u64 mem_op : 5, mem_lvl : 14, mem_snoop : 5, mem_lock : 2, mem_dtlb : 7, mem_rsvd : 31;
370  };
371};
372#define PERF_MEM_OP_NA 0x01
373/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
374#define PERF_MEM_OP_LOAD 0x02
375#define PERF_MEM_OP_STORE 0x04
376#define PERF_MEM_OP_PFETCH 0x08
377#define PERF_MEM_OP_EXEC 0x10
378/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
379#define PERF_MEM_OP_SHIFT 0
380#define PERF_MEM_LVL_NA 0x01
381#define PERF_MEM_LVL_HIT 0x02
382#define PERF_MEM_LVL_MISS 0x04
383/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
384#define PERF_MEM_LVL_L1 0x08
385#define PERF_MEM_LVL_LFB 0x10
386#define PERF_MEM_LVL_L2 0x20
387#define PERF_MEM_LVL_L3 0x40
388/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
389#define PERF_MEM_LVL_LOC_RAM 0x80
390#define PERF_MEM_LVL_REM_RAM1 0x100
391#define PERF_MEM_LVL_REM_RAM2 0x200
392#define PERF_MEM_LVL_REM_CCE1 0x400
393/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
394#define PERF_MEM_LVL_REM_CCE2 0x800
395#define PERF_MEM_LVL_IO 0x1000
396#define PERF_MEM_LVL_UNC 0x2000
397#define PERF_MEM_LVL_SHIFT 5
398/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
399#define PERF_MEM_SNOOP_NA 0x01
400#define PERF_MEM_SNOOP_NONE 0x02
401#define PERF_MEM_SNOOP_HIT 0x04
402#define PERF_MEM_SNOOP_MISS 0x08
403/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
404#define PERF_MEM_SNOOP_HITM 0x10
405#define PERF_MEM_SNOOP_SHIFT 19
406#define PERF_MEM_LOCK_NA 0x01
407#define PERF_MEM_LOCK_LOCKED 0x02
408/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
409#define PERF_MEM_LOCK_SHIFT 24
410#define PERF_MEM_TLB_NA 0x01
411#define PERF_MEM_TLB_HIT 0x02
412#define PERF_MEM_TLB_MISS 0x04
413/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
414#define PERF_MEM_TLB_L1 0x08
415#define PERF_MEM_TLB_L2 0x10
416#define PERF_MEM_TLB_WK 0x20
417#define PERF_MEM_TLB_OS 0x40
418/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
419#define PERF_MEM_TLB_SHIFT 26
420#define PERF_MEM_S(a,s) (((__u64) PERF_MEM_ ##a ##_ ##s) << PERF_MEM_ ##a ##_SHIFT)
421struct perf_branch_entry {
422  __u64 from;
423/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
424  __u64 to;
425  __u64 mispred : 1, predicted : 1, in_tx : 1, abort : 1, cycles : 16, reserved : 44;
426};
427#endif
428/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
429