TargetInfo.cpp revision 107196cb219128bfddde53f4718e5c9aa3a41ba6
1//===---- TargetInfo.cpp - Encapsulate target details -----------*- C++ -*-===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// These classes wrap the information about a call or function 11// definition used to handle ABI compliancy. 12// 13//===----------------------------------------------------------------------===// 14 15#include "TargetInfo.h" 16#include "ABIInfo.h" 17#include "CGCXXABI.h" 18#include "CodeGenFunction.h" 19#include "clang/AST/RecordLayout.h" 20#include "clang/Frontend/CodeGenOptions.h" 21#include "llvm/ADT/Triple.h" 22#include "llvm/IR/DataLayout.h" 23#include "llvm/IR/Type.h" 24#include "llvm/Support/raw_ostream.h" 25using namespace clang; 26using namespace CodeGen; 27 28static void AssignToArrayRange(CodeGen::CGBuilderTy &Builder, 29 llvm::Value *Array, 30 llvm::Value *Value, 31 unsigned FirstIndex, 32 unsigned LastIndex) { 33 // Alternatively, we could emit this as a loop in the source. 34 for (unsigned I = FirstIndex; I <= LastIndex; ++I) { 35 llvm::Value *Cell = Builder.CreateConstInBoundsGEP1_32(Array, I); 36 Builder.CreateStore(Value, Cell); 37 } 38} 39 40static bool isAggregateTypeForABI(QualType T) { 41 return !CodeGenFunction::hasScalarEvaluationKind(T) || 42 T->isMemberFunctionPointerType(); 43} 44 45ABIInfo::~ABIInfo() {} 46 47static bool isRecordReturnIndirect(const RecordType *RT, CodeGen::CodeGenTypes &CGT) { 48 const CXXRecordDecl *RD = dyn_cast<CXXRecordDecl>(RT->getDecl()); 49 if (!RD) 50 return false; 51 return CGT.CGM.getCXXABI().isReturnTypeIndirect(RD); 52} 53 54 55static bool isRecordReturnIndirect(QualType T, CodeGen::CodeGenTypes &CGT) { 56 const RecordType *RT = T->getAs<RecordType>(); 57 if (!RT) 58 return false; 59 return isRecordReturnIndirect(RT, CGT); 60} 61 62static CGCXXABI::RecordArgABI getRecordArgABI(const RecordType *RT, 63 CodeGen::CodeGenTypes &CGT) { 64 const CXXRecordDecl *RD = dyn_cast<CXXRecordDecl>(RT->getDecl()); 65 if (!RD) 66 return CGCXXABI::RAA_Default; 67 return CGT.CGM.getCXXABI().getRecordArgABI(RD); 68} 69 70static CGCXXABI::RecordArgABI getRecordArgABI(QualType T, 71 CodeGen::CodeGenTypes &CGT) { 72 const RecordType *RT = T->getAs<RecordType>(); 73 if (!RT) 74 return CGCXXABI::RAA_Default; 75 return getRecordArgABI(RT, CGT); 76} 77 78ASTContext &ABIInfo::getContext() const { 79 return CGT.getContext(); 80} 81 82llvm::LLVMContext &ABIInfo::getVMContext() const { 83 return CGT.getLLVMContext(); 84} 85 86const llvm::DataLayout &ABIInfo::getDataLayout() const { 87 return CGT.getDataLayout(); 88} 89 90const TargetInfo &ABIInfo::getTarget() const { 91 return CGT.getTarget(); 92} 93 94void ABIArgInfo::dump() const { 95 raw_ostream &OS = llvm::errs(); 96 OS << "(ABIArgInfo Kind="; 97 switch (TheKind) { 98 case Direct: 99 OS << "Direct Type="; 100 if (llvm::Type *Ty = getCoerceToType()) 101 Ty->print(OS); 102 else 103 OS << "null"; 104 break; 105 case Extend: 106 OS << "Extend"; 107 break; 108 case Ignore: 109 OS << "Ignore"; 110 break; 111 case Indirect: 112 OS << "Indirect Align=" << getIndirectAlign() 113 << " ByVal=" << getIndirectByVal() 114 << " Realign=" << getIndirectRealign(); 115 break; 116 case Expand: 117 OS << "Expand"; 118 break; 119 } 120 OS << ")\n"; 121} 122 123TargetCodeGenInfo::~TargetCodeGenInfo() { delete Info; } 124 125// If someone can figure out a general rule for this, that would be great. 126// It's probably just doomed to be platform-dependent, though. 127unsigned TargetCodeGenInfo::getSizeOfUnwindException() const { 128 // Verified for: 129 // x86-64 FreeBSD, Linux, Darwin 130 // x86-32 FreeBSD, Linux, Darwin 131 // PowerPC Linux, Darwin 132 // ARM Darwin (*not* EABI) 133 // AArch64 Linux 134 return 32; 135} 136 137bool TargetCodeGenInfo::isNoProtoCallVariadic(const CallArgList &args, 138 const FunctionNoProtoType *fnType) const { 139 // The following conventions are known to require this to be false: 140 // x86_stdcall 141 // MIPS 142 // For everything else, we just prefer false unless we opt out. 143 return false; 144} 145 146void 147TargetCodeGenInfo::getDependentLibraryOption(llvm::StringRef Lib, 148 llvm::SmallString<24> &Opt) const { 149 // This assumes the user is passing a library name like "rt" instead of a 150 // filename like "librt.a/so", and that they don't care whether it's static or 151 // dynamic. 152 Opt = "-l"; 153 Opt += Lib; 154} 155 156static bool isEmptyRecord(ASTContext &Context, QualType T, bool AllowArrays); 157 158/// isEmptyField - Return true iff a the field is "empty", that is it 159/// is an unnamed bit-field or an (array of) empty record(s). 160static bool isEmptyField(ASTContext &Context, const FieldDecl *FD, 161 bool AllowArrays) { 162 if (FD->isUnnamedBitfield()) 163 return true; 164 165 QualType FT = FD->getType(); 166 167 // Constant arrays of empty records count as empty, strip them off. 168 // Constant arrays of zero length always count as empty. 169 if (AllowArrays) 170 while (const ConstantArrayType *AT = Context.getAsConstantArrayType(FT)) { 171 if (AT->getSize() == 0) 172 return true; 173 FT = AT->getElementType(); 174 } 175 176 const RecordType *RT = FT->getAs<RecordType>(); 177 if (!RT) 178 return false; 179 180 // C++ record fields are never empty, at least in the Itanium ABI. 181 // 182 // FIXME: We should use a predicate for whether this behavior is true in the 183 // current ABI. 184 if (isa<CXXRecordDecl>(RT->getDecl())) 185 return false; 186 187 return isEmptyRecord(Context, FT, AllowArrays); 188} 189 190/// isEmptyRecord - Return true iff a structure contains only empty 191/// fields. Note that a structure with a flexible array member is not 192/// considered empty. 193static bool isEmptyRecord(ASTContext &Context, QualType T, bool AllowArrays) { 194 const RecordType *RT = T->getAs<RecordType>(); 195 if (!RT) 196 return 0; 197 const RecordDecl *RD = RT->getDecl(); 198 if (RD->hasFlexibleArrayMember()) 199 return false; 200 201 // If this is a C++ record, check the bases first. 202 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) 203 for (CXXRecordDecl::base_class_const_iterator i = CXXRD->bases_begin(), 204 e = CXXRD->bases_end(); i != e; ++i) 205 if (!isEmptyRecord(Context, i->getType(), true)) 206 return false; 207 208 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 209 i != e; ++i) 210 if (!isEmptyField(Context, *i, AllowArrays)) 211 return false; 212 return true; 213} 214 215/// isSingleElementStruct - Determine if a structure is a "single 216/// element struct", i.e. it has exactly one non-empty field or 217/// exactly one field which is itself a single element 218/// struct. Structures with flexible array members are never 219/// considered single element structs. 220/// 221/// \return The field declaration for the single non-empty field, if 222/// it exists. 223static const Type *isSingleElementStruct(QualType T, ASTContext &Context) { 224 const RecordType *RT = T->getAsStructureType(); 225 if (!RT) 226 return 0; 227 228 const RecordDecl *RD = RT->getDecl(); 229 if (RD->hasFlexibleArrayMember()) 230 return 0; 231 232 const Type *Found = 0; 233 234 // If this is a C++ record, check the bases first. 235 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) { 236 for (CXXRecordDecl::base_class_const_iterator i = CXXRD->bases_begin(), 237 e = CXXRD->bases_end(); i != e; ++i) { 238 // Ignore empty records. 239 if (isEmptyRecord(Context, i->getType(), true)) 240 continue; 241 242 // If we already found an element then this isn't a single-element struct. 243 if (Found) 244 return 0; 245 246 // If this is non-empty and not a single element struct, the composite 247 // cannot be a single element struct. 248 Found = isSingleElementStruct(i->getType(), Context); 249 if (!Found) 250 return 0; 251 } 252 } 253 254 // Check for single element. 255 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 256 i != e; ++i) { 257 const FieldDecl *FD = *i; 258 QualType FT = FD->getType(); 259 260 // Ignore empty fields. 261 if (isEmptyField(Context, FD, true)) 262 continue; 263 264 // If we already found an element then this isn't a single-element 265 // struct. 266 if (Found) 267 return 0; 268 269 // Treat single element arrays as the element. 270 while (const ConstantArrayType *AT = Context.getAsConstantArrayType(FT)) { 271 if (AT->getSize().getZExtValue() != 1) 272 break; 273 FT = AT->getElementType(); 274 } 275 276 if (!isAggregateTypeForABI(FT)) { 277 Found = FT.getTypePtr(); 278 } else { 279 Found = isSingleElementStruct(FT, Context); 280 if (!Found) 281 return 0; 282 } 283 } 284 285 // We don't consider a struct a single-element struct if it has 286 // padding beyond the element type. 287 if (Found && Context.getTypeSize(Found) != Context.getTypeSize(T)) 288 return 0; 289 290 return Found; 291} 292 293static bool is32Or64BitBasicType(QualType Ty, ASTContext &Context) { 294 // Treat complex types as the element type. 295 if (const ComplexType *CTy = Ty->getAs<ComplexType>()) 296 Ty = CTy->getElementType(); 297 298 // Check for a type which we know has a simple scalar argument-passing 299 // convention without any padding. (We're specifically looking for 32 300 // and 64-bit integer and integer-equivalents, float, and double.) 301 if (!Ty->getAs<BuiltinType>() && !Ty->hasPointerRepresentation() && 302 !Ty->isEnumeralType() && !Ty->isBlockPointerType()) 303 return false; 304 305 uint64_t Size = Context.getTypeSize(Ty); 306 return Size == 32 || Size == 64; 307} 308 309/// canExpandIndirectArgument - Test whether an argument type which is to be 310/// passed indirectly (on the stack) would have the equivalent layout if it was 311/// expanded into separate arguments. If so, we prefer to do the latter to avoid 312/// inhibiting optimizations. 313/// 314// FIXME: This predicate is missing many cases, currently it just follows 315// llvm-gcc (checks that all fields are 32-bit or 64-bit primitive types). We 316// should probably make this smarter, or better yet make the LLVM backend 317// capable of handling it. 318static bool canExpandIndirectArgument(QualType Ty, ASTContext &Context) { 319 // We can only expand structure types. 320 const RecordType *RT = Ty->getAs<RecordType>(); 321 if (!RT) 322 return false; 323 324 // We can only expand (C) structures. 325 // 326 // FIXME: This needs to be generalized to handle classes as well. 327 const RecordDecl *RD = RT->getDecl(); 328 if (!RD->isStruct() || isa<CXXRecordDecl>(RD)) 329 return false; 330 331 uint64_t Size = 0; 332 333 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 334 i != e; ++i) { 335 const FieldDecl *FD = *i; 336 337 if (!is32Or64BitBasicType(FD->getType(), Context)) 338 return false; 339 340 // FIXME: Reject bit-fields wholesale; there are two problems, we don't know 341 // how to expand them yet, and the predicate for telling if a bitfield still 342 // counts as "basic" is more complicated than what we were doing previously. 343 if (FD->isBitField()) 344 return false; 345 346 Size += Context.getTypeSize(FD->getType()); 347 } 348 349 // Make sure there are not any holes in the struct. 350 if (Size != Context.getTypeSize(Ty)) 351 return false; 352 353 return true; 354} 355 356namespace { 357/// DefaultABIInfo - The default implementation for ABI specific 358/// details. This implementation provides information which results in 359/// self-consistent and sensible LLVM IR generation, but does not 360/// conform to any particular ABI. 361class DefaultABIInfo : public ABIInfo { 362public: 363 DefaultABIInfo(CodeGen::CodeGenTypes &CGT) : ABIInfo(CGT) {} 364 365 ABIArgInfo classifyReturnType(QualType RetTy) const; 366 ABIArgInfo classifyArgumentType(QualType RetTy) const; 367 368 virtual void computeInfo(CGFunctionInfo &FI) const { 369 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 370 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 371 it != ie; ++it) 372 it->info = classifyArgumentType(it->type); 373 } 374 375 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 376 CodeGenFunction &CGF) const; 377}; 378 379class DefaultTargetCodeGenInfo : public TargetCodeGenInfo { 380public: 381 DefaultTargetCodeGenInfo(CodeGen::CodeGenTypes &CGT) 382 : TargetCodeGenInfo(new DefaultABIInfo(CGT)) {} 383}; 384 385llvm::Value *DefaultABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 386 CodeGenFunction &CGF) const { 387 return 0; 388} 389 390ABIArgInfo DefaultABIInfo::classifyArgumentType(QualType Ty) const { 391 if (isAggregateTypeForABI(Ty)) { 392 // Records with non trivial destructors/constructors should not be passed 393 // by value. 394 if (isRecordReturnIndirect(Ty, CGT)) 395 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 396 397 return ABIArgInfo::getIndirect(0); 398 } 399 400 // Treat an enum type as its underlying type. 401 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 402 Ty = EnumTy->getDecl()->getIntegerType(); 403 404 return (Ty->isPromotableIntegerType() ? 405 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 406} 407 408ABIArgInfo DefaultABIInfo::classifyReturnType(QualType RetTy) const { 409 if (RetTy->isVoidType()) 410 return ABIArgInfo::getIgnore(); 411 412 if (isAggregateTypeForABI(RetTy)) 413 return ABIArgInfo::getIndirect(0); 414 415 // Treat an enum type as its underlying type. 416 if (const EnumType *EnumTy = RetTy->getAs<EnumType>()) 417 RetTy = EnumTy->getDecl()->getIntegerType(); 418 419 return (RetTy->isPromotableIntegerType() ? 420 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 421} 422 423//===----------------------------------------------------------------------===// 424// le32/PNaCl bitcode ABI Implementation 425// 426// This is a simplified version of the x86_32 ABI. Arguments and return values 427// are always passed on the stack. 428//===----------------------------------------------------------------------===// 429 430class PNaClABIInfo : public ABIInfo { 431 public: 432 PNaClABIInfo(CodeGen::CodeGenTypes &CGT) : ABIInfo(CGT) {} 433 434 ABIArgInfo classifyReturnType(QualType RetTy) const; 435 ABIArgInfo classifyArgumentType(QualType RetTy) const; 436 437 virtual void computeInfo(CGFunctionInfo &FI) const; 438 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 439 CodeGenFunction &CGF) const; 440}; 441 442class PNaClTargetCodeGenInfo : public TargetCodeGenInfo { 443 public: 444 PNaClTargetCodeGenInfo(CodeGen::CodeGenTypes &CGT) 445 : TargetCodeGenInfo(new PNaClABIInfo(CGT)) {} 446}; 447 448void PNaClABIInfo::computeInfo(CGFunctionInfo &FI) const { 449 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 450 451 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 452 it != ie; ++it) 453 it->info = classifyArgumentType(it->type); 454 } 455 456llvm::Value *PNaClABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 457 CodeGenFunction &CGF) const { 458 return 0; 459} 460 461/// \brief Classify argument of given type \p Ty. 462ABIArgInfo PNaClABIInfo::classifyArgumentType(QualType Ty) const { 463 if (isAggregateTypeForABI(Ty)) { 464 if (CGCXXABI::RecordArgABI RAA = getRecordArgABI(Ty, CGT)) 465 return ABIArgInfo::getIndirect(0, RAA == CGCXXABI::RAA_DirectInMemory); 466 return ABIArgInfo::getIndirect(0); 467 } else if (const EnumType *EnumTy = Ty->getAs<EnumType>()) { 468 // Treat an enum type as its underlying type. 469 Ty = EnumTy->getDecl()->getIntegerType(); 470 } else if (Ty->isFloatingType()) { 471 // Floating-point types don't go inreg. 472 return ABIArgInfo::getDirect(); 473 } 474 475 return (Ty->isPromotableIntegerType() ? 476 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 477} 478 479ABIArgInfo PNaClABIInfo::classifyReturnType(QualType RetTy) const { 480 if (RetTy->isVoidType()) 481 return ABIArgInfo::getIgnore(); 482 483 // In the PNaCl ABI we always return records/structures on the stack. 484 if (isAggregateTypeForABI(RetTy)) 485 return ABIArgInfo::getIndirect(0); 486 487 // Treat an enum type as its underlying type. 488 if (const EnumType *EnumTy = RetTy->getAs<EnumType>()) 489 RetTy = EnumTy->getDecl()->getIntegerType(); 490 491 return (RetTy->isPromotableIntegerType() ? 492 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 493} 494 495/// IsX86_MMXType - Return true if this is an MMX type. 496bool IsX86_MMXType(llvm::Type *IRType) { 497 // Return true if the type is an MMX type <2 x i32>, <4 x i16>, or <8 x i8>. 498 return IRType->isVectorTy() && IRType->getPrimitiveSizeInBits() == 64 && 499 cast<llvm::VectorType>(IRType)->getElementType()->isIntegerTy() && 500 IRType->getScalarSizeInBits() != 64; 501} 502 503static llvm::Type* X86AdjustInlineAsmType(CodeGen::CodeGenFunction &CGF, 504 StringRef Constraint, 505 llvm::Type* Ty) { 506 if ((Constraint == "y" || Constraint == "&y") && Ty->isVectorTy()) 507 return llvm::Type::getX86_MMXTy(CGF.getLLVMContext()); 508 return Ty; 509} 510 511//===----------------------------------------------------------------------===// 512// X86-32 ABI Implementation 513//===----------------------------------------------------------------------===// 514 515/// X86_32ABIInfo - The X86-32 ABI information. 516class X86_32ABIInfo : public ABIInfo { 517 enum Class { 518 Integer, 519 Float 520 }; 521 522 static const unsigned MinABIStackAlignInBytes = 4; 523 524 bool IsDarwinVectorABI; 525 bool IsSmallStructInRegABI; 526 bool IsWin32StructABI; 527 unsigned DefaultNumRegisterParameters; 528 529 static bool isRegisterSize(unsigned Size) { 530 return (Size == 8 || Size == 16 || Size == 32 || Size == 64); 531 } 532 533 static bool shouldReturnTypeInRegister(QualType Ty, ASTContext &Context, 534 unsigned callingConvention); 535 536 /// getIndirectResult - Give a source type \arg Ty, return a suitable result 537 /// such that the argument will be passed in memory. 538 ABIArgInfo getIndirectResult(QualType Ty, bool ByVal, 539 unsigned &FreeRegs) const; 540 541 /// \brief Return the alignment to use for the given type on the stack. 542 unsigned getTypeStackAlignInBytes(QualType Ty, unsigned Align) const; 543 544 Class classify(QualType Ty) const; 545 ABIArgInfo classifyReturnType(QualType RetTy, 546 unsigned callingConvention) const; 547 ABIArgInfo classifyArgumentType(QualType RetTy, unsigned &FreeRegs, 548 bool IsFastCall) const; 549 bool shouldUseInReg(QualType Ty, unsigned &FreeRegs, 550 bool IsFastCall, bool &NeedsPadding) const; 551 552public: 553 554 virtual void computeInfo(CGFunctionInfo &FI) const; 555 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 556 CodeGenFunction &CGF) const; 557 558 X86_32ABIInfo(CodeGen::CodeGenTypes &CGT, bool d, bool p, bool w, 559 unsigned r) 560 : ABIInfo(CGT), IsDarwinVectorABI(d), IsSmallStructInRegABI(p), 561 IsWin32StructABI(w), DefaultNumRegisterParameters(r) {} 562}; 563 564class X86_32TargetCodeGenInfo : public TargetCodeGenInfo { 565public: 566 X86_32TargetCodeGenInfo(CodeGen::CodeGenTypes &CGT, 567 bool d, bool p, bool w, unsigned r) 568 :TargetCodeGenInfo(new X86_32ABIInfo(CGT, d, p, w, r)) {} 569 570 void SetTargetAttributes(const Decl *D, llvm::GlobalValue *GV, 571 CodeGen::CodeGenModule &CGM) const; 572 573 int getDwarfEHStackPointer(CodeGen::CodeGenModule &CGM) const { 574 // Darwin uses different dwarf register numbers for EH. 575 if (CGM.getTarget().getTriple().isOSDarwin()) return 5; 576 return 4; 577 } 578 579 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 580 llvm::Value *Address) const; 581 582 llvm::Type* adjustInlineAsmType(CodeGen::CodeGenFunction &CGF, 583 StringRef Constraint, 584 llvm::Type* Ty) const { 585 return X86AdjustInlineAsmType(CGF, Constraint, Ty); 586 } 587 588}; 589 590} 591 592/// shouldReturnTypeInRegister - Determine if the given type should be 593/// passed in a register (for the Darwin ABI). 594bool X86_32ABIInfo::shouldReturnTypeInRegister(QualType Ty, 595 ASTContext &Context, 596 unsigned callingConvention) { 597 uint64_t Size = Context.getTypeSize(Ty); 598 599 // Type must be register sized. 600 if (!isRegisterSize(Size)) 601 return false; 602 603 if (Ty->isVectorType()) { 604 // 64- and 128- bit vectors inside structures are not returned in 605 // registers. 606 if (Size == 64 || Size == 128) 607 return false; 608 609 return true; 610 } 611 612 // If this is a builtin, pointer, enum, complex type, member pointer, or 613 // member function pointer it is ok. 614 if (Ty->getAs<BuiltinType>() || Ty->hasPointerRepresentation() || 615 Ty->isAnyComplexType() || Ty->isEnumeralType() || 616 Ty->isBlockPointerType() || Ty->isMemberPointerType()) 617 return true; 618 619 // Arrays are treated like records. 620 if (const ConstantArrayType *AT = Context.getAsConstantArrayType(Ty)) 621 return shouldReturnTypeInRegister(AT->getElementType(), Context, 622 callingConvention); 623 624 // Otherwise, it must be a record type. 625 const RecordType *RT = Ty->getAs<RecordType>(); 626 if (!RT) return false; 627 628 // FIXME: Traverse bases here too. 629 630 // For thiscall conventions, structures will never be returned in 631 // a register. This is for compatibility with the MSVC ABI 632 if (callingConvention == llvm::CallingConv::X86_ThisCall && 633 RT->isStructureType()) { 634 return false; 635 } 636 637 // Structure types are passed in register if all fields would be 638 // passed in a register. 639 for (RecordDecl::field_iterator i = RT->getDecl()->field_begin(), 640 e = RT->getDecl()->field_end(); i != e; ++i) { 641 const FieldDecl *FD = *i; 642 643 // Empty fields are ignored. 644 if (isEmptyField(Context, FD, true)) 645 continue; 646 647 // Check fields recursively. 648 if (!shouldReturnTypeInRegister(FD->getType(), Context, 649 callingConvention)) 650 return false; 651 } 652 return true; 653} 654 655ABIArgInfo X86_32ABIInfo::classifyReturnType(QualType RetTy, 656 unsigned callingConvention) const { 657 if (RetTy->isVoidType()) 658 return ABIArgInfo::getIgnore(); 659 660 if (const VectorType *VT = RetTy->getAs<VectorType>()) { 661 // On Darwin, some vectors are returned in registers. 662 if (IsDarwinVectorABI) { 663 uint64_t Size = getContext().getTypeSize(RetTy); 664 665 // 128-bit vectors are a special case; they are returned in 666 // registers and we need to make sure to pick a type the LLVM 667 // backend will like. 668 if (Size == 128) 669 return ABIArgInfo::getDirect(llvm::VectorType::get( 670 llvm::Type::getInt64Ty(getVMContext()), 2)); 671 672 // Always return in register if it fits in a general purpose 673 // register, or if it is 64 bits and has a single element. 674 if ((Size == 8 || Size == 16 || Size == 32) || 675 (Size == 64 && VT->getNumElements() == 1)) 676 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(), 677 Size)); 678 679 return ABIArgInfo::getIndirect(0); 680 } 681 682 return ABIArgInfo::getDirect(); 683 } 684 685 if (isAggregateTypeForABI(RetTy)) { 686 if (const RecordType *RT = RetTy->getAs<RecordType>()) { 687 if (isRecordReturnIndirect(RT, CGT)) 688 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 689 690 // Structures with flexible arrays are always indirect. 691 if (RT->getDecl()->hasFlexibleArrayMember()) 692 return ABIArgInfo::getIndirect(0); 693 } 694 695 // If specified, structs and unions are always indirect. 696 if (!IsSmallStructInRegABI && !RetTy->isAnyComplexType()) 697 return ABIArgInfo::getIndirect(0); 698 699 // Small structures which are register sized are generally returned 700 // in a register. 701 if (X86_32ABIInfo::shouldReturnTypeInRegister(RetTy, getContext(), 702 callingConvention)) { 703 uint64_t Size = getContext().getTypeSize(RetTy); 704 705 // As a special-case, if the struct is a "single-element" struct, and 706 // the field is of type "float" or "double", return it in a 707 // floating-point register. (MSVC does not apply this special case.) 708 // We apply a similar transformation for pointer types to improve the 709 // quality of the generated IR. 710 if (const Type *SeltTy = isSingleElementStruct(RetTy, getContext())) 711 if ((!IsWin32StructABI && SeltTy->isRealFloatingType()) 712 || SeltTy->hasPointerRepresentation()) 713 return ABIArgInfo::getDirect(CGT.ConvertType(QualType(SeltTy, 0))); 714 715 // FIXME: We should be able to narrow this integer in cases with dead 716 // padding. 717 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(),Size)); 718 } 719 720 return ABIArgInfo::getIndirect(0); 721 } 722 723 // Treat an enum type as its underlying type. 724 if (const EnumType *EnumTy = RetTy->getAs<EnumType>()) 725 RetTy = EnumTy->getDecl()->getIntegerType(); 726 727 return (RetTy->isPromotableIntegerType() ? 728 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 729} 730 731static bool isSSEVectorType(ASTContext &Context, QualType Ty) { 732 return Ty->getAs<VectorType>() && Context.getTypeSize(Ty) == 128; 733} 734 735static bool isRecordWithSSEVectorType(ASTContext &Context, QualType Ty) { 736 const RecordType *RT = Ty->getAs<RecordType>(); 737 if (!RT) 738 return 0; 739 const RecordDecl *RD = RT->getDecl(); 740 741 // If this is a C++ record, check the bases first. 742 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) 743 for (CXXRecordDecl::base_class_const_iterator i = CXXRD->bases_begin(), 744 e = CXXRD->bases_end(); i != e; ++i) 745 if (!isRecordWithSSEVectorType(Context, i->getType())) 746 return false; 747 748 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 749 i != e; ++i) { 750 QualType FT = i->getType(); 751 752 if (isSSEVectorType(Context, FT)) 753 return true; 754 755 if (isRecordWithSSEVectorType(Context, FT)) 756 return true; 757 } 758 759 return false; 760} 761 762unsigned X86_32ABIInfo::getTypeStackAlignInBytes(QualType Ty, 763 unsigned Align) const { 764 // Otherwise, if the alignment is less than or equal to the minimum ABI 765 // alignment, just use the default; the backend will handle this. 766 if (Align <= MinABIStackAlignInBytes) 767 return 0; // Use default alignment. 768 769 // On non-Darwin, the stack type alignment is always 4. 770 if (!IsDarwinVectorABI) { 771 // Set explicit alignment, since we may need to realign the top. 772 return MinABIStackAlignInBytes; 773 } 774 775 // Otherwise, if the type contains an SSE vector type, the alignment is 16. 776 if (Align >= 16 && (isSSEVectorType(getContext(), Ty) || 777 isRecordWithSSEVectorType(getContext(), Ty))) 778 return 16; 779 780 return MinABIStackAlignInBytes; 781} 782 783ABIArgInfo X86_32ABIInfo::getIndirectResult(QualType Ty, bool ByVal, 784 unsigned &FreeRegs) const { 785 if (!ByVal) { 786 if (FreeRegs) { 787 --FreeRegs; // Non byval indirects just use one pointer. 788 return ABIArgInfo::getIndirectInReg(0, false); 789 } 790 return ABIArgInfo::getIndirect(0, false); 791 } 792 793 // Compute the byval alignment. 794 unsigned TypeAlign = getContext().getTypeAlign(Ty) / 8; 795 unsigned StackAlign = getTypeStackAlignInBytes(Ty, TypeAlign); 796 if (StackAlign == 0) 797 return ABIArgInfo::getIndirect(4); 798 799 // If the stack alignment is less than the type alignment, realign the 800 // argument. 801 if (StackAlign < TypeAlign) 802 return ABIArgInfo::getIndirect(StackAlign, /*ByVal=*/true, 803 /*Realign=*/true); 804 805 return ABIArgInfo::getIndirect(StackAlign); 806} 807 808X86_32ABIInfo::Class X86_32ABIInfo::classify(QualType Ty) const { 809 const Type *T = isSingleElementStruct(Ty, getContext()); 810 if (!T) 811 T = Ty.getTypePtr(); 812 813 if (const BuiltinType *BT = T->getAs<BuiltinType>()) { 814 BuiltinType::Kind K = BT->getKind(); 815 if (K == BuiltinType::Float || K == BuiltinType::Double) 816 return Float; 817 } 818 return Integer; 819} 820 821bool X86_32ABIInfo::shouldUseInReg(QualType Ty, unsigned &FreeRegs, 822 bool IsFastCall, bool &NeedsPadding) const { 823 NeedsPadding = false; 824 Class C = classify(Ty); 825 if (C == Float) 826 return false; 827 828 unsigned Size = getContext().getTypeSize(Ty); 829 unsigned SizeInRegs = (Size + 31) / 32; 830 831 if (SizeInRegs == 0) 832 return false; 833 834 if (SizeInRegs > FreeRegs) { 835 FreeRegs = 0; 836 return false; 837 } 838 839 FreeRegs -= SizeInRegs; 840 841 if (IsFastCall) { 842 if (Size > 32) 843 return false; 844 845 if (Ty->isIntegralOrEnumerationType()) 846 return true; 847 848 if (Ty->isPointerType()) 849 return true; 850 851 if (Ty->isReferenceType()) 852 return true; 853 854 if (FreeRegs) 855 NeedsPadding = true; 856 857 return false; 858 } 859 860 return true; 861} 862 863ABIArgInfo X86_32ABIInfo::classifyArgumentType(QualType Ty, 864 unsigned &FreeRegs, 865 bool IsFastCall) const { 866 // FIXME: Set alignment on indirect arguments. 867 if (isAggregateTypeForABI(Ty)) { 868 if (const RecordType *RT = Ty->getAs<RecordType>()) { 869 if (IsWin32StructABI) 870 return getIndirectResult(Ty, true, FreeRegs); 871 872 if (CGCXXABI::RecordArgABI RAA = getRecordArgABI(RT, CGT)) 873 return getIndirectResult(Ty, RAA == CGCXXABI::RAA_DirectInMemory, FreeRegs); 874 875 // Structures with flexible arrays are always indirect. 876 if (RT->getDecl()->hasFlexibleArrayMember()) 877 return getIndirectResult(Ty, true, FreeRegs); 878 } 879 880 // Ignore empty structs/unions. 881 if (isEmptyRecord(getContext(), Ty, true)) 882 return ABIArgInfo::getIgnore(); 883 884 llvm::LLVMContext &LLVMContext = getVMContext(); 885 llvm::IntegerType *Int32 = llvm::Type::getInt32Ty(LLVMContext); 886 bool NeedsPadding; 887 if (shouldUseInReg(Ty, FreeRegs, IsFastCall, NeedsPadding)) { 888 unsigned SizeInRegs = (getContext().getTypeSize(Ty) + 31) / 32; 889 SmallVector<llvm::Type*, 3> Elements; 890 for (unsigned I = 0; I < SizeInRegs; ++I) 891 Elements.push_back(Int32); 892 llvm::Type *Result = llvm::StructType::get(LLVMContext, Elements); 893 return ABIArgInfo::getDirectInReg(Result); 894 } 895 llvm::IntegerType *PaddingType = NeedsPadding ? Int32 : 0; 896 897 // Expand small (<= 128-bit) record types when we know that the stack layout 898 // of those arguments will match the struct. This is important because the 899 // LLVM backend isn't smart enough to remove byval, which inhibits many 900 // optimizations. 901 if (getContext().getTypeSize(Ty) <= 4*32 && 902 canExpandIndirectArgument(Ty, getContext())) 903 return ABIArgInfo::getExpandWithPadding(IsFastCall, PaddingType); 904 905 return getIndirectResult(Ty, true, FreeRegs); 906 } 907 908 if (const VectorType *VT = Ty->getAs<VectorType>()) { 909 // On Darwin, some vectors are passed in memory, we handle this by passing 910 // it as an i8/i16/i32/i64. 911 if (IsDarwinVectorABI) { 912 uint64_t Size = getContext().getTypeSize(Ty); 913 if ((Size == 8 || Size == 16 || Size == 32) || 914 (Size == 64 && VT->getNumElements() == 1)) 915 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(), 916 Size)); 917 } 918 919 if (IsX86_MMXType(CGT.ConvertType(Ty))) 920 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(), 64)); 921 922 return ABIArgInfo::getDirect(); 923 } 924 925 926 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 927 Ty = EnumTy->getDecl()->getIntegerType(); 928 929 bool NeedsPadding; 930 bool InReg = shouldUseInReg(Ty, FreeRegs, IsFastCall, NeedsPadding); 931 932 if (Ty->isPromotableIntegerType()) { 933 if (InReg) 934 return ABIArgInfo::getExtendInReg(); 935 return ABIArgInfo::getExtend(); 936 } 937 if (InReg) 938 return ABIArgInfo::getDirectInReg(); 939 return ABIArgInfo::getDirect(); 940} 941 942void X86_32ABIInfo::computeInfo(CGFunctionInfo &FI) const { 943 FI.getReturnInfo() = classifyReturnType(FI.getReturnType(), 944 FI.getCallingConvention()); 945 946 unsigned CC = FI.getCallingConvention(); 947 bool IsFastCall = CC == llvm::CallingConv::X86_FastCall; 948 unsigned FreeRegs; 949 if (IsFastCall) 950 FreeRegs = 2; 951 else if (FI.getHasRegParm()) 952 FreeRegs = FI.getRegParm(); 953 else 954 FreeRegs = DefaultNumRegisterParameters; 955 956 // If the return value is indirect, then the hidden argument is consuming one 957 // integer register. 958 if (FI.getReturnInfo().isIndirect() && FreeRegs) { 959 --FreeRegs; 960 ABIArgInfo &Old = FI.getReturnInfo(); 961 Old = ABIArgInfo::getIndirectInReg(Old.getIndirectAlign(), 962 Old.getIndirectByVal(), 963 Old.getIndirectRealign()); 964 } 965 966 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 967 it != ie; ++it) 968 it->info = classifyArgumentType(it->type, FreeRegs, IsFastCall); 969} 970 971llvm::Value *X86_32ABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 972 CodeGenFunction &CGF) const { 973 llvm::Type *BPP = CGF.Int8PtrPtrTy; 974 975 CGBuilderTy &Builder = CGF.Builder; 976 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP, 977 "ap"); 978 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur"); 979 980 // Compute if the address needs to be aligned 981 unsigned Align = CGF.getContext().getTypeAlignInChars(Ty).getQuantity(); 982 Align = getTypeStackAlignInBytes(Ty, Align); 983 Align = std::max(Align, 4U); 984 if (Align > 4) { 985 // addr = (addr + align - 1) & -align; 986 llvm::Value *Offset = 987 llvm::ConstantInt::get(CGF.Int32Ty, Align - 1); 988 Addr = CGF.Builder.CreateGEP(Addr, Offset); 989 llvm::Value *AsInt = CGF.Builder.CreatePtrToInt(Addr, 990 CGF.Int32Ty); 991 llvm::Value *Mask = llvm::ConstantInt::get(CGF.Int32Ty, -Align); 992 Addr = CGF.Builder.CreateIntToPtr(CGF.Builder.CreateAnd(AsInt, Mask), 993 Addr->getType(), 994 "ap.cur.aligned"); 995 } 996 997 llvm::Type *PTy = 998 llvm::PointerType::getUnqual(CGF.ConvertType(Ty)); 999 llvm::Value *AddrTyped = Builder.CreateBitCast(Addr, PTy); 1000 1001 uint64_t Offset = 1002 llvm::RoundUpToAlignment(CGF.getContext().getTypeSize(Ty) / 8, Align); 1003 llvm::Value *NextAddr = 1004 Builder.CreateGEP(Addr, llvm::ConstantInt::get(CGF.Int32Ty, Offset), 1005 "ap.next"); 1006 Builder.CreateStore(NextAddr, VAListAddrAsBPP); 1007 1008 return AddrTyped; 1009} 1010 1011void X86_32TargetCodeGenInfo::SetTargetAttributes(const Decl *D, 1012 llvm::GlobalValue *GV, 1013 CodeGen::CodeGenModule &CGM) const { 1014 if (const FunctionDecl *FD = dyn_cast<FunctionDecl>(D)) { 1015 if (FD->hasAttr<X86ForceAlignArgPointerAttr>()) { 1016 // Get the LLVM function. 1017 llvm::Function *Fn = cast<llvm::Function>(GV); 1018 1019 // Now add the 'alignstack' attribute with a value of 16. 1020 llvm::AttrBuilder B; 1021 B.addStackAlignmentAttr(16); 1022 Fn->addAttributes(llvm::AttributeSet::FunctionIndex, 1023 llvm::AttributeSet::get(CGM.getLLVMContext(), 1024 llvm::AttributeSet::FunctionIndex, 1025 B)); 1026 } 1027 } 1028} 1029 1030bool X86_32TargetCodeGenInfo::initDwarfEHRegSizeTable( 1031 CodeGen::CodeGenFunction &CGF, 1032 llvm::Value *Address) const { 1033 CodeGen::CGBuilderTy &Builder = CGF.Builder; 1034 1035 llvm::Value *Four8 = llvm::ConstantInt::get(CGF.Int8Ty, 4); 1036 1037 // 0-7 are the eight integer registers; the order is different 1038 // on Darwin (for EH), but the range is the same. 1039 // 8 is %eip. 1040 AssignToArrayRange(Builder, Address, Four8, 0, 8); 1041 1042 if (CGF.CGM.getTarget().getTriple().isOSDarwin()) { 1043 // 12-16 are st(0..4). Not sure why we stop at 4. 1044 // These have size 16, which is sizeof(long double) on 1045 // platforms with 8-byte alignment for that type. 1046 llvm::Value *Sixteen8 = llvm::ConstantInt::get(CGF.Int8Ty, 16); 1047 AssignToArrayRange(Builder, Address, Sixteen8, 12, 16); 1048 1049 } else { 1050 // 9 is %eflags, which doesn't get a size on Darwin for some 1051 // reason. 1052 Builder.CreateStore(Four8, Builder.CreateConstInBoundsGEP1_32(Address, 9)); 1053 1054 // 11-16 are st(0..5). Not sure why we stop at 5. 1055 // These have size 12, which is sizeof(long double) on 1056 // platforms with 4-byte alignment for that type. 1057 llvm::Value *Twelve8 = llvm::ConstantInt::get(CGF.Int8Ty, 12); 1058 AssignToArrayRange(Builder, Address, Twelve8, 11, 16); 1059 } 1060 1061 return false; 1062} 1063 1064//===----------------------------------------------------------------------===// 1065// X86-64 ABI Implementation 1066//===----------------------------------------------------------------------===// 1067 1068 1069namespace { 1070/// X86_64ABIInfo - The X86_64 ABI information. 1071class X86_64ABIInfo : public ABIInfo { 1072 enum Class { 1073 Integer = 0, 1074 SSE, 1075 SSEUp, 1076 X87, 1077 X87Up, 1078 ComplexX87, 1079 NoClass, 1080 Memory 1081 }; 1082 1083 /// merge - Implement the X86_64 ABI merging algorithm. 1084 /// 1085 /// Merge an accumulating classification \arg Accum with a field 1086 /// classification \arg Field. 1087 /// 1088 /// \param Accum - The accumulating classification. This should 1089 /// always be either NoClass or the result of a previous merge 1090 /// call. In addition, this should never be Memory (the caller 1091 /// should just return Memory for the aggregate). 1092 static Class merge(Class Accum, Class Field); 1093 1094 /// postMerge - Implement the X86_64 ABI post merging algorithm. 1095 /// 1096 /// Post merger cleanup, reduces a malformed Hi and Lo pair to 1097 /// final MEMORY or SSE classes when necessary. 1098 /// 1099 /// \param AggregateSize - The size of the current aggregate in 1100 /// the classification process. 1101 /// 1102 /// \param Lo - The classification for the parts of the type 1103 /// residing in the low word of the containing object. 1104 /// 1105 /// \param Hi - The classification for the parts of the type 1106 /// residing in the higher words of the containing object. 1107 /// 1108 void postMerge(unsigned AggregateSize, Class &Lo, Class &Hi) const; 1109 1110 /// classify - Determine the x86_64 register classes in which the 1111 /// given type T should be passed. 1112 /// 1113 /// \param Lo - The classification for the parts of the type 1114 /// residing in the low word of the containing object. 1115 /// 1116 /// \param Hi - The classification for the parts of the type 1117 /// residing in the high word of the containing object. 1118 /// 1119 /// \param OffsetBase - The bit offset of this type in the 1120 /// containing object. Some parameters are classified different 1121 /// depending on whether they straddle an eightbyte boundary. 1122 /// 1123 /// If a word is unused its result will be NoClass; if a type should 1124 /// be passed in Memory then at least the classification of \arg Lo 1125 /// will be Memory. 1126 /// 1127 /// The \arg Lo class will be NoClass iff the argument is ignored. 1128 /// 1129 /// If the \arg Lo class is ComplexX87, then the \arg Hi class will 1130 /// also be ComplexX87. 1131 void classify(QualType T, uint64_t OffsetBase, Class &Lo, Class &Hi) const; 1132 1133 llvm::Type *GetByteVectorType(QualType Ty) const; 1134 llvm::Type *GetSSETypeAtOffset(llvm::Type *IRType, 1135 unsigned IROffset, QualType SourceTy, 1136 unsigned SourceOffset) const; 1137 llvm::Type *GetINTEGERTypeAtOffset(llvm::Type *IRType, 1138 unsigned IROffset, QualType SourceTy, 1139 unsigned SourceOffset) const; 1140 1141 /// getIndirectResult - Give a source type \arg Ty, return a suitable result 1142 /// such that the argument will be returned in memory. 1143 ABIArgInfo getIndirectReturnResult(QualType Ty) const; 1144 1145 /// getIndirectResult - Give a source type \arg Ty, return a suitable result 1146 /// such that the argument will be passed in memory. 1147 /// 1148 /// \param freeIntRegs - The number of free integer registers remaining 1149 /// available. 1150 ABIArgInfo getIndirectResult(QualType Ty, unsigned freeIntRegs) const; 1151 1152 ABIArgInfo classifyReturnType(QualType RetTy) const; 1153 1154 ABIArgInfo classifyArgumentType(QualType Ty, 1155 unsigned freeIntRegs, 1156 unsigned &neededInt, 1157 unsigned &neededSSE) const; 1158 1159 bool IsIllegalVectorType(QualType Ty) const; 1160 1161 /// The 0.98 ABI revision clarified a lot of ambiguities, 1162 /// unfortunately in ways that were not always consistent with 1163 /// certain previous compilers. In particular, platforms which 1164 /// required strict binary compatibility with older versions of GCC 1165 /// may need to exempt themselves. 1166 bool honorsRevision0_98() const { 1167 return !getTarget().getTriple().isOSDarwin(); 1168 } 1169 1170 bool HasAVX; 1171 // Some ABIs (e.g. X32 ABI and Native Client OS) use 32 bit pointers on 1172 // 64-bit hardware. 1173 bool Has64BitPointers; 1174 1175public: 1176 X86_64ABIInfo(CodeGen::CodeGenTypes &CGT, bool hasavx) : 1177 ABIInfo(CGT), HasAVX(hasavx), 1178 Has64BitPointers(CGT.getDataLayout().getPointerSize(0) == 8) { 1179 } 1180 1181 bool isPassedUsingAVXType(QualType type) const { 1182 unsigned neededInt, neededSSE; 1183 // The freeIntRegs argument doesn't matter here. 1184 ABIArgInfo info = classifyArgumentType(type, 0, neededInt, neededSSE); 1185 if (info.isDirect()) { 1186 llvm::Type *ty = info.getCoerceToType(); 1187 if (llvm::VectorType *vectorTy = dyn_cast_or_null<llvm::VectorType>(ty)) 1188 return (vectorTy->getBitWidth() > 128); 1189 } 1190 return false; 1191 } 1192 1193 virtual void computeInfo(CGFunctionInfo &FI) const; 1194 1195 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 1196 CodeGenFunction &CGF) const; 1197}; 1198 1199/// WinX86_64ABIInfo - The Windows X86_64 ABI information. 1200class WinX86_64ABIInfo : public ABIInfo { 1201 1202 ABIArgInfo classify(QualType Ty, bool IsReturnType) const; 1203 1204public: 1205 WinX86_64ABIInfo(CodeGen::CodeGenTypes &CGT) : ABIInfo(CGT) {} 1206 1207 virtual void computeInfo(CGFunctionInfo &FI) const; 1208 1209 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 1210 CodeGenFunction &CGF) const; 1211}; 1212 1213class X86_64TargetCodeGenInfo : public TargetCodeGenInfo { 1214public: 1215 X86_64TargetCodeGenInfo(CodeGen::CodeGenTypes &CGT, bool HasAVX) 1216 : TargetCodeGenInfo(new X86_64ABIInfo(CGT, HasAVX)) {} 1217 1218 const X86_64ABIInfo &getABIInfo() const { 1219 return static_cast<const X86_64ABIInfo&>(TargetCodeGenInfo::getABIInfo()); 1220 } 1221 1222 int getDwarfEHStackPointer(CodeGen::CodeGenModule &CGM) const { 1223 return 7; 1224 } 1225 1226 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 1227 llvm::Value *Address) const { 1228 llvm::Value *Eight8 = llvm::ConstantInt::get(CGF.Int8Ty, 8); 1229 1230 // 0-15 are the 16 integer registers. 1231 // 16 is %rip. 1232 AssignToArrayRange(CGF.Builder, Address, Eight8, 0, 16); 1233 return false; 1234 } 1235 1236 llvm::Type* adjustInlineAsmType(CodeGen::CodeGenFunction &CGF, 1237 StringRef Constraint, 1238 llvm::Type* Ty) const { 1239 return X86AdjustInlineAsmType(CGF, Constraint, Ty); 1240 } 1241 1242 bool isNoProtoCallVariadic(const CallArgList &args, 1243 const FunctionNoProtoType *fnType) const { 1244 // The default CC on x86-64 sets %al to the number of SSA 1245 // registers used, and GCC sets this when calling an unprototyped 1246 // function, so we override the default behavior. However, don't do 1247 // that when AVX types are involved: the ABI explicitly states it is 1248 // undefined, and it doesn't work in practice because of how the ABI 1249 // defines varargs anyway. 1250 if (fnType->getCallConv() == CC_Default || fnType->getCallConv() == CC_C) { 1251 bool HasAVXType = false; 1252 for (CallArgList::const_iterator 1253 it = args.begin(), ie = args.end(); it != ie; ++it) { 1254 if (getABIInfo().isPassedUsingAVXType(it->Ty)) { 1255 HasAVXType = true; 1256 break; 1257 } 1258 } 1259 1260 if (!HasAVXType) 1261 return true; 1262 } 1263 1264 return TargetCodeGenInfo::isNoProtoCallVariadic(args, fnType); 1265 } 1266 1267}; 1268 1269static std::string qualifyWindowsLibrary(llvm::StringRef Lib) { 1270 // If the argument does not end in .lib, automatically add the suffix. This 1271 // matches the behavior of MSVC. 1272 std::string ArgStr = Lib; 1273 if (Lib.size() <= 4 || 1274 Lib.substr(Lib.size() - 4).compare_lower(".lib") != 0) { 1275 ArgStr += ".lib"; 1276 } 1277 return ArgStr; 1278} 1279 1280class WinX86_32TargetCodeGenInfo : public X86_32TargetCodeGenInfo { 1281public: 1282 WinX86_32TargetCodeGenInfo(CodeGen::CodeGenTypes &CGT, unsigned RegParms) 1283 : X86_32TargetCodeGenInfo(CGT, false, true, true, RegParms) {} 1284 1285 void getDependentLibraryOption(llvm::StringRef Lib, 1286 llvm::SmallString<24> &Opt) const { 1287 Opt = "/DEFAULTLIB:"; 1288 Opt += qualifyWindowsLibrary(Lib); 1289 } 1290}; 1291 1292class WinX86_64TargetCodeGenInfo : public TargetCodeGenInfo { 1293public: 1294 WinX86_64TargetCodeGenInfo(CodeGen::CodeGenTypes &CGT) 1295 : TargetCodeGenInfo(new WinX86_64ABIInfo(CGT)) {} 1296 1297 int getDwarfEHStackPointer(CodeGen::CodeGenModule &CGM) const { 1298 return 7; 1299 } 1300 1301 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 1302 llvm::Value *Address) const { 1303 llvm::Value *Eight8 = llvm::ConstantInt::get(CGF.Int8Ty, 8); 1304 1305 // 0-15 are the 16 integer registers. 1306 // 16 is %rip. 1307 AssignToArrayRange(CGF.Builder, Address, Eight8, 0, 16); 1308 return false; 1309 } 1310 1311 void getDependentLibraryOption(llvm::StringRef Lib, 1312 llvm::SmallString<24> &Opt) const { 1313 Opt = "/DEFAULTLIB:"; 1314 Opt += qualifyWindowsLibrary(Lib); 1315 } 1316}; 1317 1318} 1319 1320void X86_64ABIInfo::postMerge(unsigned AggregateSize, Class &Lo, 1321 Class &Hi) const { 1322 // AMD64-ABI 3.2.3p2: Rule 5. Then a post merger cleanup is done: 1323 // 1324 // (a) If one of the classes is Memory, the whole argument is passed in 1325 // memory. 1326 // 1327 // (b) If X87UP is not preceded by X87, the whole argument is passed in 1328 // memory. 1329 // 1330 // (c) If the size of the aggregate exceeds two eightbytes and the first 1331 // eightbyte isn't SSE or any other eightbyte isn't SSEUP, the whole 1332 // argument is passed in memory. NOTE: This is necessary to keep the 1333 // ABI working for processors that don't support the __m256 type. 1334 // 1335 // (d) If SSEUP is not preceded by SSE or SSEUP, it is converted to SSE. 1336 // 1337 // Some of these are enforced by the merging logic. Others can arise 1338 // only with unions; for example: 1339 // union { _Complex double; unsigned; } 1340 // 1341 // Note that clauses (b) and (c) were added in 0.98. 1342 // 1343 if (Hi == Memory) 1344 Lo = Memory; 1345 if (Hi == X87Up && Lo != X87 && honorsRevision0_98()) 1346 Lo = Memory; 1347 if (AggregateSize > 128 && (Lo != SSE || Hi != SSEUp)) 1348 Lo = Memory; 1349 if (Hi == SSEUp && Lo != SSE) 1350 Hi = SSE; 1351} 1352 1353X86_64ABIInfo::Class X86_64ABIInfo::merge(Class Accum, Class Field) { 1354 // AMD64-ABI 3.2.3p2: Rule 4. Each field of an object is 1355 // classified recursively so that always two fields are 1356 // considered. The resulting class is calculated according to 1357 // the classes of the fields in the eightbyte: 1358 // 1359 // (a) If both classes are equal, this is the resulting class. 1360 // 1361 // (b) If one of the classes is NO_CLASS, the resulting class is 1362 // the other class. 1363 // 1364 // (c) If one of the classes is MEMORY, the result is the MEMORY 1365 // class. 1366 // 1367 // (d) If one of the classes is INTEGER, the result is the 1368 // INTEGER. 1369 // 1370 // (e) If one of the classes is X87, X87UP, COMPLEX_X87 class, 1371 // MEMORY is used as class. 1372 // 1373 // (f) Otherwise class SSE is used. 1374 1375 // Accum should never be memory (we should have returned) or 1376 // ComplexX87 (because this cannot be passed in a structure). 1377 assert((Accum != Memory && Accum != ComplexX87) && 1378 "Invalid accumulated classification during merge."); 1379 if (Accum == Field || Field == NoClass) 1380 return Accum; 1381 if (Field == Memory) 1382 return Memory; 1383 if (Accum == NoClass) 1384 return Field; 1385 if (Accum == Integer || Field == Integer) 1386 return Integer; 1387 if (Field == X87 || Field == X87Up || Field == ComplexX87 || 1388 Accum == X87 || Accum == X87Up) 1389 return Memory; 1390 return SSE; 1391} 1392 1393void X86_64ABIInfo::classify(QualType Ty, uint64_t OffsetBase, 1394 Class &Lo, Class &Hi) const { 1395 // FIXME: This code can be simplified by introducing a simple value class for 1396 // Class pairs with appropriate constructor methods for the various 1397 // situations. 1398 1399 // FIXME: Some of the split computations are wrong; unaligned vectors 1400 // shouldn't be passed in registers for example, so there is no chance they 1401 // can straddle an eightbyte. Verify & simplify. 1402 1403 Lo = Hi = NoClass; 1404 1405 Class &Current = OffsetBase < 64 ? Lo : Hi; 1406 Current = Memory; 1407 1408 if (const BuiltinType *BT = Ty->getAs<BuiltinType>()) { 1409 BuiltinType::Kind k = BT->getKind(); 1410 1411 if (k == BuiltinType::Void) { 1412 Current = NoClass; 1413 } else if (k == BuiltinType::Int128 || k == BuiltinType::UInt128) { 1414 Lo = Integer; 1415 Hi = Integer; 1416 } else if (k >= BuiltinType::Bool && k <= BuiltinType::LongLong) { 1417 Current = Integer; 1418 } else if ((k == BuiltinType::Float || k == BuiltinType::Double) || 1419 (k == BuiltinType::LongDouble && 1420 getTarget().getTriple().getOS() == llvm::Triple::NaCl)) { 1421 Current = SSE; 1422 } else if (k == BuiltinType::LongDouble) { 1423 Lo = X87; 1424 Hi = X87Up; 1425 } 1426 // FIXME: _Decimal32 and _Decimal64 are SSE. 1427 // FIXME: _float128 and _Decimal128 are (SSE, SSEUp). 1428 return; 1429 } 1430 1431 if (const EnumType *ET = Ty->getAs<EnumType>()) { 1432 // Classify the underlying integer type. 1433 classify(ET->getDecl()->getIntegerType(), OffsetBase, Lo, Hi); 1434 return; 1435 } 1436 1437 if (Ty->hasPointerRepresentation()) { 1438 Current = Integer; 1439 return; 1440 } 1441 1442 if (Ty->isMemberPointerType()) { 1443 if (Ty->isMemberFunctionPointerType() && Has64BitPointers) 1444 Lo = Hi = Integer; 1445 else 1446 Current = Integer; 1447 return; 1448 } 1449 1450 if (const VectorType *VT = Ty->getAs<VectorType>()) { 1451 uint64_t Size = getContext().getTypeSize(VT); 1452 if (Size == 32) { 1453 // gcc passes all <4 x char>, <2 x short>, <1 x int>, <1 x 1454 // float> as integer. 1455 Current = Integer; 1456 1457 // If this type crosses an eightbyte boundary, it should be 1458 // split. 1459 uint64_t EB_Real = (OffsetBase) / 64; 1460 uint64_t EB_Imag = (OffsetBase + Size - 1) / 64; 1461 if (EB_Real != EB_Imag) 1462 Hi = Lo; 1463 } else if (Size == 64) { 1464 // gcc passes <1 x double> in memory. :( 1465 if (VT->getElementType()->isSpecificBuiltinType(BuiltinType::Double)) 1466 return; 1467 1468 // gcc passes <1 x long long> as INTEGER. 1469 if (VT->getElementType()->isSpecificBuiltinType(BuiltinType::LongLong) || 1470 VT->getElementType()->isSpecificBuiltinType(BuiltinType::ULongLong) || 1471 VT->getElementType()->isSpecificBuiltinType(BuiltinType::Long) || 1472 VT->getElementType()->isSpecificBuiltinType(BuiltinType::ULong)) 1473 Current = Integer; 1474 else 1475 Current = SSE; 1476 1477 // If this type crosses an eightbyte boundary, it should be 1478 // split. 1479 if (OffsetBase && OffsetBase != 64) 1480 Hi = Lo; 1481 } else if (Size == 128 || (HasAVX && Size == 256)) { 1482 // Arguments of 256-bits are split into four eightbyte chunks. The 1483 // least significant one belongs to class SSE and all the others to class 1484 // SSEUP. The original Lo and Hi design considers that types can't be 1485 // greater than 128-bits, so a 64-bit split in Hi and Lo makes sense. 1486 // This design isn't correct for 256-bits, but since there're no cases 1487 // where the upper parts would need to be inspected, avoid adding 1488 // complexity and just consider Hi to match the 64-256 part. 1489 Lo = SSE; 1490 Hi = SSEUp; 1491 } 1492 return; 1493 } 1494 1495 if (const ComplexType *CT = Ty->getAs<ComplexType>()) { 1496 QualType ET = getContext().getCanonicalType(CT->getElementType()); 1497 1498 uint64_t Size = getContext().getTypeSize(Ty); 1499 if (ET->isIntegralOrEnumerationType()) { 1500 if (Size <= 64) 1501 Current = Integer; 1502 else if (Size <= 128) 1503 Lo = Hi = Integer; 1504 } else if (ET == getContext().FloatTy) 1505 Current = SSE; 1506 else if (ET == getContext().DoubleTy || 1507 (ET == getContext().LongDoubleTy && 1508 getTarget().getTriple().getOS() == llvm::Triple::NaCl)) 1509 Lo = Hi = SSE; 1510 else if (ET == getContext().LongDoubleTy) 1511 Current = ComplexX87; 1512 1513 // If this complex type crosses an eightbyte boundary then it 1514 // should be split. 1515 uint64_t EB_Real = (OffsetBase) / 64; 1516 uint64_t EB_Imag = (OffsetBase + getContext().getTypeSize(ET)) / 64; 1517 if (Hi == NoClass && EB_Real != EB_Imag) 1518 Hi = Lo; 1519 1520 return; 1521 } 1522 1523 if (const ConstantArrayType *AT = getContext().getAsConstantArrayType(Ty)) { 1524 // Arrays are treated like structures. 1525 1526 uint64_t Size = getContext().getTypeSize(Ty); 1527 1528 // AMD64-ABI 3.2.3p2: Rule 1. If the size of an object is larger 1529 // than four eightbytes, ..., it has class MEMORY. 1530 if (Size > 256) 1531 return; 1532 1533 // AMD64-ABI 3.2.3p2: Rule 1. If ..., or it contains unaligned 1534 // fields, it has class MEMORY. 1535 // 1536 // Only need to check alignment of array base. 1537 if (OffsetBase % getContext().getTypeAlign(AT->getElementType())) 1538 return; 1539 1540 // Otherwise implement simplified merge. We could be smarter about 1541 // this, but it isn't worth it and would be harder to verify. 1542 Current = NoClass; 1543 uint64_t EltSize = getContext().getTypeSize(AT->getElementType()); 1544 uint64_t ArraySize = AT->getSize().getZExtValue(); 1545 1546 // The only case a 256-bit wide vector could be used is when the array 1547 // contains a single 256-bit element. Since Lo and Hi logic isn't extended 1548 // to work for sizes wider than 128, early check and fallback to memory. 1549 if (Size > 128 && EltSize != 256) 1550 return; 1551 1552 for (uint64_t i=0, Offset=OffsetBase; i<ArraySize; ++i, Offset += EltSize) { 1553 Class FieldLo, FieldHi; 1554 classify(AT->getElementType(), Offset, FieldLo, FieldHi); 1555 Lo = merge(Lo, FieldLo); 1556 Hi = merge(Hi, FieldHi); 1557 if (Lo == Memory || Hi == Memory) 1558 break; 1559 } 1560 1561 postMerge(Size, Lo, Hi); 1562 assert((Hi != SSEUp || Lo == SSE) && "Invalid SSEUp array classification."); 1563 return; 1564 } 1565 1566 if (const RecordType *RT = Ty->getAs<RecordType>()) { 1567 uint64_t Size = getContext().getTypeSize(Ty); 1568 1569 // AMD64-ABI 3.2.3p2: Rule 1. If the size of an object is larger 1570 // than four eightbytes, ..., it has class MEMORY. 1571 if (Size > 256) 1572 return; 1573 1574 // AMD64-ABI 3.2.3p2: Rule 2. If a C++ object has either a non-trivial 1575 // copy constructor or a non-trivial destructor, it is passed by invisible 1576 // reference. 1577 if (getRecordArgABI(RT, CGT)) 1578 return; 1579 1580 const RecordDecl *RD = RT->getDecl(); 1581 1582 // Assume variable sized types are passed in memory. 1583 if (RD->hasFlexibleArrayMember()) 1584 return; 1585 1586 const ASTRecordLayout &Layout = getContext().getASTRecordLayout(RD); 1587 1588 // Reset Lo class, this will be recomputed. 1589 Current = NoClass; 1590 1591 // If this is a C++ record, classify the bases first. 1592 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) { 1593 for (CXXRecordDecl::base_class_const_iterator i = CXXRD->bases_begin(), 1594 e = CXXRD->bases_end(); i != e; ++i) { 1595 assert(!i->isVirtual() && !i->getType()->isDependentType() && 1596 "Unexpected base class!"); 1597 const CXXRecordDecl *Base = 1598 cast<CXXRecordDecl>(i->getType()->getAs<RecordType>()->getDecl()); 1599 1600 // Classify this field. 1601 // 1602 // AMD64-ABI 3.2.3p2: Rule 3. If the size of the aggregate exceeds a 1603 // single eightbyte, each is classified separately. Each eightbyte gets 1604 // initialized to class NO_CLASS. 1605 Class FieldLo, FieldHi; 1606 uint64_t Offset = 1607 OffsetBase + getContext().toBits(Layout.getBaseClassOffset(Base)); 1608 classify(i->getType(), Offset, FieldLo, FieldHi); 1609 Lo = merge(Lo, FieldLo); 1610 Hi = merge(Hi, FieldHi); 1611 if (Lo == Memory || Hi == Memory) 1612 break; 1613 } 1614 } 1615 1616 // Classify the fields one at a time, merging the results. 1617 unsigned idx = 0; 1618 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 1619 i != e; ++i, ++idx) { 1620 uint64_t Offset = OffsetBase + Layout.getFieldOffset(idx); 1621 bool BitField = i->isBitField(); 1622 1623 // AMD64-ABI 3.2.3p2: Rule 1. If the size of an object is larger than 1624 // four eightbytes, or it contains unaligned fields, it has class MEMORY. 1625 // 1626 // The only case a 256-bit wide vector could be used is when the struct 1627 // contains a single 256-bit element. Since Lo and Hi logic isn't extended 1628 // to work for sizes wider than 128, early check and fallback to memory. 1629 // 1630 if (Size > 128 && getContext().getTypeSize(i->getType()) != 256) { 1631 Lo = Memory; 1632 return; 1633 } 1634 // Note, skip this test for bit-fields, see below. 1635 if (!BitField && Offset % getContext().getTypeAlign(i->getType())) { 1636 Lo = Memory; 1637 return; 1638 } 1639 1640 // Classify this field. 1641 // 1642 // AMD64-ABI 3.2.3p2: Rule 3. If the size of the aggregate 1643 // exceeds a single eightbyte, each is classified 1644 // separately. Each eightbyte gets initialized to class 1645 // NO_CLASS. 1646 Class FieldLo, FieldHi; 1647 1648 // Bit-fields require special handling, they do not force the 1649 // structure to be passed in memory even if unaligned, and 1650 // therefore they can straddle an eightbyte. 1651 if (BitField) { 1652 // Ignore padding bit-fields. 1653 if (i->isUnnamedBitfield()) 1654 continue; 1655 1656 uint64_t Offset = OffsetBase + Layout.getFieldOffset(idx); 1657 uint64_t Size = i->getBitWidthValue(getContext()); 1658 1659 uint64_t EB_Lo = Offset / 64; 1660 uint64_t EB_Hi = (Offset + Size - 1) / 64; 1661 FieldLo = FieldHi = NoClass; 1662 if (EB_Lo) { 1663 assert(EB_Hi == EB_Lo && "Invalid classification, type > 16 bytes."); 1664 FieldLo = NoClass; 1665 FieldHi = Integer; 1666 } else { 1667 FieldLo = Integer; 1668 FieldHi = EB_Hi ? Integer : NoClass; 1669 } 1670 } else 1671 classify(i->getType(), Offset, FieldLo, FieldHi); 1672 Lo = merge(Lo, FieldLo); 1673 Hi = merge(Hi, FieldHi); 1674 if (Lo == Memory || Hi == Memory) 1675 break; 1676 } 1677 1678 postMerge(Size, Lo, Hi); 1679 } 1680} 1681 1682ABIArgInfo X86_64ABIInfo::getIndirectReturnResult(QualType Ty) const { 1683 // If this is a scalar LLVM value then assume LLVM will pass it in the right 1684 // place naturally. 1685 if (!isAggregateTypeForABI(Ty)) { 1686 // Treat an enum type as its underlying type. 1687 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 1688 Ty = EnumTy->getDecl()->getIntegerType(); 1689 1690 return (Ty->isPromotableIntegerType() ? 1691 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 1692 } 1693 1694 return ABIArgInfo::getIndirect(0); 1695} 1696 1697bool X86_64ABIInfo::IsIllegalVectorType(QualType Ty) const { 1698 if (const VectorType *VecTy = Ty->getAs<VectorType>()) { 1699 uint64_t Size = getContext().getTypeSize(VecTy); 1700 unsigned LargestVector = HasAVX ? 256 : 128; 1701 if (Size <= 64 || Size > LargestVector) 1702 return true; 1703 } 1704 1705 return false; 1706} 1707 1708ABIArgInfo X86_64ABIInfo::getIndirectResult(QualType Ty, 1709 unsigned freeIntRegs) const { 1710 // If this is a scalar LLVM value then assume LLVM will pass it in the right 1711 // place naturally. 1712 // 1713 // This assumption is optimistic, as there could be free registers available 1714 // when we need to pass this argument in memory, and LLVM could try to pass 1715 // the argument in the free register. This does not seem to happen currently, 1716 // but this code would be much safer if we could mark the argument with 1717 // 'onstack'. See PR12193. 1718 if (!isAggregateTypeForABI(Ty) && !IsIllegalVectorType(Ty)) { 1719 // Treat an enum type as its underlying type. 1720 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 1721 Ty = EnumTy->getDecl()->getIntegerType(); 1722 1723 return (Ty->isPromotableIntegerType() ? 1724 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 1725 } 1726 1727 if (CGCXXABI::RecordArgABI RAA = getRecordArgABI(Ty, CGT)) 1728 return ABIArgInfo::getIndirect(0, RAA == CGCXXABI::RAA_DirectInMemory); 1729 1730 // Compute the byval alignment. We specify the alignment of the byval in all 1731 // cases so that the mid-level optimizer knows the alignment of the byval. 1732 unsigned Align = std::max(getContext().getTypeAlign(Ty) / 8, 8U); 1733 1734 // Attempt to avoid passing indirect results using byval when possible. This 1735 // is important for good codegen. 1736 // 1737 // We do this by coercing the value into a scalar type which the backend can 1738 // handle naturally (i.e., without using byval). 1739 // 1740 // For simplicity, we currently only do this when we have exhausted all of the 1741 // free integer registers. Doing this when there are free integer registers 1742 // would require more care, as we would have to ensure that the coerced value 1743 // did not claim the unused register. That would require either reording the 1744 // arguments to the function (so that any subsequent inreg values came first), 1745 // or only doing this optimization when there were no following arguments that 1746 // might be inreg. 1747 // 1748 // We currently expect it to be rare (particularly in well written code) for 1749 // arguments to be passed on the stack when there are still free integer 1750 // registers available (this would typically imply large structs being passed 1751 // by value), so this seems like a fair tradeoff for now. 1752 // 1753 // We can revisit this if the backend grows support for 'onstack' parameter 1754 // attributes. See PR12193. 1755 if (freeIntRegs == 0) { 1756 uint64_t Size = getContext().getTypeSize(Ty); 1757 1758 // If this type fits in an eightbyte, coerce it into the matching integral 1759 // type, which will end up on the stack (with alignment 8). 1760 if (Align == 8 && Size <= 64) 1761 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(), 1762 Size)); 1763 } 1764 1765 return ABIArgInfo::getIndirect(Align); 1766} 1767 1768/// GetByteVectorType - The ABI specifies that a value should be passed in an 1769/// full vector XMM/YMM register. Pick an LLVM IR type that will be passed as a 1770/// vector register. 1771llvm::Type *X86_64ABIInfo::GetByteVectorType(QualType Ty) const { 1772 llvm::Type *IRType = CGT.ConvertType(Ty); 1773 1774 // Wrapper structs that just contain vectors are passed just like vectors, 1775 // strip them off if present. 1776 llvm::StructType *STy = dyn_cast<llvm::StructType>(IRType); 1777 while (STy && STy->getNumElements() == 1) { 1778 IRType = STy->getElementType(0); 1779 STy = dyn_cast<llvm::StructType>(IRType); 1780 } 1781 1782 // If the preferred type is a 16-byte vector, prefer to pass it. 1783 if (llvm::VectorType *VT = dyn_cast<llvm::VectorType>(IRType)){ 1784 llvm::Type *EltTy = VT->getElementType(); 1785 unsigned BitWidth = VT->getBitWidth(); 1786 if ((BitWidth >= 128 && BitWidth <= 256) && 1787 (EltTy->isFloatTy() || EltTy->isDoubleTy() || 1788 EltTy->isIntegerTy(8) || EltTy->isIntegerTy(16) || 1789 EltTy->isIntegerTy(32) || EltTy->isIntegerTy(64) || 1790 EltTy->isIntegerTy(128))) 1791 return VT; 1792 } 1793 1794 return llvm::VectorType::get(llvm::Type::getDoubleTy(getVMContext()), 2); 1795} 1796 1797/// BitsContainNoUserData - Return true if the specified [start,end) bit range 1798/// is known to either be off the end of the specified type or being in 1799/// alignment padding. The user type specified is known to be at most 128 bits 1800/// in size, and have passed through X86_64ABIInfo::classify with a successful 1801/// classification that put one of the two halves in the INTEGER class. 1802/// 1803/// It is conservatively correct to return false. 1804static bool BitsContainNoUserData(QualType Ty, unsigned StartBit, 1805 unsigned EndBit, ASTContext &Context) { 1806 // If the bytes being queried are off the end of the type, there is no user 1807 // data hiding here. This handles analysis of builtins, vectors and other 1808 // types that don't contain interesting padding. 1809 unsigned TySize = (unsigned)Context.getTypeSize(Ty); 1810 if (TySize <= StartBit) 1811 return true; 1812 1813 if (const ConstantArrayType *AT = Context.getAsConstantArrayType(Ty)) { 1814 unsigned EltSize = (unsigned)Context.getTypeSize(AT->getElementType()); 1815 unsigned NumElts = (unsigned)AT->getSize().getZExtValue(); 1816 1817 // Check each element to see if the element overlaps with the queried range. 1818 for (unsigned i = 0; i != NumElts; ++i) { 1819 // If the element is after the span we care about, then we're done.. 1820 unsigned EltOffset = i*EltSize; 1821 if (EltOffset >= EndBit) break; 1822 1823 unsigned EltStart = EltOffset < StartBit ? StartBit-EltOffset :0; 1824 if (!BitsContainNoUserData(AT->getElementType(), EltStart, 1825 EndBit-EltOffset, Context)) 1826 return false; 1827 } 1828 // If it overlaps no elements, then it is safe to process as padding. 1829 return true; 1830 } 1831 1832 if (const RecordType *RT = Ty->getAs<RecordType>()) { 1833 const RecordDecl *RD = RT->getDecl(); 1834 const ASTRecordLayout &Layout = Context.getASTRecordLayout(RD); 1835 1836 // If this is a C++ record, check the bases first. 1837 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) { 1838 for (CXXRecordDecl::base_class_const_iterator i = CXXRD->bases_begin(), 1839 e = CXXRD->bases_end(); i != e; ++i) { 1840 assert(!i->isVirtual() && !i->getType()->isDependentType() && 1841 "Unexpected base class!"); 1842 const CXXRecordDecl *Base = 1843 cast<CXXRecordDecl>(i->getType()->getAs<RecordType>()->getDecl()); 1844 1845 // If the base is after the span we care about, ignore it. 1846 unsigned BaseOffset = Context.toBits(Layout.getBaseClassOffset(Base)); 1847 if (BaseOffset >= EndBit) continue; 1848 1849 unsigned BaseStart = BaseOffset < StartBit ? StartBit-BaseOffset :0; 1850 if (!BitsContainNoUserData(i->getType(), BaseStart, 1851 EndBit-BaseOffset, Context)) 1852 return false; 1853 } 1854 } 1855 1856 // Verify that no field has data that overlaps the region of interest. Yes 1857 // this could be sped up a lot by being smarter about queried fields, 1858 // however we're only looking at structs up to 16 bytes, so we don't care 1859 // much. 1860 unsigned idx = 0; 1861 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 1862 i != e; ++i, ++idx) { 1863 unsigned FieldOffset = (unsigned)Layout.getFieldOffset(idx); 1864 1865 // If we found a field after the region we care about, then we're done. 1866 if (FieldOffset >= EndBit) break; 1867 1868 unsigned FieldStart = FieldOffset < StartBit ? StartBit-FieldOffset :0; 1869 if (!BitsContainNoUserData(i->getType(), FieldStart, EndBit-FieldOffset, 1870 Context)) 1871 return false; 1872 } 1873 1874 // If nothing in this record overlapped the area of interest, then we're 1875 // clean. 1876 return true; 1877 } 1878 1879 return false; 1880} 1881 1882/// ContainsFloatAtOffset - Return true if the specified LLVM IR type has a 1883/// float member at the specified offset. For example, {int,{float}} has a 1884/// float at offset 4. It is conservatively correct for this routine to return 1885/// false. 1886static bool ContainsFloatAtOffset(llvm::Type *IRType, unsigned IROffset, 1887 const llvm::DataLayout &TD) { 1888 // Base case if we find a float. 1889 if (IROffset == 0 && IRType->isFloatTy()) 1890 return true; 1891 1892 // If this is a struct, recurse into the field at the specified offset. 1893 if (llvm::StructType *STy = dyn_cast<llvm::StructType>(IRType)) { 1894 const llvm::StructLayout *SL = TD.getStructLayout(STy); 1895 unsigned Elt = SL->getElementContainingOffset(IROffset); 1896 IROffset -= SL->getElementOffset(Elt); 1897 return ContainsFloatAtOffset(STy->getElementType(Elt), IROffset, TD); 1898 } 1899 1900 // If this is an array, recurse into the field at the specified offset. 1901 if (llvm::ArrayType *ATy = dyn_cast<llvm::ArrayType>(IRType)) { 1902 llvm::Type *EltTy = ATy->getElementType(); 1903 unsigned EltSize = TD.getTypeAllocSize(EltTy); 1904 IROffset -= IROffset/EltSize*EltSize; 1905 return ContainsFloatAtOffset(EltTy, IROffset, TD); 1906 } 1907 1908 return false; 1909} 1910 1911 1912/// GetSSETypeAtOffset - Return a type that will be passed by the backend in the 1913/// low 8 bytes of an XMM register, corresponding to the SSE class. 1914llvm::Type *X86_64ABIInfo:: 1915GetSSETypeAtOffset(llvm::Type *IRType, unsigned IROffset, 1916 QualType SourceTy, unsigned SourceOffset) const { 1917 // The only three choices we have are either double, <2 x float>, or float. We 1918 // pass as float if the last 4 bytes is just padding. This happens for 1919 // structs that contain 3 floats. 1920 if (BitsContainNoUserData(SourceTy, SourceOffset*8+32, 1921 SourceOffset*8+64, getContext())) 1922 return llvm::Type::getFloatTy(getVMContext()); 1923 1924 // We want to pass as <2 x float> if the LLVM IR type contains a float at 1925 // offset+0 and offset+4. Walk the LLVM IR type to find out if this is the 1926 // case. 1927 if (ContainsFloatAtOffset(IRType, IROffset, getDataLayout()) && 1928 ContainsFloatAtOffset(IRType, IROffset+4, getDataLayout())) 1929 return llvm::VectorType::get(llvm::Type::getFloatTy(getVMContext()), 2); 1930 1931 return llvm::Type::getDoubleTy(getVMContext()); 1932} 1933 1934 1935/// GetINTEGERTypeAtOffset - The ABI specifies that a value should be passed in 1936/// an 8-byte GPR. This means that we either have a scalar or we are talking 1937/// about the high or low part of an up-to-16-byte struct. This routine picks 1938/// the best LLVM IR type to represent this, which may be i64 or may be anything 1939/// else that the backend will pass in a GPR that works better (e.g. i8, %foo*, 1940/// etc). 1941/// 1942/// PrefType is an LLVM IR type that corresponds to (part of) the IR type for 1943/// the source type. IROffset is an offset in bytes into the LLVM IR type that 1944/// the 8-byte value references. PrefType may be null. 1945/// 1946/// SourceTy is the source level type for the entire argument. SourceOffset is 1947/// an offset into this that we're processing (which is always either 0 or 8). 1948/// 1949llvm::Type *X86_64ABIInfo:: 1950GetINTEGERTypeAtOffset(llvm::Type *IRType, unsigned IROffset, 1951 QualType SourceTy, unsigned SourceOffset) const { 1952 // If we're dealing with an un-offset LLVM IR type, then it means that we're 1953 // returning an 8-byte unit starting with it. See if we can safely use it. 1954 if (IROffset == 0) { 1955 // Pointers and int64's always fill the 8-byte unit. 1956 if ((isa<llvm::PointerType>(IRType) && Has64BitPointers) || 1957 IRType->isIntegerTy(64)) 1958 return IRType; 1959 1960 // If we have a 1/2/4-byte integer, we can use it only if the rest of the 1961 // goodness in the source type is just tail padding. This is allowed to 1962 // kick in for struct {double,int} on the int, but not on 1963 // struct{double,int,int} because we wouldn't return the second int. We 1964 // have to do this analysis on the source type because we can't depend on 1965 // unions being lowered a specific way etc. 1966 if (IRType->isIntegerTy(8) || IRType->isIntegerTy(16) || 1967 IRType->isIntegerTy(32) || 1968 (isa<llvm::PointerType>(IRType) && !Has64BitPointers)) { 1969 unsigned BitWidth = isa<llvm::PointerType>(IRType) ? 32 : 1970 cast<llvm::IntegerType>(IRType)->getBitWidth(); 1971 1972 if (BitsContainNoUserData(SourceTy, SourceOffset*8+BitWidth, 1973 SourceOffset*8+64, getContext())) 1974 return IRType; 1975 } 1976 } 1977 1978 if (llvm::StructType *STy = dyn_cast<llvm::StructType>(IRType)) { 1979 // If this is a struct, recurse into the field at the specified offset. 1980 const llvm::StructLayout *SL = getDataLayout().getStructLayout(STy); 1981 if (IROffset < SL->getSizeInBytes()) { 1982 unsigned FieldIdx = SL->getElementContainingOffset(IROffset); 1983 IROffset -= SL->getElementOffset(FieldIdx); 1984 1985 return GetINTEGERTypeAtOffset(STy->getElementType(FieldIdx), IROffset, 1986 SourceTy, SourceOffset); 1987 } 1988 } 1989 1990 if (llvm::ArrayType *ATy = dyn_cast<llvm::ArrayType>(IRType)) { 1991 llvm::Type *EltTy = ATy->getElementType(); 1992 unsigned EltSize = getDataLayout().getTypeAllocSize(EltTy); 1993 unsigned EltOffset = IROffset/EltSize*EltSize; 1994 return GetINTEGERTypeAtOffset(EltTy, IROffset-EltOffset, SourceTy, 1995 SourceOffset); 1996 } 1997 1998 // Okay, we don't have any better idea of what to pass, so we pass this in an 1999 // integer register that isn't too big to fit the rest of the struct. 2000 unsigned TySizeInBytes = 2001 (unsigned)getContext().getTypeSizeInChars(SourceTy).getQuantity(); 2002 2003 assert(TySizeInBytes != SourceOffset && "Empty field?"); 2004 2005 // It is always safe to classify this as an integer type up to i64 that 2006 // isn't larger than the structure. 2007 return llvm::IntegerType::get(getVMContext(), 2008 std::min(TySizeInBytes-SourceOffset, 8U)*8); 2009} 2010 2011 2012/// GetX86_64ByValArgumentPair - Given a high and low type that can ideally 2013/// be used as elements of a two register pair to pass or return, return a 2014/// first class aggregate to represent them. For example, if the low part of 2015/// a by-value argument should be passed as i32* and the high part as float, 2016/// return {i32*, float}. 2017static llvm::Type * 2018GetX86_64ByValArgumentPair(llvm::Type *Lo, llvm::Type *Hi, 2019 const llvm::DataLayout &TD) { 2020 // In order to correctly satisfy the ABI, we need to the high part to start 2021 // at offset 8. If the high and low parts we inferred are both 4-byte types 2022 // (e.g. i32 and i32) then the resultant struct type ({i32,i32}) won't have 2023 // the second element at offset 8. Check for this: 2024 unsigned LoSize = (unsigned)TD.getTypeAllocSize(Lo); 2025 unsigned HiAlign = TD.getABITypeAlignment(Hi); 2026 unsigned HiStart = llvm::DataLayout::RoundUpAlignment(LoSize, HiAlign); 2027 assert(HiStart != 0 && HiStart <= 8 && "Invalid x86-64 argument pair!"); 2028 2029 // To handle this, we have to increase the size of the low part so that the 2030 // second element will start at an 8 byte offset. We can't increase the size 2031 // of the second element because it might make us access off the end of the 2032 // struct. 2033 if (HiStart != 8) { 2034 // There are only two sorts of types the ABI generation code can produce for 2035 // the low part of a pair that aren't 8 bytes in size: float or i8/i16/i32. 2036 // Promote these to a larger type. 2037 if (Lo->isFloatTy()) 2038 Lo = llvm::Type::getDoubleTy(Lo->getContext()); 2039 else { 2040 assert(Lo->isIntegerTy() && "Invalid/unknown lo type"); 2041 Lo = llvm::Type::getInt64Ty(Lo->getContext()); 2042 } 2043 } 2044 2045 llvm::StructType *Result = llvm::StructType::get(Lo, Hi, NULL); 2046 2047 2048 // Verify that the second element is at an 8-byte offset. 2049 assert(TD.getStructLayout(Result)->getElementOffset(1) == 8 && 2050 "Invalid x86-64 argument pair!"); 2051 return Result; 2052} 2053 2054ABIArgInfo X86_64ABIInfo:: 2055classifyReturnType(QualType RetTy) const { 2056 // AMD64-ABI 3.2.3p4: Rule 1. Classify the return type with the 2057 // classification algorithm. 2058 X86_64ABIInfo::Class Lo, Hi; 2059 classify(RetTy, 0, Lo, Hi); 2060 2061 // Check some invariants. 2062 assert((Hi != Memory || Lo == Memory) && "Invalid memory classification."); 2063 assert((Hi != SSEUp || Lo == SSE) && "Invalid SSEUp classification."); 2064 2065 llvm::Type *ResType = 0; 2066 switch (Lo) { 2067 case NoClass: 2068 if (Hi == NoClass) 2069 return ABIArgInfo::getIgnore(); 2070 // If the low part is just padding, it takes no register, leave ResType 2071 // null. 2072 assert((Hi == SSE || Hi == Integer || Hi == X87Up) && 2073 "Unknown missing lo part"); 2074 break; 2075 2076 case SSEUp: 2077 case X87Up: 2078 llvm_unreachable("Invalid classification for lo word."); 2079 2080 // AMD64-ABI 3.2.3p4: Rule 2. Types of class memory are returned via 2081 // hidden argument. 2082 case Memory: 2083 return getIndirectReturnResult(RetTy); 2084 2085 // AMD64-ABI 3.2.3p4: Rule 3. If the class is INTEGER, the next 2086 // available register of the sequence %rax, %rdx is used. 2087 case Integer: 2088 ResType = GetINTEGERTypeAtOffset(CGT.ConvertType(RetTy), 0, RetTy, 0); 2089 2090 // If we have a sign or zero extended integer, make sure to return Extend 2091 // so that the parameter gets the right LLVM IR attributes. 2092 if (Hi == NoClass && isa<llvm::IntegerType>(ResType)) { 2093 // Treat an enum type as its underlying type. 2094 if (const EnumType *EnumTy = RetTy->getAs<EnumType>()) 2095 RetTy = EnumTy->getDecl()->getIntegerType(); 2096 2097 if (RetTy->isIntegralOrEnumerationType() && 2098 RetTy->isPromotableIntegerType()) 2099 return ABIArgInfo::getExtend(); 2100 } 2101 break; 2102 2103 // AMD64-ABI 3.2.3p4: Rule 4. If the class is SSE, the next 2104 // available SSE register of the sequence %xmm0, %xmm1 is used. 2105 case SSE: 2106 ResType = GetSSETypeAtOffset(CGT.ConvertType(RetTy), 0, RetTy, 0); 2107 break; 2108 2109 // AMD64-ABI 3.2.3p4: Rule 6. If the class is X87, the value is 2110 // returned on the X87 stack in %st0 as 80-bit x87 number. 2111 case X87: 2112 ResType = llvm::Type::getX86_FP80Ty(getVMContext()); 2113 break; 2114 2115 // AMD64-ABI 3.2.3p4: Rule 8. If the class is COMPLEX_X87, the real 2116 // part of the value is returned in %st0 and the imaginary part in 2117 // %st1. 2118 case ComplexX87: 2119 assert(Hi == ComplexX87 && "Unexpected ComplexX87 classification."); 2120 ResType = llvm::StructType::get(llvm::Type::getX86_FP80Ty(getVMContext()), 2121 llvm::Type::getX86_FP80Ty(getVMContext()), 2122 NULL); 2123 break; 2124 } 2125 2126 llvm::Type *HighPart = 0; 2127 switch (Hi) { 2128 // Memory was handled previously and X87 should 2129 // never occur as a hi class. 2130 case Memory: 2131 case X87: 2132 llvm_unreachable("Invalid classification for hi word."); 2133 2134 case ComplexX87: // Previously handled. 2135 case NoClass: 2136 break; 2137 2138 case Integer: 2139 HighPart = GetINTEGERTypeAtOffset(CGT.ConvertType(RetTy), 8, RetTy, 8); 2140 if (Lo == NoClass) // Return HighPart at offset 8 in memory. 2141 return ABIArgInfo::getDirect(HighPart, 8); 2142 break; 2143 case SSE: 2144 HighPart = GetSSETypeAtOffset(CGT.ConvertType(RetTy), 8, RetTy, 8); 2145 if (Lo == NoClass) // Return HighPart at offset 8 in memory. 2146 return ABIArgInfo::getDirect(HighPart, 8); 2147 break; 2148 2149 // AMD64-ABI 3.2.3p4: Rule 5. If the class is SSEUP, the eightbyte 2150 // is passed in the next available eightbyte chunk if the last used 2151 // vector register. 2152 // 2153 // SSEUP should always be preceded by SSE, just widen. 2154 case SSEUp: 2155 assert(Lo == SSE && "Unexpected SSEUp classification."); 2156 ResType = GetByteVectorType(RetTy); 2157 break; 2158 2159 // AMD64-ABI 3.2.3p4: Rule 7. If the class is X87UP, the value is 2160 // returned together with the previous X87 value in %st0. 2161 case X87Up: 2162 // If X87Up is preceded by X87, we don't need to do 2163 // anything. However, in some cases with unions it may not be 2164 // preceded by X87. In such situations we follow gcc and pass the 2165 // extra bits in an SSE reg. 2166 if (Lo != X87) { 2167 HighPart = GetSSETypeAtOffset(CGT.ConvertType(RetTy), 8, RetTy, 8); 2168 if (Lo == NoClass) // Return HighPart at offset 8 in memory. 2169 return ABIArgInfo::getDirect(HighPart, 8); 2170 } 2171 break; 2172 } 2173 2174 // If a high part was specified, merge it together with the low part. It is 2175 // known to pass in the high eightbyte of the result. We do this by forming a 2176 // first class struct aggregate with the high and low part: {low, high} 2177 if (HighPart) 2178 ResType = GetX86_64ByValArgumentPair(ResType, HighPart, getDataLayout()); 2179 2180 return ABIArgInfo::getDirect(ResType); 2181} 2182 2183ABIArgInfo X86_64ABIInfo::classifyArgumentType( 2184 QualType Ty, unsigned freeIntRegs, unsigned &neededInt, unsigned &neededSSE) 2185 const 2186{ 2187 X86_64ABIInfo::Class Lo, Hi; 2188 classify(Ty, 0, Lo, Hi); 2189 2190 // Check some invariants. 2191 // FIXME: Enforce these by construction. 2192 assert((Hi != Memory || Lo == Memory) && "Invalid memory classification."); 2193 assert((Hi != SSEUp || Lo == SSE) && "Invalid SSEUp classification."); 2194 2195 neededInt = 0; 2196 neededSSE = 0; 2197 llvm::Type *ResType = 0; 2198 switch (Lo) { 2199 case NoClass: 2200 if (Hi == NoClass) 2201 return ABIArgInfo::getIgnore(); 2202 // If the low part is just padding, it takes no register, leave ResType 2203 // null. 2204 assert((Hi == SSE || Hi == Integer || Hi == X87Up) && 2205 "Unknown missing lo part"); 2206 break; 2207 2208 // AMD64-ABI 3.2.3p3: Rule 1. If the class is MEMORY, pass the argument 2209 // on the stack. 2210 case Memory: 2211 2212 // AMD64-ABI 3.2.3p3: Rule 5. If the class is X87, X87UP or 2213 // COMPLEX_X87, it is passed in memory. 2214 case X87: 2215 case ComplexX87: 2216 if (getRecordArgABI(Ty, CGT) == CGCXXABI::RAA_Indirect) 2217 ++neededInt; 2218 return getIndirectResult(Ty, freeIntRegs); 2219 2220 case SSEUp: 2221 case X87Up: 2222 llvm_unreachable("Invalid classification for lo word."); 2223 2224 // AMD64-ABI 3.2.3p3: Rule 2. If the class is INTEGER, the next 2225 // available register of the sequence %rdi, %rsi, %rdx, %rcx, %r8 2226 // and %r9 is used. 2227 case Integer: 2228 ++neededInt; 2229 2230 // Pick an 8-byte type based on the preferred type. 2231 ResType = GetINTEGERTypeAtOffset(CGT.ConvertType(Ty), 0, Ty, 0); 2232 2233 // If we have a sign or zero extended integer, make sure to return Extend 2234 // so that the parameter gets the right LLVM IR attributes. 2235 if (Hi == NoClass && isa<llvm::IntegerType>(ResType)) { 2236 // Treat an enum type as its underlying type. 2237 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 2238 Ty = EnumTy->getDecl()->getIntegerType(); 2239 2240 if (Ty->isIntegralOrEnumerationType() && 2241 Ty->isPromotableIntegerType()) 2242 return ABIArgInfo::getExtend(); 2243 } 2244 2245 break; 2246 2247 // AMD64-ABI 3.2.3p3: Rule 3. If the class is SSE, the next 2248 // available SSE register is used, the registers are taken in the 2249 // order from %xmm0 to %xmm7. 2250 case SSE: { 2251 llvm::Type *IRType = CGT.ConvertType(Ty); 2252 ResType = GetSSETypeAtOffset(IRType, 0, Ty, 0); 2253 ++neededSSE; 2254 break; 2255 } 2256 } 2257 2258 llvm::Type *HighPart = 0; 2259 switch (Hi) { 2260 // Memory was handled previously, ComplexX87 and X87 should 2261 // never occur as hi classes, and X87Up must be preceded by X87, 2262 // which is passed in memory. 2263 case Memory: 2264 case X87: 2265 case ComplexX87: 2266 llvm_unreachable("Invalid classification for hi word."); 2267 2268 case NoClass: break; 2269 2270 case Integer: 2271 ++neededInt; 2272 // Pick an 8-byte type based on the preferred type. 2273 HighPart = GetINTEGERTypeAtOffset(CGT.ConvertType(Ty), 8, Ty, 8); 2274 2275 if (Lo == NoClass) // Pass HighPart at offset 8 in memory. 2276 return ABIArgInfo::getDirect(HighPart, 8); 2277 break; 2278 2279 // X87Up generally doesn't occur here (long double is passed in 2280 // memory), except in situations involving unions. 2281 case X87Up: 2282 case SSE: 2283 HighPart = GetSSETypeAtOffset(CGT.ConvertType(Ty), 8, Ty, 8); 2284 2285 if (Lo == NoClass) // Pass HighPart at offset 8 in memory. 2286 return ABIArgInfo::getDirect(HighPart, 8); 2287 2288 ++neededSSE; 2289 break; 2290 2291 // AMD64-ABI 3.2.3p3: Rule 4. If the class is SSEUP, the 2292 // eightbyte is passed in the upper half of the last used SSE 2293 // register. This only happens when 128-bit vectors are passed. 2294 case SSEUp: 2295 assert(Lo == SSE && "Unexpected SSEUp classification"); 2296 ResType = GetByteVectorType(Ty); 2297 break; 2298 } 2299 2300 // If a high part was specified, merge it together with the low part. It is 2301 // known to pass in the high eightbyte of the result. We do this by forming a 2302 // first class struct aggregate with the high and low part: {low, high} 2303 if (HighPart) 2304 ResType = GetX86_64ByValArgumentPair(ResType, HighPart, getDataLayout()); 2305 2306 return ABIArgInfo::getDirect(ResType); 2307} 2308 2309void X86_64ABIInfo::computeInfo(CGFunctionInfo &FI) const { 2310 2311 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 2312 2313 // Keep track of the number of assigned registers. 2314 unsigned freeIntRegs = 6, freeSSERegs = 8; 2315 2316 // If the return value is indirect, then the hidden argument is consuming one 2317 // integer register. 2318 if (FI.getReturnInfo().isIndirect()) 2319 --freeIntRegs; 2320 2321 // AMD64-ABI 3.2.3p3: Once arguments are classified, the registers 2322 // get assigned (in left-to-right order) for passing as follows... 2323 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 2324 it != ie; ++it) { 2325 unsigned neededInt, neededSSE; 2326 it->info = classifyArgumentType(it->type, freeIntRegs, neededInt, 2327 neededSSE); 2328 2329 // AMD64-ABI 3.2.3p3: If there are no registers available for any 2330 // eightbyte of an argument, the whole argument is passed on the 2331 // stack. If registers have already been assigned for some 2332 // eightbytes of such an argument, the assignments get reverted. 2333 if (freeIntRegs >= neededInt && freeSSERegs >= neededSSE) { 2334 freeIntRegs -= neededInt; 2335 freeSSERegs -= neededSSE; 2336 } else { 2337 it->info = getIndirectResult(it->type, freeIntRegs); 2338 } 2339 } 2340} 2341 2342static llvm::Value *EmitVAArgFromMemory(llvm::Value *VAListAddr, 2343 QualType Ty, 2344 CodeGenFunction &CGF) { 2345 llvm::Value *overflow_arg_area_p = 2346 CGF.Builder.CreateStructGEP(VAListAddr, 2, "overflow_arg_area_p"); 2347 llvm::Value *overflow_arg_area = 2348 CGF.Builder.CreateLoad(overflow_arg_area_p, "overflow_arg_area"); 2349 2350 // AMD64-ABI 3.5.7p5: Step 7. Align l->overflow_arg_area upwards to a 16 2351 // byte boundary if alignment needed by type exceeds 8 byte boundary. 2352 // It isn't stated explicitly in the standard, but in practice we use 2353 // alignment greater than 16 where necessary. 2354 uint64_t Align = CGF.getContext().getTypeAlign(Ty) / 8; 2355 if (Align > 8) { 2356 // overflow_arg_area = (overflow_arg_area + align - 1) & -align; 2357 llvm::Value *Offset = 2358 llvm::ConstantInt::get(CGF.Int64Ty, Align - 1); 2359 overflow_arg_area = CGF.Builder.CreateGEP(overflow_arg_area, Offset); 2360 llvm::Value *AsInt = CGF.Builder.CreatePtrToInt(overflow_arg_area, 2361 CGF.Int64Ty); 2362 llvm::Value *Mask = llvm::ConstantInt::get(CGF.Int64Ty, -(uint64_t)Align); 2363 overflow_arg_area = 2364 CGF.Builder.CreateIntToPtr(CGF.Builder.CreateAnd(AsInt, Mask), 2365 overflow_arg_area->getType(), 2366 "overflow_arg_area.align"); 2367 } 2368 2369 // AMD64-ABI 3.5.7p5: Step 8. Fetch type from l->overflow_arg_area. 2370 llvm::Type *LTy = CGF.ConvertTypeForMem(Ty); 2371 llvm::Value *Res = 2372 CGF.Builder.CreateBitCast(overflow_arg_area, 2373 llvm::PointerType::getUnqual(LTy)); 2374 2375 // AMD64-ABI 3.5.7p5: Step 9. Set l->overflow_arg_area to: 2376 // l->overflow_arg_area + sizeof(type). 2377 // AMD64-ABI 3.5.7p5: Step 10. Align l->overflow_arg_area upwards to 2378 // an 8 byte boundary. 2379 2380 uint64_t SizeInBytes = (CGF.getContext().getTypeSize(Ty) + 7) / 8; 2381 llvm::Value *Offset = 2382 llvm::ConstantInt::get(CGF.Int32Ty, (SizeInBytes + 7) & ~7); 2383 overflow_arg_area = CGF.Builder.CreateGEP(overflow_arg_area, Offset, 2384 "overflow_arg_area.next"); 2385 CGF.Builder.CreateStore(overflow_arg_area, overflow_arg_area_p); 2386 2387 // AMD64-ABI 3.5.7p5: Step 11. Return the fetched type. 2388 return Res; 2389} 2390 2391llvm::Value *X86_64ABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 2392 CodeGenFunction &CGF) const { 2393 // Assume that va_list type is correct; should be pointer to LLVM type: 2394 // struct { 2395 // i32 gp_offset; 2396 // i32 fp_offset; 2397 // i8* overflow_arg_area; 2398 // i8* reg_save_area; 2399 // }; 2400 unsigned neededInt, neededSSE; 2401 2402 Ty = CGF.getContext().getCanonicalType(Ty); 2403 ABIArgInfo AI = classifyArgumentType(Ty, 0, neededInt, neededSSE); 2404 2405 // AMD64-ABI 3.5.7p5: Step 1. Determine whether type may be passed 2406 // in the registers. If not go to step 7. 2407 if (!neededInt && !neededSSE) 2408 return EmitVAArgFromMemory(VAListAddr, Ty, CGF); 2409 2410 // AMD64-ABI 3.5.7p5: Step 2. Compute num_gp to hold the number of 2411 // general purpose registers needed to pass type and num_fp to hold 2412 // the number of floating point registers needed. 2413 2414 // AMD64-ABI 3.5.7p5: Step 3. Verify whether arguments fit into 2415 // registers. In the case: l->gp_offset > 48 - num_gp * 8 or 2416 // l->fp_offset > 304 - num_fp * 16 go to step 7. 2417 // 2418 // NOTE: 304 is a typo, there are (6 * 8 + 8 * 16) = 176 bytes of 2419 // register save space). 2420 2421 llvm::Value *InRegs = 0; 2422 llvm::Value *gp_offset_p = 0, *gp_offset = 0; 2423 llvm::Value *fp_offset_p = 0, *fp_offset = 0; 2424 if (neededInt) { 2425 gp_offset_p = CGF.Builder.CreateStructGEP(VAListAddr, 0, "gp_offset_p"); 2426 gp_offset = CGF.Builder.CreateLoad(gp_offset_p, "gp_offset"); 2427 InRegs = llvm::ConstantInt::get(CGF.Int32Ty, 48 - neededInt * 8); 2428 InRegs = CGF.Builder.CreateICmpULE(gp_offset, InRegs, "fits_in_gp"); 2429 } 2430 2431 if (neededSSE) { 2432 fp_offset_p = CGF.Builder.CreateStructGEP(VAListAddr, 1, "fp_offset_p"); 2433 fp_offset = CGF.Builder.CreateLoad(fp_offset_p, "fp_offset"); 2434 llvm::Value *FitsInFP = 2435 llvm::ConstantInt::get(CGF.Int32Ty, 176 - neededSSE * 16); 2436 FitsInFP = CGF.Builder.CreateICmpULE(fp_offset, FitsInFP, "fits_in_fp"); 2437 InRegs = InRegs ? CGF.Builder.CreateAnd(InRegs, FitsInFP) : FitsInFP; 2438 } 2439 2440 llvm::BasicBlock *InRegBlock = CGF.createBasicBlock("vaarg.in_reg"); 2441 llvm::BasicBlock *InMemBlock = CGF.createBasicBlock("vaarg.in_mem"); 2442 llvm::BasicBlock *ContBlock = CGF.createBasicBlock("vaarg.end"); 2443 CGF.Builder.CreateCondBr(InRegs, InRegBlock, InMemBlock); 2444 2445 // Emit code to load the value if it was passed in registers. 2446 2447 CGF.EmitBlock(InRegBlock); 2448 2449 // AMD64-ABI 3.5.7p5: Step 4. Fetch type from l->reg_save_area with 2450 // an offset of l->gp_offset and/or l->fp_offset. This may require 2451 // copying to a temporary location in case the parameter is passed 2452 // in different register classes or requires an alignment greater 2453 // than 8 for general purpose registers and 16 for XMM registers. 2454 // 2455 // FIXME: This really results in shameful code when we end up needing to 2456 // collect arguments from different places; often what should result in a 2457 // simple assembling of a structure from scattered addresses has many more 2458 // loads than necessary. Can we clean this up? 2459 llvm::Type *LTy = CGF.ConvertTypeForMem(Ty); 2460 llvm::Value *RegAddr = 2461 CGF.Builder.CreateLoad(CGF.Builder.CreateStructGEP(VAListAddr, 3), 2462 "reg_save_area"); 2463 if (neededInt && neededSSE) { 2464 // FIXME: Cleanup. 2465 assert(AI.isDirect() && "Unexpected ABI info for mixed regs"); 2466 llvm::StructType *ST = cast<llvm::StructType>(AI.getCoerceToType()); 2467 llvm::Value *Tmp = CGF.CreateTempAlloca(ST); 2468 assert(ST->getNumElements() == 2 && "Unexpected ABI info for mixed regs"); 2469 llvm::Type *TyLo = ST->getElementType(0); 2470 llvm::Type *TyHi = ST->getElementType(1); 2471 assert((TyLo->isFPOrFPVectorTy() ^ TyHi->isFPOrFPVectorTy()) && 2472 "Unexpected ABI info for mixed regs"); 2473 llvm::Type *PTyLo = llvm::PointerType::getUnqual(TyLo); 2474 llvm::Type *PTyHi = llvm::PointerType::getUnqual(TyHi); 2475 llvm::Value *GPAddr = CGF.Builder.CreateGEP(RegAddr, gp_offset); 2476 llvm::Value *FPAddr = CGF.Builder.CreateGEP(RegAddr, fp_offset); 2477 llvm::Value *RegLoAddr = TyLo->isFloatingPointTy() ? FPAddr : GPAddr; 2478 llvm::Value *RegHiAddr = TyLo->isFloatingPointTy() ? GPAddr : FPAddr; 2479 llvm::Value *V = 2480 CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegLoAddr, PTyLo)); 2481 CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 0)); 2482 V = CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegHiAddr, PTyHi)); 2483 CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 1)); 2484 2485 RegAddr = CGF.Builder.CreateBitCast(Tmp, 2486 llvm::PointerType::getUnqual(LTy)); 2487 } else if (neededInt) { 2488 RegAddr = CGF.Builder.CreateGEP(RegAddr, gp_offset); 2489 RegAddr = CGF.Builder.CreateBitCast(RegAddr, 2490 llvm::PointerType::getUnqual(LTy)); 2491 } else if (neededSSE == 1) { 2492 RegAddr = CGF.Builder.CreateGEP(RegAddr, fp_offset); 2493 RegAddr = CGF.Builder.CreateBitCast(RegAddr, 2494 llvm::PointerType::getUnqual(LTy)); 2495 } else { 2496 assert(neededSSE == 2 && "Invalid number of needed registers!"); 2497 // SSE registers are spaced 16 bytes apart in the register save 2498 // area, we need to collect the two eightbytes together. 2499 llvm::Value *RegAddrLo = CGF.Builder.CreateGEP(RegAddr, fp_offset); 2500 llvm::Value *RegAddrHi = CGF.Builder.CreateConstGEP1_32(RegAddrLo, 16); 2501 llvm::Type *DoubleTy = CGF.DoubleTy; 2502 llvm::Type *DblPtrTy = 2503 llvm::PointerType::getUnqual(DoubleTy); 2504 llvm::StructType *ST = llvm::StructType::get(DoubleTy, 2505 DoubleTy, NULL); 2506 llvm::Value *V, *Tmp = CGF.CreateTempAlloca(ST); 2507 V = CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegAddrLo, 2508 DblPtrTy)); 2509 CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 0)); 2510 V = CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegAddrHi, 2511 DblPtrTy)); 2512 CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 1)); 2513 RegAddr = CGF.Builder.CreateBitCast(Tmp, 2514 llvm::PointerType::getUnqual(LTy)); 2515 } 2516 2517 // AMD64-ABI 3.5.7p5: Step 5. Set: 2518 // l->gp_offset = l->gp_offset + num_gp * 8 2519 // l->fp_offset = l->fp_offset + num_fp * 16. 2520 if (neededInt) { 2521 llvm::Value *Offset = llvm::ConstantInt::get(CGF.Int32Ty, neededInt * 8); 2522 CGF.Builder.CreateStore(CGF.Builder.CreateAdd(gp_offset, Offset), 2523 gp_offset_p); 2524 } 2525 if (neededSSE) { 2526 llvm::Value *Offset = llvm::ConstantInt::get(CGF.Int32Ty, neededSSE * 16); 2527 CGF.Builder.CreateStore(CGF.Builder.CreateAdd(fp_offset, Offset), 2528 fp_offset_p); 2529 } 2530 CGF.EmitBranch(ContBlock); 2531 2532 // Emit code to load the value if it was passed in memory. 2533 2534 CGF.EmitBlock(InMemBlock); 2535 llvm::Value *MemAddr = EmitVAArgFromMemory(VAListAddr, Ty, CGF); 2536 2537 // Return the appropriate result. 2538 2539 CGF.EmitBlock(ContBlock); 2540 llvm::PHINode *ResAddr = CGF.Builder.CreatePHI(RegAddr->getType(), 2, 2541 "vaarg.addr"); 2542 ResAddr->addIncoming(RegAddr, InRegBlock); 2543 ResAddr->addIncoming(MemAddr, InMemBlock); 2544 return ResAddr; 2545} 2546 2547ABIArgInfo WinX86_64ABIInfo::classify(QualType Ty, bool IsReturnType) const { 2548 2549 if (Ty->isVoidType()) 2550 return ABIArgInfo::getIgnore(); 2551 2552 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 2553 Ty = EnumTy->getDecl()->getIntegerType(); 2554 2555 uint64_t Size = getContext().getTypeSize(Ty); 2556 2557 if (const RecordType *RT = Ty->getAs<RecordType>()) { 2558 if (IsReturnType) { 2559 if (isRecordReturnIndirect(RT, CGT)) 2560 return ABIArgInfo::getIndirect(0, false); 2561 } else { 2562 if (CGCXXABI::RecordArgABI RAA = getRecordArgABI(RT, CGT)) 2563 return ABIArgInfo::getIndirect(0, RAA == CGCXXABI::RAA_DirectInMemory); 2564 } 2565 2566 if (RT->getDecl()->hasFlexibleArrayMember()) 2567 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 2568 2569 // FIXME: mingw-w64-gcc emits 128-bit struct as i128 2570 if (Size == 128 && getTarget().getTriple().getOS() == llvm::Triple::MinGW32) 2571 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(), 2572 Size)); 2573 2574 // MS x64 ABI requirement: "Any argument that doesn't fit in 8 bytes, or is 2575 // not 1, 2, 4, or 8 bytes, must be passed by reference." 2576 if (Size <= 64 && 2577 (Size & (Size - 1)) == 0) 2578 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(), 2579 Size)); 2580 2581 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 2582 } 2583 2584 if (Ty->isPromotableIntegerType()) 2585 return ABIArgInfo::getExtend(); 2586 2587 return ABIArgInfo::getDirect(); 2588} 2589 2590void WinX86_64ABIInfo::computeInfo(CGFunctionInfo &FI) const { 2591 2592 QualType RetTy = FI.getReturnType(); 2593 FI.getReturnInfo() = classify(RetTy, true); 2594 2595 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 2596 it != ie; ++it) 2597 it->info = classify(it->type, false); 2598} 2599 2600llvm::Value *WinX86_64ABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 2601 CodeGenFunction &CGF) const { 2602 llvm::Type *BPP = CGF.Int8PtrPtrTy; 2603 2604 CGBuilderTy &Builder = CGF.Builder; 2605 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP, 2606 "ap"); 2607 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur"); 2608 llvm::Type *PTy = 2609 llvm::PointerType::getUnqual(CGF.ConvertType(Ty)); 2610 llvm::Value *AddrTyped = Builder.CreateBitCast(Addr, PTy); 2611 2612 uint64_t Offset = 2613 llvm::RoundUpToAlignment(CGF.getContext().getTypeSize(Ty) / 8, 8); 2614 llvm::Value *NextAddr = 2615 Builder.CreateGEP(Addr, llvm::ConstantInt::get(CGF.Int32Ty, Offset), 2616 "ap.next"); 2617 Builder.CreateStore(NextAddr, VAListAddrAsBPP); 2618 2619 return AddrTyped; 2620} 2621 2622namespace { 2623 2624class NaClX86_64ABIInfo : public ABIInfo { 2625 public: 2626 NaClX86_64ABIInfo(CodeGen::CodeGenTypes &CGT, bool HasAVX) 2627 : ABIInfo(CGT), PInfo(CGT), NInfo(CGT, HasAVX) {} 2628 virtual void computeInfo(CGFunctionInfo &FI) const; 2629 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 2630 CodeGenFunction &CGF) const; 2631 private: 2632 PNaClABIInfo PInfo; // Used for generating calls with pnaclcall callingconv. 2633 X86_64ABIInfo NInfo; // Used for everything else. 2634}; 2635 2636class NaClX86_64TargetCodeGenInfo : public TargetCodeGenInfo { 2637 public: 2638 NaClX86_64TargetCodeGenInfo(CodeGen::CodeGenTypes &CGT, bool HasAVX) 2639 : TargetCodeGenInfo(new NaClX86_64ABIInfo(CGT, HasAVX)) {} 2640}; 2641 2642} 2643 2644void NaClX86_64ABIInfo::computeInfo(CGFunctionInfo &FI) const { 2645 if (FI.getASTCallingConvention() == CC_PnaclCall) 2646 PInfo.computeInfo(FI); 2647 else 2648 NInfo.computeInfo(FI); 2649} 2650 2651llvm::Value *NaClX86_64ABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 2652 CodeGenFunction &CGF) const { 2653 // Always use the native convention; calling pnacl-style varargs functions 2654 // is unuspported. 2655 return NInfo.EmitVAArg(VAListAddr, Ty, CGF); 2656} 2657 2658 2659// PowerPC-32 2660 2661namespace { 2662class PPC32TargetCodeGenInfo : public DefaultTargetCodeGenInfo { 2663public: 2664 PPC32TargetCodeGenInfo(CodeGenTypes &CGT) : DefaultTargetCodeGenInfo(CGT) {} 2665 2666 int getDwarfEHStackPointer(CodeGen::CodeGenModule &M) const { 2667 // This is recovered from gcc output. 2668 return 1; // r1 is the dedicated stack pointer 2669 } 2670 2671 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 2672 llvm::Value *Address) const; 2673}; 2674 2675} 2676 2677bool 2678PPC32TargetCodeGenInfo::initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 2679 llvm::Value *Address) const { 2680 // This is calculated from the LLVM and GCC tables and verified 2681 // against gcc output. AFAIK all ABIs use the same encoding. 2682 2683 CodeGen::CGBuilderTy &Builder = CGF.Builder; 2684 2685 llvm::IntegerType *i8 = CGF.Int8Ty; 2686 llvm::Value *Four8 = llvm::ConstantInt::get(i8, 4); 2687 llvm::Value *Eight8 = llvm::ConstantInt::get(i8, 8); 2688 llvm::Value *Sixteen8 = llvm::ConstantInt::get(i8, 16); 2689 2690 // 0-31: r0-31, the 4-byte general-purpose registers 2691 AssignToArrayRange(Builder, Address, Four8, 0, 31); 2692 2693 // 32-63: fp0-31, the 8-byte floating-point registers 2694 AssignToArrayRange(Builder, Address, Eight8, 32, 63); 2695 2696 // 64-76 are various 4-byte special-purpose registers: 2697 // 64: mq 2698 // 65: lr 2699 // 66: ctr 2700 // 67: ap 2701 // 68-75 cr0-7 2702 // 76: xer 2703 AssignToArrayRange(Builder, Address, Four8, 64, 76); 2704 2705 // 77-108: v0-31, the 16-byte vector registers 2706 AssignToArrayRange(Builder, Address, Sixteen8, 77, 108); 2707 2708 // 109: vrsave 2709 // 110: vscr 2710 // 111: spe_acc 2711 // 112: spefscr 2712 // 113: sfp 2713 AssignToArrayRange(Builder, Address, Four8, 109, 113); 2714 2715 return false; 2716} 2717 2718// PowerPC-64 2719 2720namespace { 2721/// PPC64_SVR4_ABIInfo - The 64-bit PowerPC ELF (SVR4) ABI information. 2722class PPC64_SVR4_ABIInfo : public DefaultABIInfo { 2723 2724public: 2725 PPC64_SVR4_ABIInfo(CodeGen::CodeGenTypes &CGT) : DefaultABIInfo(CGT) {} 2726 2727 bool isPromotableTypeForABI(QualType Ty) const; 2728 2729 ABIArgInfo classifyReturnType(QualType RetTy) const; 2730 ABIArgInfo classifyArgumentType(QualType Ty) const; 2731 2732 // TODO: We can add more logic to computeInfo to improve performance. 2733 // Example: For aggregate arguments that fit in a register, we could 2734 // use getDirectInReg (as is done below for structs containing a single 2735 // floating-point value) to avoid pushing them to memory on function 2736 // entry. This would require changing the logic in PPCISelLowering 2737 // when lowering the parameters in the caller and args in the callee. 2738 virtual void computeInfo(CGFunctionInfo &FI) const { 2739 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 2740 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 2741 it != ie; ++it) { 2742 // We rely on the default argument classification for the most part. 2743 // One exception: An aggregate containing a single floating-point 2744 // item must be passed in a register if one is available. 2745 const Type *T = isSingleElementStruct(it->type, getContext()); 2746 if (T) { 2747 const BuiltinType *BT = T->getAs<BuiltinType>(); 2748 if (BT && BT->isFloatingPoint()) { 2749 QualType QT(T, 0); 2750 it->info = ABIArgInfo::getDirectInReg(CGT.ConvertType(QT)); 2751 continue; 2752 } 2753 } 2754 it->info = classifyArgumentType(it->type); 2755 } 2756 } 2757 2758 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, 2759 QualType Ty, 2760 CodeGenFunction &CGF) const; 2761}; 2762 2763class PPC64_SVR4_TargetCodeGenInfo : public TargetCodeGenInfo { 2764public: 2765 PPC64_SVR4_TargetCodeGenInfo(CodeGenTypes &CGT) 2766 : TargetCodeGenInfo(new PPC64_SVR4_ABIInfo(CGT)) {} 2767 2768 int getDwarfEHStackPointer(CodeGen::CodeGenModule &M) const { 2769 // This is recovered from gcc output. 2770 return 1; // r1 is the dedicated stack pointer 2771 } 2772 2773 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 2774 llvm::Value *Address) const; 2775}; 2776 2777class PPC64TargetCodeGenInfo : public DefaultTargetCodeGenInfo { 2778public: 2779 PPC64TargetCodeGenInfo(CodeGenTypes &CGT) : DefaultTargetCodeGenInfo(CGT) {} 2780 2781 int getDwarfEHStackPointer(CodeGen::CodeGenModule &M) const { 2782 // This is recovered from gcc output. 2783 return 1; // r1 is the dedicated stack pointer 2784 } 2785 2786 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 2787 llvm::Value *Address) const; 2788}; 2789 2790} 2791 2792// Return true if the ABI requires Ty to be passed sign- or zero- 2793// extended to 64 bits. 2794bool 2795PPC64_SVR4_ABIInfo::isPromotableTypeForABI(QualType Ty) const { 2796 // Treat an enum type as its underlying type. 2797 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 2798 Ty = EnumTy->getDecl()->getIntegerType(); 2799 2800 // Promotable integer types are required to be promoted by the ABI. 2801 if (Ty->isPromotableIntegerType()) 2802 return true; 2803 2804 // In addition to the usual promotable integer types, we also need to 2805 // extend all 32-bit types, since the ABI requires promotion to 64 bits. 2806 if (const BuiltinType *BT = Ty->getAs<BuiltinType>()) 2807 switch (BT->getKind()) { 2808 case BuiltinType::Int: 2809 case BuiltinType::UInt: 2810 return true; 2811 default: 2812 break; 2813 } 2814 2815 return false; 2816} 2817 2818ABIArgInfo 2819PPC64_SVR4_ABIInfo::classifyArgumentType(QualType Ty) const { 2820 if (Ty->isAnyComplexType()) 2821 return ABIArgInfo::getDirect(); 2822 2823 if (isAggregateTypeForABI(Ty)) { 2824 if (CGCXXABI::RecordArgABI RAA = getRecordArgABI(Ty, CGT)) 2825 return ABIArgInfo::getIndirect(0, RAA == CGCXXABI::RAA_DirectInMemory); 2826 2827 return ABIArgInfo::getIndirect(0); 2828 } 2829 2830 return (isPromotableTypeForABI(Ty) ? 2831 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 2832} 2833 2834ABIArgInfo 2835PPC64_SVR4_ABIInfo::classifyReturnType(QualType RetTy) const { 2836 if (RetTy->isVoidType()) 2837 return ABIArgInfo::getIgnore(); 2838 2839 if (RetTy->isAnyComplexType()) 2840 return ABIArgInfo::getDirect(); 2841 2842 if (isAggregateTypeForABI(RetTy)) 2843 return ABIArgInfo::getIndirect(0); 2844 2845 return (isPromotableTypeForABI(RetTy) ? 2846 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 2847} 2848 2849// Based on ARMABIInfo::EmitVAArg, adjusted for 64-bit machine. 2850llvm::Value *PPC64_SVR4_ABIInfo::EmitVAArg(llvm::Value *VAListAddr, 2851 QualType Ty, 2852 CodeGenFunction &CGF) const { 2853 llvm::Type *BP = CGF.Int8PtrTy; 2854 llvm::Type *BPP = CGF.Int8PtrPtrTy; 2855 2856 CGBuilderTy &Builder = CGF.Builder; 2857 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP, "ap"); 2858 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur"); 2859 2860 // Update the va_list pointer. The pointer should be bumped by the 2861 // size of the object. We can trust getTypeSize() except for a complex 2862 // type whose base type is smaller than a doubleword. For these, the 2863 // size of the object is 16 bytes; see below for further explanation. 2864 unsigned SizeInBytes = CGF.getContext().getTypeSize(Ty) / 8; 2865 QualType BaseTy; 2866 unsigned CplxBaseSize = 0; 2867 2868 if (const ComplexType *CTy = Ty->getAs<ComplexType>()) { 2869 BaseTy = CTy->getElementType(); 2870 CplxBaseSize = CGF.getContext().getTypeSize(BaseTy) / 8; 2871 if (CplxBaseSize < 8) 2872 SizeInBytes = 16; 2873 } 2874 2875 unsigned Offset = llvm::RoundUpToAlignment(SizeInBytes, 8); 2876 llvm::Value *NextAddr = 2877 Builder.CreateGEP(Addr, llvm::ConstantInt::get(CGF.Int64Ty, Offset), 2878 "ap.next"); 2879 Builder.CreateStore(NextAddr, VAListAddrAsBPP); 2880 2881 // If we have a complex type and the base type is smaller than 8 bytes, 2882 // the ABI calls for the real and imaginary parts to be right-adjusted 2883 // in separate doublewords. However, Clang expects us to produce a 2884 // pointer to a structure with the two parts packed tightly. So generate 2885 // loads of the real and imaginary parts relative to the va_list pointer, 2886 // and store them to a temporary structure. 2887 if (CplxBaseSize && CplxBaseSize < 8) { 2888 llvm::Value *RealAddr = Builder.CreatePtrToInt(Addr, CGF.Int64Ty); 2889 llvm::Value *ImagAddr = RealAddr; 2890 RealAddr = Builder.CreateAdd(RealAddr, Builder.getInt64(8 - CplxBaseSize)); 2891 ImagAddr = Builder.CreateAdd(ImagAddr, Builder.getInt64(16 - CplxBaseSize)); 2892 llvm::Type *PBaseTy = llvm::PointerType::getUnqual(CGF.ConvertType(BaseTy)); 2893 RealAddr = Builder.CreateIntToPtr(RealAddr, PBaseTy); 2894 ImagAddr = Builder.CreateIntToPtr(ImagAddr, PBaseTy); 2895 llvm::Value *Real = Builder.CreateLoad(RealAddr, false, ".vareal"); 2896 llvm::Value *Imag = Builder.CreateLoad(ImagAddr, false, ".vaimag"); 2897 llvm::Value *Ptr = CGF.CreateTempAlloca(CGT.ConvertTypeForMem(Ty), 2898 "vacplx"); 2899 llvm::Value *RealPtr = Builder.CreateStructGEP(Ptr, 0, ".real"); 2900 llvm::Value *ImagPtr = Builder.CreateStructGEP(Ptr, 1, ".imag"); 2901 Builder.CreateStore(Real, RealPtr, false); 2902 Builder.CreateStore(Imag, ImagPtr, false); 2903 return Ptr; 2904 } 2905 2906 // If the argument is smaller than 8 bytes, it is right-adjusted in 2907 // its doubleword slot. Adjust the pointer to pick it up from the 2908 // correct offset. 2909 if (SizeInBytes < 8) { 2910 llvm::Value *AddrAsInt = Builder.CreatePtrToInt(Addr, CGF.Int64Ty); 2911 AddrAsInt = Builder.CreateAdd(AddrAsInt, Builder.getInt64(8 - SizeInBytes)); 2912 Addr = Builder.CreateIntToPtr(AddrAsInt, BP); 2913 } 2914 2915 llvm::Type *PTy = llvm::PointerType::getUnqual(CGF.ConvertType(Ty)); 2916 return Builder.CreateBitCast(Addr, PTy); 2917} 2918 2919static bool 2920PPC64_initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 2921 llvm::Value *Address) { 2922 // This is calculated from the LLVM and GCC tables and verified 2923 // against gcc output. AFAIK all ABIs use the same encoding. 2924 2925 CodeGen::CGBuilderTy &Builder = CGF.Builder; 2926 2927 llvm::IntegerType *i8 = CGF.Int8Ty; 2928 llvm::Value *Four8 = llvm::ConstantInt::get(i8, 4); 2929 llvm::Value *Eight8 = llvm::ConstantInt::get(i8, 8); 2930 llvm::Value *Sixteen8 = llvm::ConstantInt::get(i8, 16); 2931 2932 // 0-31: r0-31, the 8-byte general-purpose registers 2933 AssignToArrayRange(Builder, Address, Eight8, 0, 31); 2934 2935 // 32-63: fp0-31, the 8-byte floating-point registers 2936 AssignToArrayRange(Builder, Address, Eight8, 32, 63); 2937 2938 // 64-76 are various 4-byte special-purpose registers: 2939 // 64: mq 2940 // 65: lr 2941 // 66: ctr 2942 // 67: ap 2943 // 68-75 cr0-7 2944 // 76: xer 2945 AssignToArrayRange(Builder, Address, Four8, 64, 76); 2946 2947 // 77-108: v0-31, the 16-byte vector registers 2948 AssignToArrayRange(Builder, Address, Sixteen8, 77, 108); 2949 2950 // 109: vrsave 2951 // 110: vscr 2952 // 111: spe_acc 2953 // 112: spefscr 2954 // 113: sfp 2955 AssignToArrayRange(Builder, Address, Four8, 109, 113); 2956 2957 return false; 2958} 2959 2960bool 2961PPC64_SVR4_TargetCodeGenInfo::initDwarfEHRegSizeTable( 2962 CodeGen::CodeGenFunction &CGF, 2963 llvm::Value *Address) const { 2964 2965 return PPC64_initDwarfEHRegSizeTable(CGF, Address); 2966} 2967 2968bool 2969PPC64TargetCodeGenInfo::initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 2970 llvm::Value *Address) const { 2971 2972 return PPC64_initDwarfEHRegSizeTable(CGF, Address); 2973} 2974 2975//===----------------------------------------------------------------------===// 2976// ARM ABI Implementation 2977//===----------------------------------------------------------------------===// 2978 2979namespace { 2980 2981class ARMABIInfo : public ABIInfo { 2982public: 2983 enum ABIKind { 2984 APCS = 0, 2985 AAPCS = 1, 2986 AAPCS_VFP 2987 }; 2988 2989private: 2990 ABIKind Kind; 2991 2992public: 2993 ARMABIInfo(CodeGenTypes &CGT, ABIKind _Kind) : ABIInfo(CGT), Kind(_Kind) { 2994 setRuntimeCC(); 2995 } 2996 2997 bool isEABI() const { 2998 StringRef Env = getTarget().getTriple().getEnvironmentName(); 2999 return (Env == "gnueabi" || Env == "eabi" || 3000 Env == "android" || Env == "androideabi"); 3001 } 3002 3003private: 3004 ABIKind getABIKind() const { return Kind; } 3005 3006 ABIArgInfo classifyReturnType(QualType RetTy) const; 3007 ABIArgInfo classifyArgumentType(QualType RetTy, int *VFPRegs, 3008 unsigned &AllocatedVFP, 3009 bool &IsHA) const; 3010 bool isIllegalVectorType(QualType Ty) const; 3011 3012 virtual void computeInfo(CGFunctionInfo &FI) const; 3013 3014 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 3015 CodeGenFunction &CGF) const; 3016 3017 llvm::CallingConv::ID getLLVMDefaultCC() const; 3018 llvm::CallingConv::ID getABIDefaultCC() const; 3019 void setRuntimeCC(); 3020}; 3021 3022class ARMTargetCodeGenInfo : public TargetCodeGenInfo { 3023public: 3024 ARMTargetCodeGenInfo(CodeGenTypes &CGT, ARMABIInfo::ABIKind K) 3025 :TargetCodeGenInfo(new ARMABIInfo(CGT, K)) {} 3026 3027 const ARMABIInfo &getABIInfo() const { 3028 return static_cast<const ARMABIInfo&>(TargetCodeGenInfo::getABIInfo()); 3029 } 3030 3031 int getDwarfEHStackPointer(CodeGen::CodeGenModule &M) const { 3032 return 13; 3033 } 3034 3035 StringRef getARCRetainAutoreleasedReturnValueMarker() const { 3036 return "mov\tr7, r7\t\t@ marker for objc_retainAutoreleaseReturnValue"; 3037 } 3038 3039 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 3040 llvm::Value *Address) const { 3041 llvm::Value *Four8 = llvm::ConstantInt::get(CGF.Int8Ty, 4); 3042 3043 // 0-15 are the 16 integer registers. 3044 AssignToArrayRange(CGF.Builder, Address, Four8, 0, 15); 3045 return false; 3046 } 3047 3048 unsigned getSizeOfUnwindException() const { 3049 if (getABIInfo().isEABI()) return 88; 3050 return TargetCodeGenInfo::getSizeOfUnwindException(); 3051 } 3052}; 3053 3054} 3055 3056void ARMABIInfo::computeInfo(CGFunctionInfo &FI) const { 3057 // To correctly handle Homogeneous Aggregate, we need to keep track of the 3058 // VFP registers allocated so far. 3059 // C.1.vfp If the argument is a VFP CPRC and there are sufficient consecutive 3060 // VFP registers of the appropriate type unallocated then the argument is 3061 // allocated to the lowest-numbered sequence of such registers. 3062 // C.2.vfp If the argument is a VFP CPRC then any VFP registers that are 3063 // unallocated are marked as unavailable. 3064 unsigned AllocatedVFP = 0; 3065 int VFPRegs[16] = { 0 }; 3066 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 3067 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 3068 it != ie; ++it) { 3069 unsigned PreAllocation = AllocatedVFP; 3070 bool IsHA = false; 3071 // 6.1.2.3 There is one VFP co-processor register class using registers 3072 // s0-s15 (d0-d7) for passing arguments. 3073 const unsigned NumVFPs = 16; 3074 it->info = classifyArgumentType(it->type, VFPRegs, AllocatedVFP, IsHA); 3075 // If we do not have enough VFP registers for the HA, any VFP registers 3076 // that are unallocated are marked as unavailable. To achieve this, we add 3077 // padding of (NumVFPs - PreAllocation) floats. 3078 if (IsHA && AllocatedVFP > NumVFPs && PreAllocation < NumVFPs) { 3079 llvm::Type *PaddingTy = llvm::ArrayType::get( 3080 llvm::Type::getFloatTy(getVMContext()), NumVFPs - PreAllocation); 3081 it->info = ABIArgInfo::getExpandWithPadding(false, PaddingTy); 3082 } 3083 } 3084 3085 // Always honor user-specified calling convention. 3086 if (FI.getCallingConvention() != llvm::CallingConv::C) 3087 return; 3088 3089 llvm::CallingConv::ID cc = getRuntimeCC(); 3090 if (cc != llvm::CallingConv::C) 3091 FI.setEffectiveCallingConvention(cc); 3092} 3093 3094/// Return the default calling convention that LLVM will use. 3095llvm::CallingConv::ID ARMABIInfo::getLLVMDefaultCC() const { 3096 // The default calling convention that LLVM will infer. 3097 if (getTarget().getTriple().getEnvironmentName()=="gnueabihf") 3098 return llvm::CallingConv::ARM_AAPCS_VFP; 3099 else if (isEABI()) 3100 return llvm::CallingConv::ARM_AAPCS; 3101 else 3102 return llvm::CallingConv::ARM_APCS; 3103} 3104 3105/// Return the calling convention that our ABI would like us to use 3106/// as the C calling convention. 3107llvm::CallingConv::ID ARMABIInfo::getABIDefaultCC() const { 3108 switch (getABIKind()) { 3109 case APCS: return llvm::CallingConv::ARM_APCS; 3110 case AAPCS: return llvm::CallingConv::ARM_AAPCS; 3111 case AAPCS_VFP: return llvm::CallingConv::ARM_AAPCS_VFP; 3112 } 3113 llvm_unreachable("bad ABI kind"); 3114} 3115 3116void ARMABIInfo::setRuntimeCC() { 3117 assert(getRuntimeCC() == llvm::CallingConv::C); 3118 3119 // Don't muddy up the IR with a ton of explicit annotations if 3120 // they'd just match what LLVM will infer from the triple. 3121 llvm::CallingConv::ID abiCC = getABIDefaultCC(); 3122 if (abiCC != getLLVMDefaultCC()) 3123 RuntimeCC = abiCC; 3124} 3125 3126/// isHomogeneousAggregate - Return true if a type is an AAPCS-VFP homogeneous 3127/// aggregate. If HAMembers is non-null, the number of base elements 3128/// contained in the type is returned through it; this is used for the 3129/// recursive calls that check aggregate component types. 3130static bool isHomogeneousAggregate(QualType Ty, const Type *&Base, 3131 ASTContext &Context, 3132 uint64_t *HAMembers = 0) { 3133 uint64_t Members = 0; 3134 if (const ConstantArrayType *AT = Context.getAsConstantArrayType(Ty)) { 3135 if (!isHomogeneousAggregate(AT->getElementType(), Base, Context, &Members)) 3136 return false; 3137 Members *= AT->getSize().getZExtValue(); 3138 } else if (const RecordType *RT = Ty->getAs<RecordType>()) { 3139 const RecordDecl *RD = RT->getDecl(); 3140 if (RD->hasFlexibleArrayMember()) 3141 return false; 3142 3143 Members = 0; 3144 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 3145 i != e; ++i) { 3146 const FieldDecl *FD = *i; 3147 uint64_t FldMembers; 3148 if (!isHomogeneousAggregate(FD->getType(), Base, Context, &FldMembers)) 3149 return false; 3150 3151 Members = (RD->isUnion() ? 3152 std::max(Members, FldMembers) : Members + FldMembers); 3153 } 3154 } else { 3155 Members = 1; 3156 if (const ComplexType *CT = Ty->getAs<ComplexType>()) { 3157 Members = 2; 3158 Ty = CT->getElementType(); 3159 } 3160 3161 // Homogeneous aggregates for AAPCS-VFP must have base types of float, 3162 // double, or 64-bit or 128-bit vectors. 3163 if (const BuiltinType *BT = Ty->getAs<BuiltinType>()) { 3164 if (BT->getKind() != BuiltinType::Float && 3165 BT->getKind() != BuiltinType::Double && 3166 BT->getKind() != BuiltinType::LongDouble) 3167 return false; 3168 } else if (const VectorType *VT = Ty->getAs<VectorType>()) { 3169 unsigned VecSize = Context.getTypeSize(VT); 3170 if (VecSize != 64 && VecSize != 128) 3171 return false; 3172 } else { 3173 return false; 3174 } 3175 3176 // The base type must be the same for all members. Vector types of the 3177 // same total size are treated as being equivalent here. 3178 const Type *TyPtr = Ty.getTypePtr(); 3179 if (!Base) 3180 Base = TyPtr; 3181 if (Base != TyPtr && 3182 (!Base->isVectorType() || !TyPtr->isVectorType() || 3183 Context.getTypeSize(Base) != Context.getTypeSize(TyPtr))) 3184 return false; 3185 } 3186 3187 // Homogeneous Aggregates can have at most 4 members of the base type. 3188 if (HAMembers) 3189 *HAMembers = Members; 3190 3191 return (Members > 0 && Members <= 4); 3192} 3193 3194/// markAllocatedVFPs - update VFPRegs according to the alignment and 3195/// number of VFP registers (unit is S register) requested. 3196static void markAllocatedVFPs(int *VFPRegs, unsigned &AllocatedVFP, 3197 unsigned Alignment, 3198 unsigned NumRequired) { 3199 // Early Exit. 3200 if (AllocatedVFP >= 16) 3201 return; 3202 // C.1.vfp If the argument is a VFP CPRC and there are sufficient consecutive 3203 // VFP registers of the appropriate type unallocated then the argument is 3204 // allocated to the lowest-numbered sequence of such registers. 3205 for (unsigned I = 0; I < 16; I += Alignment) { 3206 bool FoundSlot = true; 3207 for (unsigned J = I, JEnd = I + NumRequired; J < JEnd; J++) 3208 if (J >= 16 || VFPRegs[J]) { 3209 FoundSlot = false; 3210 break; 3211 } 3212 if (FoundSlot) { 3213 for (unsigned J = I, JEnd = I + NumRequired; J < JEnd; J++) 3214 VFPRegs[J] = 1; 3215 AllocatedVFP += NumRequired; 3216 return; 3217 } 3218 } 3219 // C.2.vfp If the argument is a VFP CPRC then any VFP registers that are 3220 // unallocated are marked as unavailable. 3221 for (unsigned I = 0; I < 16; I++) 3222 VFPRegs[I] = 1; 3223 AllocatedVFP = 17; // We do not have enough VFP registers. 3224} 3225 3226ABIArgInfo ARMABIInfo::classifyArgumentType(QualType Ty, int *VFPRegs, 3227 unsigned &AllocatedVFP, 3228 bool &IsHA) const { 3229 // We update number of allocated VFPs according to 3230 // 6.1.2.1 The following argument types are VFP CPRCs: 3231 // A single-precision floating-point type (including promoted 3232 // half-precision types); A double-precision floating-point type; 3233 // A 64-bit or 128-bit containerized vector type; Homogeneous Aggregate 3234 // with a Base Type of a single- or double-precision floating-point type, 3235 // 64-bit containerized vectors or 128-bit containerized vectors with one 3236 // to four Elements. 3237 3238 // Handle illegal vector types here. 3239 if (isIllegalVectorType(Ty)) { 3240 uint64_t Size = getContext().getTypeSize(Ty); 3241 if (Size <= 32) { 3242 llvm::Type *ResType = 3243 llvm::Type::getInt32Ty(getVMContext()); 3244 return ABIArgInfo::getDirect(ResType); 3245 } 3246 if (Size == 64) { 3247 llvm::Type *ResType = llvm::VectorType::get( 3248 llvm::Type::getInt32Ty(getVMContext()), 2); 3249 markAllocatedVFPs(VFPRegs, AllocatedVFP, 2, 2); 3250 return ABIArgInfo::getDirect(ResType); 3251 } 3252 if (Size == 128) { 3253 llvm::Type *ResType = llvm::VectorType::get( 3254 llvm::Type::getInt32Ty(getVMContext()), 4); 3255 markAllocatedVFPs(VFPRegs, AllocatedVFP, 4, 4); 3256 return ABIArgInfo::getDirect(ResType); 3257 } 3258 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 3259 } 3260 // Update VFPRegs for legal vector types. 3261 if (const VectorType *VT = Ty->getAs<VectorType>()) { 3262 uint64_t Size = getContext().getTypeSize(VT); 3263 // Size of a legal vector should be power of 2 and above 64. 3264 markAllocatedVFPs(VFPRegs, AllocatedVFP, Size >= 128 ? 4 : 2, Size / 32); 3265 } 3266 // Update VFPRegs for floating point types. 3267 if (const BuiltinType *BT = Ty->getAs<BuiltinType>()) { 3268 if (BT->getKind() == BuiltinType::Half || 3269 BT->getKind() == BuiltinType::Float) 3270 markAllocatedVFPs(VFPRegs, AllocatedVFP, 1, 1); 3271 if (BT->getKind() == BuiltinType::Double || 3272 BT->getKind() == BuiltinType::LongDouble) 3273 markAllocatedVFPs(VFPRegs, AllocatedVFP, 2, 2); 3274 } 3275 3276 if (!isAggregateTypeForABI(Ty)) { 3277 // Treat an enum type as its underlying type. 3278 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 3279 Ty = EnumTy->getDecl()->getIntegerType(); 3280 3281 return (Ty->isPromotableIntegerType() ? 3282 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 3283 } 3284 3285 // Ignore empty records. 3286 if (isEmptyRecord(getContext(), Ty, true)) 3287 return ABIArgInfo::getIgnore(); 3288 3289 if (CGCXXABI::RecordArgABI RAA = getRecordArgABI(Ty, CGT)) 3290 return ABIArgInfo::getIndirect(0, RAA == CGCXXABI::RAA_DirectInMemory); 3291 3292 if (getABIKind() == ARMABIInfo::AAPCS_VFP) { 3293 // Homogeneous Aggregates need to be expanded when we can fit the aggregate 3294 // into VFP registers. 3295 const Type *Base = 0; 3296 uint64_t Members = 0; 3297 if (isHomogeneousAggregate(Ty, Base, getContext(), &Members)) { 3298 assert(Base && "Base class should be set for homogeneous aggregate"); 3299 // Base can be a floating-point or a vector. 3300 if (Base->isVectorType()) { 3301 // ElementSize is in number of floats. 3302 unsigned ElementSize = getContext().getTypeSize(Base) == 64 ? 2 : 4; 3303 markAllocatedVFPs(VFPRegs, AllocatedVFP, ElementSize, 3304 Members * ElementSize); 3305 } else if (Base->isSpecificBuiltinType(BuiltinType::Float)) 3306 markAllocatedVFPs(VFPRegs, AllocatedVFP, 1, Members); 3307 else { 3308 assert(Base->isSpecificBuiltinType(BuiltinType::Double) || 3309 Base->isSpecificBuiltinType(BuiltinType::LongDouble)); 3310 markAllocatedVFPs(VFPRegs, AllocatedVFP, 2, Members * 2); 3311 } 3312 IsHA = true; 3313 return ABIArgInfo::getExpand(); 3314 } 3315 } 3316 3317 // Support byval for ARM. 3318 // The ABI alignment for APCS is 4-byte and for AAPCS at least 4-byte and at 3319 // most 8-byte. We realign the indirect argument if type alignment is bigger 3320 // than ABI alignment. 3321 uint64_t ABIAlign = 4; 3322 uint64_t TyAlign = getContext().getTypeAlign(Ty) / 8; 3323 if (getABIKind() == ARMABIInfo::AAPCS_VFP || 3324 getABIKind() == ARMABIInfo::AAPCS) 3325 ABIAlign = std::min(std::max(TyAlign, (uint64_t)4), (uint64_t)8); 3326 if (getContext().getTypeSizeInChars(Ty) > CharUnits::fromQuantity(64)) { 3327 return ABIArgInfo::getIndirect(0, /*ByVal=*/true, 3328 /*Realign=*/TyAlign > ABIAlign); 3329 } 3330 3331 // Otherwise, pass by coercing to a structure of the appropriate size. 3332 llvm::Type* ElemTy; 3333 unsigned SizeRegs; 3334 // FIXME: Try to match the types of the arguments more accurately where 3335 // we can. 3336 if (getContext().getTypeAlign(Ty) <= 32) { 3337 ElemTy = llvm::Type::getInt32Ty(getVMContext()); 3338 SizeRegs = (getContext().getTypeSize(Ty) + 31) / 32; 3339 } else { 3340 ElemTy = llvm::Type::getInt64Ty(getVMContext()); 3341 SizeRegs = (getContext().getTypeSize(Ty) + 63) / 64; 3342 } 3343 3344 llvm::Type *STy = 3345 llvm::StructType::get(llvm::ArrayType::get(ElemTy, SizeRegs), NULL); 3346 return ABIArgInfo::getDirect(STy); 3347} 3348 3349static bool isIntegerLikeType(QualType Ty, ASTContext &Context, 3350 llvm::LLVMContext &VMContext) { 3351 // APCS, C Language Calling Conventions, Non-Simple Return Values: A structure 3352 // is called integer-like if its size is less than or equal to one word, and 3353 // the offset of each of its addressable sub-fields is zero. 3354 3355 uint64_t Size = Context.getTypeSize(Ty); 3356 3357 // Check that the type fits in a word. 3358 if (Size > 32) 3359 return false; 3360 3361 // FIXME: Handle vector types! 3362 if (Ty->isVectorType()) 3363 return false; 3364 3365 // Float types are never treated as "integer like". 3366 if (Ty->isRealFloatingType()) 3367 return false; 3368 3369 // If this is a builtin or pointer type then it is ok. 3370 if (Ty->getAs<BuiltinType>() || Ty->isPointerType()) 3371 return true; 3372 3373 // Small complex integer types are "integer like". 3374 if (const ComplexType *CT = Ty->getAs<ComplexType>()) 3375 return isIntegerLikeType(CT->getElementType(), Context, VMContext); 3376 3377 // Single element and zero sized arrays should be allowed, by the definition 3378 // above, but they are not. 3379 3380 // Otherwise, it must be a record type. 3381 const RecordType *RT = Ty->getAs<RecordType>(); 3382 if (!RT) return false; 3383 3384 // Ignore records with flexible arrays. 3385 const RecordDecl *RD = RT->getDecl(); 3386 if (RD->hasFlexibleArrayMember()) 3387 return false; 3388 3389 // Check that all sub-fields are at offset 0, and are themselves "integer 3390 // like". 3391 const ASTRecordLayout &Layout = Context.getASTRecordLayout(RD); 3392 3393 bool HadField = false; 3394 unsigned idx = 0; 3395 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 3396 i != e; ++i, ++idx) { 3397 const FieldDecl *FD = *i; 3398 3399 // Bit-fields are not addressable, we only need to verify they are "integer 3400 // like". We still have to disallow a subsequent non-bitfield, for example: 3401 // struct { int : 0; int x } 3402 // is non-integer like according to gcc. 3403 if (FD->isBitField()) { 3404 if (!RD->isUnion()) 3405 HadField = true; 3406 3407 if (!isIntegerLikeType(FD->getType(), Context, VMContext)) 3408 return false; 3409 3410 continue; 3411 } 3412 3413 // Check if this field is at offset 0. 3414 if (Layout.getFieldOffset(idx) != 0) 3415 return false; 3416 3417 if (!isIntegerLikeType(FD->getType(), Context, VMContext)) 3418 return false; 3419 3420 // Only allow at most one field in a structure. This doesn't match the 3421 // wording above, but follows gcc in situations with a field following an 3422 // empty structure. 3423 if (!RD->isUnion()) { 3424 if (HadField) 3425 return false; 3426 3427 HadField = true; 3428 } 3429 } 3430 3431 return true; 3432} 3433 3434ABIArgInfo ARMABIInfo::classifyReturnType(QualType RetTy) const { 3435 if (RetTy->isVoidType()) 3436 return ABIArgInfo::getIgnore(); 3437 3438 // Large vector types should be returned via memory. 3439 if (RetTy->isVectorType() && getContext().getTypeSize(RetTy) > 128) 3440 return ABIArgInfo::getIndirect(0); 3441 3442 if (!isAggregateTypeForABI(RetTy)) { 3443 // Treat an enum type as its underlying type. 3444 if (const EnumType *EnumTy = RetTy->getAs<EnumType>()) 3445 RetTy = EnumTy->getDecl()->getIntegerType(); 3446 3447 return (RetTy->isPromotableIntegerType() ? 3448 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 3449 } 3450 3451 // Structures with either a non-trivial destructor or a non-trivial 3452 // copy constructor are always indirect. 3453 if (isRecordReturnIndirect(RetTy, CGT)) 3454 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 3455 3456 // Are we following APCS? 3457 if (getABIKind() == APCS) { 3458 if (isEmptyRecord(getContext(), RetTy, false)) 3459 return ABIArgInfo::getIgnore(); 3460 3461 // Complex types are all returned as packed integers. 3462 // 3463 // FIXME: Consider using 2 x vector types if the back end handles them 3464 // correctly. 3465 if (RetTy->isAnyComplexType()) 3466 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(), 3467 getContext().getTypeSize(RetTy))); 3468 3469 // Integer like structures are returned in r0. 3470 if (isIntegerLikeType(RetTy, getContext(), getVMContext())) { 3471 // Return in the smallest viable integer type. 3472 uint64_t Size = getContext().getTypeSize(RetTy); 3473 if (Size <= 8) 3474 return ABIArgInfo::getDirect(llvm::Type::getInt8Ty(getVMContext())); 3475 if (Size <= 16) 3476 return ABIArgInfo::getDirect(llvm::Type::getInt16Ty(getVMContext())); 3477 return ABIArgInfo::getDirect(llvm::Type::getInt32Ty(getVMContext())); 3478 } 3479 3480 // Otherwise return in memory. 3481 return ABIArgInfo::getIndirect(0); 3482 } 3483 3484 // Otherwise this is an AAPCS variant. 3485 3486 if (isEmptyRecord(getContext(), RetTy, true)) 3487 return ABIArgInfo::getIgnore(); 3488 3489 // Check for homogeneous aggregates with AAPCS-VFP. 3490 if (getABIKind() == AAPCS_VFP) { 3491 const Type *Base = 0; 3492 if (isHomogeneousAggregate(RetTy, Base, getContext())) { 3493 assert(Base && "Base class should be set for homogeneous aggregate"); 3494 // Homogeneous Aggregates are returned directly. 3495 return ABIArgInfo::getDirect(); 3496 } 3497 } 3498 3499 // Aggregates <= 4 bytes are returned in r0; other aggregates 3500 // are returned indirectly. 3501 uint64_t Size = getContext().getTypeSize(RetTy); 3502 if (Size <= 32) { 3503 // Return in the smallest viable integer type. 3504 if (Size <= 8) 3505 return ABIArgInfo::getDirect(llvm::Type::getInt8Ty(getVMContext())); 3506 if (Size <= 16) 3507 return ABIArgInfo::getDirect(llvm::Type::getInt16Ty(getVMContext())); 3508 return ABIArgInfo::getDirect(llvm::Type::getInt32Ty(getVMContext())); 3509 } 3510 3511 return ABIArgInfo::getIndirect(0); 3512} 3513 3514/// isIllegalVector - check whether Ty is an illegal vector type. 3515bool ARMABIInfo::isIllegalVectorType(QualType Ty) const { 3516 if (const VectorType *VT = Ty->getAs<VectorType>()) { 3517 // Check whether VT is legal. 3518 unsigned NumElements = VT->getNumElements(); 3519 uint64_t Size = getContext().getTypeSize(VT); 3520 // NumElements should be power of 2. 3521 if ((NumElements & (NumElements - 1)) != 0) 3522 return true; 3523 // Size should be greater than 32 bits. 3524 return Size <= 32; 3525 } 3526 return false; 3527} 3528 3529llvm::Value *ARMABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 3530 CodeGenFunction &CGF) const { 3531 llvm::Type *BP = CGF.Int8PtrTy; 3532 llvm::Type *BPP = CGF.Int8PtrPtrTy; 3533 3534 CGBuilderTy &Builder = CGF.Builder; 3535 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP, "ap"); 3536 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur"); 3537 3538 uint64_t Size = CGF.getContext().getTypeSize(Ty) / 8; 3539 uint64_t TyAlign = CGF.getContext().getTypeAlign(Ty) / 8; 3540 bool IsIndirect = false; 3541 3542 // The ABI alignment for 64-bit or 128-bit vectors is 8 for AAPCS and 4 for 3543 // APCS. For AAPCS, the ABI alignment is at least 4-byte and at most 8-byte. 3544 if (getABIKind() == ARMABIInfo::AAPCS_VFP || 3545 getABIKind() == ARMABIInfo::AAPCS) 3546 TyAlign = std::min(std::max(TyAlign, (uint64_t)4), (uint64_t)8); 3547 else 3548 TyAlign = 4; 3549 // Use indirect if size of the illegal vector is bigger than 16 bytes. 3550 if (isIllegalVectorType(Ty) && Size > 16) { 3551 IsIndirect = true; 3552 Size = 4; 3553 TyAlign = 4; 3554 } 3555 3556 // Handle address alignment for ABI alignment > 4 bytes. 3557 if (TyAlign > 4) { 3558 assert((TyAlign & (TyAlign - 1)) == 0 && 3559 "Alignment is not power of 2!"); 3560 llvm::Value *AddrAsInt = Builder.CreatePtrToInt(Addr, CGF.Int32Ty); 3561 AddrAsInt = Builder.CreateAdd(AddrAsInt, Builder.getInt32(TyAlign - 1)); 3562 AddrAsInt = Builder.CreateAnd(AddrAsInt, Builder.getInt32(~(TyAlign - 1))); 3563 Addr = Builder.CreateIntToPtr(AddrAsInt, BP, "ap.align"); 3564 } 3565 3566 uint64_t Offset = 3567 llvm::RoundUpToAlignment(Size, 4); 3568 llvm::Value *NextAddr = 3569 Builder.CreateGEP(Addr, llvm::ConstantInt::get(CGF.Int32Ty, Offset), 3570 "ap.next"); 3571 Builder.CreateStore(NextAddr, VAListAddrAsBPP); 3572 3573 if (IsIndirect) 3574 Addr = Builder.CreateLoad(Builder.CreateBitCast(Addr, BPP)); 3575 else if (TyAlign < CGF.getContext().getTypeAlign(Ty) / 8) { 3576 // We can't directly cast ap.cur to pointer to a vector type, since ap.cur 3577 // may not be correctly aligned for the vector type. We create an aligned 3578 // temporary space and copy the content over from ap.cur to the temporary 3579 // space. This is necessary if the natural alignment of the type is greater 3580 // than the ABI alignment. 3581 llvm::Type *I8PtrTy = Builder.getInt8PtrTy(); 3582 CharUnits CharSize = getContext().getTypeSizeInChars(Ty); 3583 llvm::Value *AlignedTemp = CGF.CreateTempAlloca(CGF.ConvertType(Ty), 3584 "var.align"); 3585 llvm::Value *Dst = Builder.CreateBitCast(AlignedTemp, I8PtrTy); 3586 llvm::Value *Src = Builder.CreateBitCast(Addr, I8PtrTy); 3587 Builder.CreateMemCpy(Dst, Src, 3588 llvm::ConstantInt::get(CGF.IntPtrTy, CharSize.getQuantity()), 3589 TyAlign, false); 3590 Addr = AlignedTemp; //The content is in aligned location. 3591 } 3592 llvm::Type *PTy = 3593 llvm::PointerType::getUnqual(CGF.ConvertType(Ty)); 3594 llvm::Value *AddrTyped = Builder.CreateBitCast(Addr, PTy); 3595 3596 return AddrTyped; 3597} 3598 3599namespace { 3600 3601class NaClARMABIInfo : public ABIInfo { 3602 public: 3603 NaClARMABIInfo(CodeGen::CodeGenTypes &CGT, ARMABIInfo::ABIKind Kind) 3604 : ABIInfo(CGT), PInfo(CGT), NInfo(CGT, Kind) {} 3605 virtual void computeInfo(CGFunctionInfo &FI) const; 3606 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 3607 CodeGenFunction &CGF) const; 3608 private: 3609 PNaClABIInfo PInfo; // Used for generating calls with pnaclcall callingconv. 3610 ARMABIInfo NInfo; // Used for everything else. 3611}; 3612 3613class NaClARMTargetCodeGenInfo : public TargetCodeGenInfo { 3614 public: 3615 NaClARMTargetCodeGenInfo(CodeGen::CodeGenTypes &CGT, ARMABIInfo::ABIKind Kind) 3616 : TargetCodeGenInfo(new NaClARMABIInfo(CGT, Kind)) {} 3617}; 3618 3619} 3620 3621void NaClARMABIInfo::computeInfo(CGFunctionInfo &FI) const { 3622 if (FI.getASTCallingConvention() == CC_PnaclCall) 3623 PInfo.computeInfo(FI); 3624 else 3625 static_cast<const ABIInfo&>(NInfo).computeInfo(FI); 3626} 3627 3628llvm::Value *NaClARMABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 3629 CodeGenFunction &CGF) const { 3630 // Always use the native convention; calling pnacl-style varargs functions 3631 // is unsupported. 3632 return static_cast<const ABIInfo&>(NInfo).EmitVAArg(VAListAddr, Ty, CGF); 3633} 3634 3635//===----------------------------------------------------------------------===// 3636// AArch64 ABI Implementation 3637//===----------------------------------------------------------------------===// 3638 3639namespace { 3640 3641class AArch64ABIInfo : public ABIInfo { 3642public: 3643 AArch64ABIInfo(CodeGenTypes &CGT) : ABIInfo(CGT) {} 3644 3645private: 3646 // The AArch64 PCS is explicit about return types and argument types being 3647 // handled identically, so we don't need to draw a distinction between 3648 // Argument and Return classification. 3649 ABIArgInfo classifyGenericType(QualType Ty, int &FreeIntRegs, 3650 int &FreeVFPRegs) const; 3651 3652 ABIArgInfo tryUseRegs(QualType Ty, int &FreeRegs, int RegsNeeded, bool IsInt, 3653 llvm::Type *DirectTy = 0) const; 3654 3655 virtual void computeInfo(CGFunctionInfo &FI) const; 3656 3657 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 3658 CodeGenFunction &CGF) const; 3659}; 3660 3661class AArch64TargetCodeGenInfo : public TargetCodeGenInfo { 3662public: 3663 AArch64TargetCodeGenInfo(CodeGenTypes &CGT) 3664 :TargetCodeGenInfo(new AArch64ABIInfo(CGT)) {} 3665 3666 const AArch64ABIInfo &getABIInfo() const { 3667 return static_cast<const AArch64ABIInfo&>(TargetCodeGenInfo::getABIInfo()); 3668 } 3669 3670 int getDwarfEHStackPointer(CodeGen::CodeGenModule &M) const { 3671 return 31; 3672 } 3673 3674 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 3675 llvm::Value *Address) const { 3676 // 0-31 are x0-x30 and sp: 8 bytes each 3677 llvm::Value *Eight8 = llvm::ConstantInt::get(CGF.Int8Ty, 8); 3678 AssignToArrayRange(CGF.Builder, Address, Eight8, 0, 31); 3679 3680 // 64-95 are v0-v31: 16 bytes each 3681 llvm::Value *Sixteen8 = llvm::ConstantInt::get(CGF.Int8Ty, 16); 3682 AssignToArrayRange(CGF.Builder, Address, Sixteen8, 64, 95); 3683 3684 return false; 3685 } 3686 3687}; 3688 3689} 3690 3691void AArch64ABIInfo::computeInfo(CGFunctionInfo &FI) const { 3692 int FreeIntRegs = 8, FreeVFPRegs = 8; 3693 3694 FI.getReturnInfo() = classifyGenericType(FI.getReturnType(), 3695 FreeIntRegs, FreeVFPRegs); 3696 3697 FreeIntRegs = FreeVFPRegs = 8; 3698 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 3699 it != ie; ++it) { 3700 it->info = classifyGenericType(it->type, FreeIntRegs, FreeVFPRegs); 3701 3702 } 3703} 3704 3705ABIArgInfo 3706AArch64ABIInfo::tryUseRegs(QualType Ty, int &FreeRegs, int RegsNeeded, 3707 bool IsInt, llvm::Type *DirectTy) const { 3708 if (FreeRegs >= RegsNeeded) { 3709 FreeRegs -= RegsNeeded; 3710 return ABIArgInfo::getDirect(DirectTy); 3711 } 3712 3713 llvm::Type *Padding = 0; 3714 3715 // We need padding so that later arguments don't get filled in anyway. That 3716 // wouldn't happen if only ByVal arguments followed in the same category, but 3717 // a large structure will simply seem to be a pointer as far as LLVM is 3718 // concerned. 3719 if (FreeRegs > 0) { 3720 if (IsInt) 3721 Padding = llvm::Type::getInt64Ty(getVMContext()); 3722 else 3723 Padding = llvm::Type::getFloatTy(getVMContext()); 3724 3725 // Either [N x i64] or [N x float]. 3726 Padding = llvm::ArrayType::get(Padding, FreeRegs); 3727 FreeRegs = 0; 3728 } 3729 3730 return ABIArgInfo::getIndirect(getContext().getTypeAlign(Ty) / 8, 3731 /*IsByVal=*/ true, /*Realign=*/ false, 3732 Padding); 3733} 3734 3735 3736ABIArgInfo AArch64ABIInfo::classifyGenericType(QualType Ty, 3737 int &FreeIntRegs, 3738 int &FreeVFPRegs) const { 3739 // Can only occurs for return, but harmless otherwise. 3740 if (Ty->isVoidType()) 3741 return ABIArgInfo::getIgnore(); 3742 3743 // Large vector types should be returned via memory. There's no such concept 3744 // in the ABI, but they'd be over 16 bytes anyway so no matter how they're 3745 // classified they'd go into memory (see B.3). 3746 if (Ty->isVectorType() && getContext().getTypeSize(Ty) > 128) { 3747 if (FreeIntRegs > 0) 3748 --FreeIntRegs; 3749 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 3750 } 3751 3752 // All non-aggregate LLVM types have a concrete ABI representation so they can 3753 // be passed directly. After this block we're guaranteed to be in a 3754 // complicated case. 3755 if (!isAggregateTypeForABI(Ty)) { 3756 // Treat an enum type as its underlying type. 3757 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 3758 Ty = EnumTy->getDecl()->getIntegerType(); 3759 3760 if (Ty->isFloatingType() || Ty->isVectorType()) 3761 return tryUseRegs(Ty, FreeVFPRegs, /*RegsNeeded=*/ 1, /*IsInt=*/ false); 3762 3763 assert(getContext().getTypeSize(Ty) <= 128 && 3764 "unexpectedly large scalar type"); 3765 3766 int RegsNeeded = getContext().getTypeSize(Ty) > 64 ? 2 : 1; 3767 3768 // If the type may need padding registers to ensure "alignment", we must be 3769 // careful when this is accounted for. Increasing the effective size covers 3770 // all cases. 3771 if (getContext().getTypeAlign(Ty) == 128) 3772 RegsNeeded += FreeIntRegs % 2 != 0; 3773 3774 return tryUseRegs(Ty, FreeIntRegs, RegsNeeded, /*IsInt=*/ true); 3775 } 3776 3777 if (CGCXXABI::RecordArgABI RAA = getRecordArgABI(Ty, CGT)) { 3778 if (FreeIntRegs > 0 && RAA == CGCXXABI::RAA_Indirect) 3779 --FreeIntRegs; 3780 return ABIArgInfo::getIndirect(0, RAA == CGCXXABI::RAA_DirectInMemory); 3781 } 3782 3783 if (isEmptyRecord(getContext(), Ty, true)) { 3784 if (!getContext().getLangOpts().CPlusPlus) { 3785 // Empty structs outside C++ mode are a GNU extension, so no ABI can 3786 // possibly tell us what to do. It turns out (I believe) that GCC ignores 3787 // the object for parameter-passsing purposes. 3788 return ABIArgInfo::getIgnore(); 3789 } 3790 3791 // The combination of C++98 9p5 (sizeof(struct) != 0) and the pseudocode 3792 // description of va_arg in the PCS require that an empty struct does 3793 // actually occupy space for parameter-passing. I'm hoping for a 3794 // clarification giving an explicit paragraph to point to in future. 3795 return tryUseRegs(Ty, FreeIntRegs, /*RegsNeeded=*/ 1, /*IsInt=*/ true, 3796 llvm::Type::getInt8Ty(getVMContext())); 3797 } 3798 3799 // Homogeneous vector aggregates get passed in registers or on the stack. 3800 const Type *Base = 0; 3801 uint64_t NumMembers = 0; 3802 if (isHomogeneousAggregate(Ty, Base, getContext(), &NumMembers)) { 3803 assert(Base && "Base class should be set for homogeneous aggregate"); 3804 // Homogeneous aggregates are passed and returned directly. 3805 return tryUseRegs(Ty, FreeVFPRegs, /*RegsNeeded=*/ NumMembers, 3806 /*IsInt=*/ false); 3807 } 3808 3809 uint64_t Size = getContext().getTypeSize(Ty); 3810 if (Size <= 128) { 3811 // Small structs can use the same direct type whether they're in registers 3812 // or on the stack. 3813 llvm::Type *BaseTy; 3814 unsigned NumBases; 3815 int SizeInRegs = (Size + 63) / 64; 3816 3817 if (getContext().getTypeAlign(Ty) == 128) { 3818 BaseTy = llvm::Type::getIntNTy(getVMContext(), 128); 3819 NumBases = 1; 3820 3821 // If the type may need padding registers to ensure "alignment", we must 3822 // be careful when this is accounted for. Increasing the effective size 3823 // covers all cases. 3824 SizeInRegs += FreeIntRegs % 2 != 0; 3825 } else { 3826 BaseTy = llvm::Type::getInt64Ty(getVMContext()); 3827 NumBases = SizeInRegs; 3828 } 3829 llvm::Type *DirectTy = llvm::ArrayType::get(BaseTy, NumBases); 3830 3831 return tryUseRegs(Ty, FreeIntRegs, /*RegsNeeded=*/ SizeInRegs, 3832 /*IsInt=*/ true, DirectTy); 3833 } 3834 3835 // If the aggregate is > 16 bytes, it's passed and returned indirectly. In 3836 // LLVM terms the return uses an "sret" pointer, but that's handled elsewhere. 3837 --FreeIntRegs; 3838 return ABIArgInfo::getIndirect(0, /* byVal = */ false); 3839} 3840 3841llvm::Value *AArch64ABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 3842 CodeGenFunction &CGF) const { 3843 // The AArch64 va_list type and handling is specified in the Procedure Call 3844 // Standard, section B.4: 3845 // 3846 // struct { 3847 // void *__stack; 3848 // void *__gr_top; 3849 // void *__vr_top; 3850 // int __gr_offs; 3851 // int __vr_offs; 3852 // }; 3853 3854 assert(!CGF.CGM.getDataLayout().isBigEndian() 3855 && "va_arg not implemented for big-endian AArch64"); 3856 3857 int FreeIntRegs = 8, FreeVFPRegs = 8; 3858 Ty = CGF.getContext().getCanonicalType(Ty); 3859 ABIArgInfo AI = classifyGenericType(Ty, FreeIntRegs, FreeVFPRegs); 3860 3861 llvm::BasicBlock *MaybeRegBlock = CGF.createBasicBlock("vaarg.maybe_reg"); 3862 llvm::BasicBlock *InRegBlock = CGF.createBasicBlock("vaarg.in_reg"); 3863 llvm::BasicBlock *OnStackBlock = CGF.createBasicBlock("vaarg.on_stack"); 3864 llvm::BasicBlock *ContBlock = CGF.createBasicBlock("vaarg.end"); 3865 3866 llvm::Value *reg_offs_p = 0, *reg_offs = 0; 3867 int reg_top_index; 3868 int RegSize; 3869 if (FreeIntRegs < 8) { 3870 assert(FreeVFPRegs == 8 && "Arguments never split between int & VFP regs"); 3871 // 3 is the field number of __gr_offs 3872 reg_offs_p = CGF.Builder.CreateStructGEP(VAListAddr, 3, "gr_offs_p"); 3873 reg_offs = CGF.Builder.CreateLoad(reg_offs_p, "gr_offs"); 3874 reg_top_index = 1; // field number for __gr_top 3875 RegSize = 8 * (8 - FreeIntRegs); 3876 } else { 3877 assert(FreeVFPRegs < 8 && "Argument must go in VFP or int regs"); 3878 // 4 is the field number of __vr_offs. 3879 reg_offs_p = CGF.Builder.CreateStructGEP(VAListAddr, 4, "vr_offs_p"); 3880 reg_offs = CGF.Builder.CreateLoad(reg_offs_p, "vr_offs"); 3881 reg_top_index = 2; // field number for __vr_top 3882 RegSize = 16 * (8 - FreeVFPRegs); 3883 } 3884 3885 //======================================= 3886 // Find out where argument was passed 3887 //======================================= 3888 3889 // If reg_offs >= 0 we're already using the stack for this type of 3890 // argument. We don't want to keep updating reg_offs (in case it overflows, 3891 // though anyone passing 2GB of arguments, each at most 16 bytes, deserves 3892 // whatever they get). 3893 llvm::Value *UsingStack = 0; 3894 UsingStack = CGF.Builder.CreateICmpSGE(reg_offs, 3895 llvm::ConstantInt::get(CGF.Int32Ty, 0)); 3896 3897 CGF.Builder.CreateCondBr(UsingStack, OnStackBlock, MaybeRegBlock); 3898 3899 // Otherwise, at least some kind of argument could go in these registers, the 3900 // quesiton is whether this particular type is too big. 3901 CGF.EmitBlock(MaybeRegBlock); 3902 3903 // Integer arguments may need to correct register alignment (for example a 3904 // "struct { __int128 a; };" gets passed in x_2N, x_{2N+1}). In this case we 3905 // align __gr_offs to calculate the potential address. 3906 if (FreeIntRegs < 8 && AI.isDirect() && getContext().getTypeAlign(Ty) > 64) { 3907 int Align = getContext().getTypeAlign(Ty) / 8; 3908 3909 reg_offs = CGF.Builder.CreateAdd(reg_offs, 3910 llvm::ConstantInt::get(CGF.Int32Ty, Align - 1), 3911 "align_regoffs"); 3912 reg_offs = CGF.Builder.CreateAnd(reg_offs, 3913 llvm::ConstantInt::get(CGF.Int32Ty, -Align), 3914 "aligned_regoffs"); 3915 } 3916 3917 // Update the gr_offs/vr_offs pointer for next call to va_arg on this va_list. 3918 llvm::Value *NewOffset = 0; 3919 NewOffset = CGF.Builder.CreateAdd(reg_offs, 3920 llvm::ConstantInt::get(CGF.Int32Ty, RegSize), 3921 "new_reg_offs"); 3922 CGF.Builder.CreateStore(NewOffset, reg_offs_p); 3923 3924 // Now we're in a position to decide whether this argument really was in 3925 // registers or not. 3926 llvm::Value *InRegs = 0; 3927 InRegs = CGF.Builder.CreateICmpSLE(NewOffset, 3928 llvm::ConstantInt::get(CGF.Int32Ty, 0), 3929 "inreg"); 3930 3931 CGF.Builder.CreateCondBr(InRegs, InRegBlock, OnStackBlock); 3932 3933 //======================================= 3934 // Argument was in registers 3935 //======================================= 3936 3937 // Now we emit the code for if the argument was originally passed in 3938 // registers. First start the appropriate block: 3939 CGF.EmitBlock(InRegBlock); 3940 3941 llvm::Value *reg_top_p = 0, *reg_top = 0; 3942 reg_top_p = CGF.Builder.CreateStructGEP(VAListAddr, reg_top_index, "reg_top_p"); 3943 reg_top = CGF.Builder.CreateLoad(reg_top_p, "reg_top"); 3944 llvm::Value *BaseAddr = CGF.Builder.CreateGEP(reg_top, reg_offs); 3945 llvm::Value *RegAddr = 0; 3946 llvm::Type *MemTy = llvm::PointerType::getUnqual(CGF.ConvertTypeForMem(Ty)); 3947 3948 if (!AI.isDirect()) { 3949 // If it's been passed indirectly (actually a struct), whatever we find from 3950 // stored registers or on the stack will actually be a struct **. 3951 MemTy = llvm::PointerType::getUnqual(MemTy); 3952 } 3953 3954 const Type *Base = 0; 3955 uint64_t NumMembers; 3956 if (isHomogeneousAggregate(Ty, Base, getContext(), &NumMembers) 3957 && NumMembers > 1) { 3958 // Homogeneous aggregates passed in registers will have their elements split 3959 // and stored 16-bytes apart regardless of size (they're notionally in qN, 3960 // qN+1, ...). We reload and store into a temporary local variable 3961 // contiguously. 3962 assert(AI.isDirect() && "Homogeneous aggregates should be passed directly"); 3963 llvm::Type *BaseTy = CGF.ConvertType(QualType(Base, 0)); 3964 llvm::Type *HFATy = llvm::ArrayType::get(BaseTy, NumMembers); 3965 llvm::Value *Tmp = CGF.CreateTempAlloca(HFATy); 3966 3967 for (unsigned i = 0; i < NumMembers; ++i) { 3968 llvm::Value *BaseOffset = llvm::ConstantInt::get(CGF.Int32Ty, 16 * i); 3969 llvm::Value *LoadAddr = CGF.Builder.CreateGEP(BaseAddr, BaseOffset); 3970 LoadAddr = CGF.Builder.CreateBitCast(LoadAddr, 3971 llvm::PointerType::getUnqual(BaseTy)); 3972 llvm::Value *StoreAddr = CGF.Builder.CreateStructGEP(Tmp, i); 3973 3974 llvm::Value *Elem = CGF.Builder.CreateLoad(LoadAddr); 3975 CGF.Builder.CreateStore(Elem, StoreAddr); 3976 } 3977 3978 RegAddr = CGF.Builder.CreateBitCast(Tmp, MemTy); 3979 } else { 3980 // Otherwise the object is contiguous in memory 3981 RegAddr = CGF.Builder.CreateBitCast(BaseAddr, MemTy); 3982 } 3983 3984 CGF.EmitBranch(ContBlock); 3985 3986 //======================================= 3987 // Argument was on the stack 3988 //======================================= 3989 CGF.EmitBlock(OnStackBlock); 3990 3991 llvm::Value *stack_p = 0, *OnStackAddr = 0; 3992 stack_p = CGF.Builder.CreateStructGEP(VAListAddr, 0, "stack_p"); 3993 OnStackAddr = CGF.Builder.CreateLoad(stack_p, "stack"); 3994 3995 // Again, stack arguments may need realigmnent. In this case both integer and 3996 // floating-point ones might be affected. 3997 if (AI.isDirect() && getContext().getTypeAlign(Ty) > 64) { 3998 int Align = getContext().getTypeAlign(Ty) / 8; 3999 4000 OnStackAddr = CGF.Builder.CreatePtrToInt(OnStackAddr, CGF.Int64Ty); 4001 4002 OnStackAddr = CGF.Builder.CreateAdd(OnStackAddr, 4003 llvm::ConstantInt::get(CGF.Int64Ty, Align - 1), 4004 "align_stack"); 4005 OnStackAddr = CGF.Builder.CreateAnd(OnStackAddr, 4006 llvm::ConstantInt::get(CGF.Int64Ty, -Align), 4007 "align_stack"); 4008 4009 OnStackAddr = CGF.Builder.CreateIntToPtr(OnStackAddr, CGF.Int8PtrTy); 4010 } 4011 4012 uint64_t StackSize; 4013 if (AI.isDirect()) 4014 StackSize = getContext().getTypeSize(Ty) / 8; 4015 else 4016 StackSize = 8; 4017 4018 // All stack slots are 8 bytes 4019 StackSize = llvm::RoundUpToAlignment(StackSize, 8); 4020 4021 llvm::Value *StackSizeC = llvm::ConstantInt::get(CGF.Int32Ty, StackSize); 4022 llvm::Value *NewStack = CGF.Builder.CreateGEP(OnStackAddr, StackSizeC, 4023 "new_stack"); 4024 4025 // Write the new value of __stack for the next call to va_arg 4026 CGF.Builder.CreateStore(NewStack, stack_p); 4027 4028 OnStackAddr = CGF.Builder.CreateBitCast(OnStackAddr, MemTy); 4029 4030 CGF.EmitBranch(ContBlock); 4031 4032 //======================================= 4033 // Tidy up 4034 //======================================= 4035 CGF.EmitBlock(ContBlock); 4036 4037 llvm::PHINode *ResAddr = CGF.Builder.CreatePHI(MemTy, 2, "vaarg.addr"); 4038 ResAddr->addIncoming(RegAddr, InRegBlock); 4039 ResAddr->addIncoming(OnStackAddr, OnStackBlock); 4040 4041 if (AI.isDirect()) 4042 return ResAddr; 4043 4044 return CGF.Builder.CreateLoad(ResAddr, "vaarg.addr"); 4045} 4046 4047//===----------------------------------------------------------------------===// 4048// NVPTX ABI Implementation 4049//===----------------------------------------------------------------------===// 4050 4051namespace { 4052 4053class NVPTXABIInfo : public ABIInfo { 4054public: 4055 NVPTXABIInfo(CodeGenTypes &CGT) : ABIInfo(CGT) {} 4056 4057 ABIArgInfo classifyReturnType(QualType RetTy) const; 4058 ABIArgInfo classifyArgumentType(QualType Ty) const; 4059 4060 virtual void computeInfo(CGFunctionInfo &FI) const; 4061 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 4062 CodeGenFunction &CFG) const; 4063}; 4064 4065class NVPTXTargetCodeGenInfo : public TargetCodeGenInfo { 4066public: 4067 NVPTXTargetCodeGenInfo(CodeGenTypes &CGT) 4068 : TargetCodeGenInfo(new NVPTXABIInfo(CGT)) {} 4069 4070 virtual void SetTargetAttributes(const Decl *D, llvm::GlobalValue *GV, 4071 CodeGen::CodeGenModule &M) const; 4072private: 4073 static void addKernelMetadata(llvm::Function *F); 4074}; 4075 4076ABIArgInfo NVPTXABIInfo::classifyReturnType(QualType RetTy) const { 4077 if (RetTy->isVoidType()) 4078 return ABIArgInfo::getIgnore(); 4079 if (isAggregateTypeForABI(RetTy)) 4080 return ABIArgInfo::getIndirect(0); 4081 return ABIArgInfo::getDirect(); 4082} 4083 4084ABIArgInfo NVPTXABIInfo::classifyArgumentType(QualType Ty) const { 4085 if (isAggregateTypeForABI(Ty)) 4086 return ABIArgInfo::getIndirect(0); 4087 4088 return ABIArgInfo::getDirect(); 4089} 4090 4091void NVPTXABIInfo::computeInfo(CGFunctionInfo &FI) const { 4092 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 4093 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 4094 it != ie; ++it) 4095 it->info = classifyArgumentType(it->type); 4096 4097 // Always honor user-specified calling convention. 4098 if (FI.getCallingConvention() != llvm::CallingConv::C) 4099 return; 4100 4101 FI.setEffectiveCallingConvention(getRuntimeCC()); 4102} 4103 4104llvm::Value *NVPTXABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 4105 CodeGenFunction &CFG) const { 4106 llvm_unreachable("NVPTX does not support varargs"); 4107} 4108 4109void NVPTXTargetCodeGenInfo:: 4110SetTargetAttributes(const Decl *D, llvm::GlobalValue *GV, 4111 CodeGen::CodeGenModule &M) const{ 4112 const FunctionDecl *FD = dyn_cast<FunctionDecl>(D); 4113 if (!FD) return; 4114 4115 llvm::Function *F = cast<llvm::Function>(GV); 4116 4117 // Perform special handling in OpenCL mode 4118 if (M.getLangOpts().OpenCL) { 4119 // Use OpenCL function attributes to check for kernel functions 4120 // By default, all functions are device functions 4121 if (FD->hasAttr<OpenCLKernelAttr>()) { 4122 // OpenCL __kernel functions get kernel metadata 4123 addKernelMetadata(F); 4124 // And kernel functions are not subject to inlining 4125 F->addFnAttr(llvm::Attribute::NoInline); 4126 } 4127 } 4128 4129 // Perform special handling in CUDA mode. 4130 if (M.getLangOpts().CUDA) { 4131 // CUDA __global__ functions get a kernel metadata entry. Since 4132 // __global__ functions cannot be called from the device, we do not 4133 // need to set the noinline attribute. 4134 if (FD->getAttr<CUDAGlobalAttr>()) 4135 addKernelMetadata(F); 4136 } 4137} 4138 4139void NVPTXTargetCodeGenInfo::addKernelMetadata(llvm::Function *F) { 4140 llvm::Module *M = F->getParent(); 4141 llvm::LLVMContext &Ctx = M->getContext(); 4142 4143 // Get "nvvm.annotations" metadata node 4144 llvm::NamedMDNode *MD = M->getOrInsertNamedMetadata("nvvm.annotations"); 4145 4146 // Create !{<func-ref>, metadata !"kernel", i32 1} node 4147 llvm::SmallVector<llvm::Value *, 3> MDVals; 4148 MDVals.push_back(F); 4149 MDVals.push_back(llvm::MDString::get(Ctx, "kernel")); 4150 MDVals.push_back(llvm::ConstantInt::get(llvm::Type::getInt32Ty(Ctx), 1)); 4151 4152 // Append metadata to nvvm.annotations 4153 MD->addOperand(llvm::MDNode::get(Ctx, MDVals)); 4154} 4155 4156} 4157 4158//===----------------------------------------------------------------------===// 4159// SystemZ ABI Implementation 4160//===----------------------------------------------------------------------===// 4161 4162namespace { 4163 4164class SystemZABIInfo : public ABIInfo { 4165public: 4166 SystemZABIInfo(CodeGenTypes &CGT) : ABIInfo(CGT) {} 4167 4168 bool isPromotableIntegerType(QualType Ty) const; 4169 bool isCompoundType(QualType Ty) const; 4170 bool isFPArgumentType(QualType Ty) const; 4171 4172 ABIArgInfo classifyReturnType(QualType RetTy) const; 4173 ABIArgInfo classifyArgumentType(QualType ArgTy) const; 4174 4175 virtual void computeInfo(CGFunctionInfo &FI) const { 4176 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 4177 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 4178 it != ie; ++it) 4179 it->info = classifyArgumentType(it->type); 4180 } 4181 4182 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 4183 CodeGenFunction &CGF) const; 4184}; 4185 4186class SystemZTargetCodeGenInfo : public TargetCodeGenInfo { 4187public: 4188 SystemZTargetCodeGenInfo(CodeGenTypes &CGT) 4189 : TargetCodeGenInfo(new SystemZABIInfo(CGT)) {} 4190}; 4191 4192} 4193 4194bool SystemZABIInfo::isPromotableIntegerType(QualType Ty) const { 4195 // Treat an enum type as its underlying type. 4196 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 4197 Ty = EnumTy->getDecl()->getIntegerType(); 4198 4199 // Promotable integer types are required to be promoted by the ABI. 4200 if (Ty->isPromotableIntegerType()) 4201 return true; 4202 4203 // 32-bit values must also be promoted. 4204 if (const BuiltinType *BT = Ty->getAs<BuiltinType>()) 4205 switch (BT->getKind()) { 4206 case BuiltinType::Int: 4207 case BuiltinType::UInt: 4208 return true; 4209 default: 4210 return false; 4211 } 4212 return false; 4213} 4214 4215bool SystemZABIInfo::isCompoundType(QualType Ty) const { 4216 return Ty->isAnyComplexType() || isAggregateTypeForABI(Ty); 4217} 4218 4219bool SystemZABIInfo::isFPArgumentType(QualType Ty) const { 4220 if (const BuiltinType *BT = Ty->getAs<BuiltinType>()) 4221 switch (BT->getKind()) { 4222 case BuiltinType::Float: 4223 case BuiltinType::Double: 4224 return true; 4225 default: 4226 return false; 4227 } 4228 4229 if (const RecordType *RT = Ty->getAsStructureType()) { 4230 const RecordDecl *RD = RT->getDecl(); 4231 bool Found = false; 4232 4233 // If this is a C++ record, check the bases first. 4234 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) 4235 for (CXXRecordDecl::base_class_const_iterator I = CXXRD->bases_begin(), 4236 E = CXXRD->bases_end(); I != E; ++I) { 4237 QualType Base = I->getType(); 4238 4239 // Empty bases don't affect things either way. 4240 if (isEmptyRecord(getContext(), Base, true)) 4241 continue; 4242 4243 if (Found) 4244 return false; 4245 Found = isFPArgumentType(Base); 4246 if (!Found) 4247 return false; 4248 } 4249 4250 // Check the fields. 4251 for (RecordDecl::field_iterator I = RD->field_begin(), 4252 E = RD->field_end(); I != E; ++I) { 4253 const FieldDecl *FD = *I; 4254 4255 // Empty bitfields don't affect things either way. 4256 // Unlike isSingleElementStruct(), empty structure and array fields 4257 // do count. So do anonymous bitfields that aren't zero-sized. 4258 if (FD->isBitField() && FD->getBitWidthValue(getContext()) == 0) 4259 return true; 4260 4261 // Unlike isSingleElementStruct(), arrays do not count. 4262 // Nested isFPArgumentType structures still do though. 4263 if (Found) 4264 return false; 4265 Found = isFPArgumentType(FD->getType()); 4266 if (!Found) 4267 return false; 4268 } 4269 4270 // Unlike isSingleElementStruct(), trailing padding is allowed. 4271 // An 8-byte aligned struct s { float f; } is passed as a double. 4272 return Found; 4273 } 4274 4275 return false; 4276} 4277 4278llvm::Value *SystemZABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 4279 CodeGenFunction &CGF) const { 4280 // Assume that va_list type is correct; should be pointer to LLVM type: 4281 // struct { 4282 // i64 __gpr; 4283 // i64 __fpr; 4284 // i8 *__overflow_arg_area; 4285 // i8 *__reg_save_area; 4286 // }; 4287 4288 // Every argument occupies 8 bytes and is passed by preference in either 4289 // GPRs or FPRs. 4290 Ty = CGF.getContext().getCanonicalType(Ty); 4291 ABIArgInfo AI = classifyArgumentType(Ty); 4292 bool InFPRs = isFPArgumentType(Ty); 4293 4294 llvm::Type *APTy = llvm::PointerType::getUnqual(CGF.ConvertTypeForMem(Ty)); 4295 bool IsIndirect = AI.isIndirect(); 4296 unsigned UnpaddedBitSize; 4297 if (IsIndirect) { 4298 APTy = llvm::PointerType::getUnqual(APTy); 4299 UnpaddedBitSize = 64; 4300 } else 4301 UnpaddedBitSize = getContext().getTypeSize(Ty); 4302 unsigned PaddedBitSize = 64; 4303 assert((UnpaddedBitSize <= PaddedBitSize) && "Invalid argument size."); 4304 4305 unsigned PaddedSize = PaddedBitSize / 8; 4306 unsigned Padding = (PaddedBitSize - UnpaddedBitSize) / 8; 4307 4308 unsigned MaxRegs, RegCountField, RegSaveIndex, RegPadding; 4309 if (InFPRs) { 4310 MaxRegs = 4; // Maximum of 4 FPR arguments 4311 RegCountField = 1; // __fpr 4312 RegSaveIndex = 16; // save offset for f0 4313 RegPadding = 0; // floats are passed in the high bits of an FPR 4314 } else { 4315 MaxRegs = 5; // Maximum of 5 GPR arguments 4316 RegCountField = 0; // __gpr 4317 RegSaveIndex = 2; // save offset for r2 4318 RegPadding = Padding; // values are passed in the low bits of a GPR 4319 } 4320 4321 llvm::Value *RegCountPtr = 4322 CGF.Builder.CreateStructGEP(VAListAddr, RegCountField, "reg_count_ptr"); 4323 llvm::Value *RegCount = CGF.Builder.CreateLoad(RegCountPtr, "reg_count"); 4324 llvm::Type *IndexTy = RegCount->getType(); 4325 llvm::Value *MaxRegsV = llvm::ConstantInt::get(IndexTy, MaxRegs); 4326 llvm::Value *InRegs = CGF.Builder.CreateICmpULT(RegCount, MaxRegsV, 4327 "fits_in_regs"); 4328 4329 llvm::BasicBlock *InRegBlock = CGF.createBasicBlock("vaarg.in_reg"); 4330 llvm::BasicBlock *InMemBlock = CGF.createBasicBlock("vaarg.in_mem"); 4331 llvm::BasicBlock *ContBlock = CGF.createBasicBlock("vaarg.end"); 4332 CGF.Builder.CreateCondBr(InRegs, InRegBlock, InMemBlock); 4333 4334 // Emit code to load the value if it was passed in registers. 4335 CGF.EmitBlock(InRegBlock); 4336 4337 // Work out the address of an argument register. 4338 llvm::Value *PaddedSizeV = llvm::ConstantInt::get(IndexTy, PaddedSize); 4339 llvm::Value *ScaledRegCount = 4340 CGF.Builder.CreateMul(RegCount, PaddedSizeV, "scaled_reg_count"); 4341 llvm::Value *RegBase = 4342 llvm::ConstantInt::get(IndexTy, RegSaveIndex * PaddedSize + RegPadding); 4343 llvm::Value *RegOffset = 4344 CGF.Builder.CreateAdd(ScaledRegCount, RegBase, "reg_offset"); 4345 llvm::Value *RegSaveAreaPtr = 4346 CGF.Builder.CreateStructGEP(VAListAddr, 3, "reg_save_area_ptr"); 4347 llvm::Value *RegSaveArea = 4348 CGF.Builder.CreateLoad(RegSaveAreaPtr, "reg_save_area"); 4349 llvm::Value *RawRegAddr = 4350 CGF.Builder.CreateGEP(RegSaveArea, RegOffset, "raw_reg_addr"); 4351 llvm::Value *RegAddr = 4352 CGF.Builder.CreateBitCast(RawRegAddr, APTy, "reg_addr"); 4353 4354 // Update the register count 4355 llvm::Value *One = llvm::ConstantInt::get(IndexTy, 1); 4356 llvm::Value *NewRegCount = 4357 CGF.Builder.CreateAdd(RegCount, One, "reg_count"); 4358 CGF.Builder.CreateStore(NewRegCount, RegCountPtr); 4359 CGF.EmitBranch(ContBlock); 4360 4361 // Emit code to load the value if it was passed in memory. 4362 CGF.EmitBlock(InMemBlock); 4363 4364 // Work out the address of a stack argument. 4365 llvm::Value *OverflowArgAreaPtr = 4366 CGF.Builder.CreateStructGEP(VAListAddr, 2, "overflow_arg_area_ptr"); 4367 llvm::Value *OverflowArgArea = 4368 CGF.Builder.CreateLoad(OverflowArgAreaPtr, "overflow_arg_area"); 4369 llvm::Value *PaddingV = llvm::ConstantInt::get(IndexTy, Padding); 4370 llvm::Value *RawMemAddr = 4371 CGF.Builder.CreateGEP(OverflowArgArea, PaddingV, "raw_mem_addr"); 4372 llvm::Value *MemAddr = 4373 CGF.Builder.CreateBitCast(RawMemAddr, APTy, "mem_addr"); 4374 4375 // Update overflow_arg_area_ptr pointer 4376 llvm::Value *NewOverflowArgArea = 4377 CGF.Builder.CreateGEP(OverflowArgArea, PaddedSizeV, "overflow_arg_area"); 4378 CGF.Builder.CreateStore(NewOverflowArgArea, OverflowArgAreaPtr); 4379 CGF.EmitBranch(ContBlock); 4380 4381 // Return the appropriate result. 4382 CGF.EmitBlock(ContBlock); 4383 llvm::PHINode *ResAddr = CGF.Builder.CreatePHI(APTy, 2, "va_arg.addr"); 4384 ResAddr->addIncoming(RegAddr, InRegBlock); 4385 ResAddr->addIncoming(MemAddr, InMemBlock); 4386 4387 if (IsIndirect) 4388 return CGF.Builder.CreateLoad(ResAddr, "indirect_arg"); 4389 4390 return ResAddr; 4391} 4392 4393 4394ABIArgInfo SystemZABIInfo::classifyReturnType(QualType RetTy) const { 4395 if (RetTy->isVoidType()) 4396 return ABIArgInfo::getIgnore(); 4397 if (isCompoundType(RetTy) || getContext().getTypeSize(RetTy) > 64) 4398 return ABIArgInfo::getIndirect(0); 4399 return (isPromotableIntegerType(RetTy) ? 4400 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 4401} 4402 4403ABIArgInfo SystemZABIInfo::classifyArgumentType(QualType Ty) const { 4404 // Handle the generic C++ ABI. 4405 if (CGCXXABI::RecordArgABI RAA = getRecordArgABI(Ty, CGT)) 4406 return ABIArgInfo::getIndirect(0, RAA == CGCXXABI::RAA_DirectInMemory); 4407 4408 // Integers and enums are extended to full register width. 4409 if (isPromotableIntegerType(Ty)) 4410 return ABIArgInfo::getExtend(); 4411 4412 // Values that are not 1, 2, 4 or 8 bytes in size are passed indirectly. 4413 uint64_t Size = getContext().getTypeSize(Ty); 4414 if (Size != 8 && Size != 16 && Size != 32 && Size != 64) 4415 return ABIArgInfo::getIndirect(0); 4416 4417 // Handle small structures. 4418 if (const RecordType *RT = Ty->getAs<RecordType>()) { 4419 // Structures with flexible arrays have variable length, so really 4420 // fail the size test above. 4421 const RecordDecl *RD = RT->getDecl(); 4422 if (RD->hasFlexibleArrayMember()) 4423 return ABIArgInfo::getIndirect(0); 4424 4425 // The structure is passed as an unextended integer, a float, or a double. 4426 llvm::Type *PassTy; 4427 if (isFPArgumentType(Ty)) { 4428 assert(Size == 32 || Size == 64); 4429 if (Size == 32) 4430 PassTy = llvm::Type::getFloatTy(getVMContext()); 4431 else 4432 PassTy = llvm::Type::getDoubleTy(getVMContext()); 4433 } else 4434 PassTy = llvm::IntegerType::get(getVMContext(), Size); 4435 return ABIArgInfo::getDirect(PassTy); 4436 } 4437 4438 // Non-structure compounds are passed indirectly. 4439 if (isCompoundType(Ty)) 4440 return ABIArgInfo::getIndirect(0); 4441 4442 return ABIArgInfo::getDirect(0); 4443} 4444 4445//===----------------------------------------------------------------------===// 4446// MBlaze ABI Implementation 4447//===----------------------------------------------------------------------===// 4448 4449namespace { 4450 4451class MBlazeABIInfo : public ABIInfo { 4452public: 4453 MBlazeABIInfo(CodeGenTypes &CGT) : ABIInfo(CGT) {} 4454 4455 bool isPromotableIntegerType(QualType Ty) const; 4456 4457 ABIArgInfo classifyReturnType(QualType RetTy) const; 4458 ABIArgInfo classifyArgumentType(QualType RetTy) const; 4459 4460 virtual void computeInfo(CGFunctionInfo &FI) const { 4461 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 4462 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 4463 it != ie; ++it) 4464 it->info = classifyArgumentType(it->type); 4465 } 4466 4467 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 4468 CodeGenFunction &CGF) const; 4469}; 4470 4471class MBlazeTargetCodeGenInfo : public TargetCodeGenInfo { 4472public: 4473 MBlazeTargetCodeGenInfo(CodeGenTypes &CGT) 4474 : TargetCodeGenInfo(new MBlazeABIInfo(CGT)) {} 4475 void SetTargetAttributes(const Decl *D, llvm::GlobalValue *GV, 4476 CodeGen::CodeGenModule &M) const; 4477}; 4478 4479} 4480 4481bool MBlazeABIInfo::isPromotableIntegerType(QualType Ty) const { 4482 // MBlaze ABI requires all 8 and 16 bit quantities to be extended. 4483 if (const BuiltinType *BT = Ty->getAs<BuiltinType>()) 4484 switch (BT->getKind()) { 4485 case BuiltinType::Bool: 4486 case BuiltinType::Char_S: 4487 case BuiltinType::Char_U: 4488 case BuiltinType::SChar: 4489 case BuiltinType::UChar: 4490 case BuiltinType::Short: 4491 case BuiltinType::UShort: 4492 return true; 4493 default: 4494 return false; 4495 } 4496 return false; 4497} 4498 4499llvm::Value *MBlazeABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 4500 CodeGenFunction &CGF) const { 4501 // FIXME: Implement 4502 return 0; 4503} 4504 4505 4506ABIArgInfo MBlazeABIInfo::classifyReturnType(QualType RetTy) const { 4507 if (RetTy->isVoidType()) 4508 return ABIArgInfo::getIgnore(); 4509 if (isAggregateTypeForABI(RetTy)) 4510 return ABIArgInfo::getIndirect(0); 4511 4512 return (isPromotableIntegerType(RetTy) ? 4513 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 4514} 4515 4516ABIArgInfo MBlazeABIInfo::classifyArgumentType(QualType Ty) const { 4517 if (isAggregateTypeForABI(Ty)) 4518 return ABIArgInfo::getIndirect(0); 4519 4520 return (isPromotableIntegerType(Ty) ? 4521 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 4522} 4523 4524void MBlazeTargetCodeGenInfo::SetTargetAttributes(const Decl *D, 4525 llvm::GlobalValue *GV, 4526 CodeGen::CodeGenModule &M) 4527 const { 4528 const FunctionDecl *FD = dyn_cast<FunctionDecl>(D); 4529 if (!FD) return; 4530 4531 llvm::CallingConv::ID CC = llvm::CallingConv::C; 4532 if (FD->hasAttr<MBlazeInterruptHandlerAttr>()) 4533 CC = llvm::CallingConv::MBLAZE_INTR; 4534 else if (FD->hasAttr<MBlazeSaveVolatilesAttr>()) 4535 CC = llvm::CallingConv::MBLAZE_SVOL; 4536 4537 if (CC != llvm::CallingConv::C) { 4538 // Handle 'interrupt_handler' attribute: 4539 llvm::Function *F = cast<llvm::Function>(GV); 4540 4541 // Step 1: Set ISR calling convention. 4542 F->setCallingConv(CC); 4543 4544 // Step 2: Add attributes goodness. 4545 F->addFnAttr(llvm::Attribute::NoInline); 4546 } 4547 4548 // Step 3: Emit _interrupt_handler alias. 4549 if (CC == llvm::CallingConv::MBLAZE_INTR) 4550 new llvm::GlobalAlias(GV->getType(), llvm::Function::ExternalLinkage, 4551 "_interrupt_handler", GV, &M.getModule()); 4552} 4553 4554 4555//===----------------------------------------------------------------------===// 4556// MSP430 ABI Implementation 4557//===----------------------------------------------------------------------===// 4558 4559namespace { 4560 4561class MSP430TargetCodeGenInfo : public TargetCodeGenInfo { 4562public: 4563 MSP430TargetCodeGenInfo(CodeGenTypes &CGT) 4564 : TargetCodeGenInfo(new DefaultABIInfo(CGT)) {} 4565 void SetTargetAttributes(const Decl *D, llvm::GlobalValue *GV, 4566 CodeGen::CodeGenModule &M) const; 4567}; 4568 4569} 4570 4571void MSP430TargetCodeGenInfo::SetTargetAttributes(const Decl *D, 4572 llvm::GlobalValue *GV, 4573 CodeGen::CodeGenModule &M) const { 4574 if (const FunctionDecl *FD = dyn_cast<FunctionDecl>(D)) { 4575 if (const MSP430InterruptAttr *attr = FD->getAttr<MSP430InterruptAttr>()) { 4576 // Handle 'interrupt' attribute: 4577 llvm::Function *F = cast<llvm::Function>(GV); 4578 4579 // Step 1: Set ISR calling convention. 4580 F->setCallingConv(llvm::CallingConv::MSP430_INTR); 4581 4582 // Step 2: Add attributes goodness. 4583 F->addFnAttr(llvm::Attribute::NoInline); 4584 4585 // Step 3: Emit ISR vector alias. 4586 unsigned Num = attr->getNumber() / 2; 4587 new llvm::GlobalAlias(GV->getType(), llvm::Function::ExternalLinkage, 4588 "__isr_" + Twine(Num), 4589 GV, &M.getModule()); 4590 } 4591 } 4592} 4593 4594//===----------------------------------------------------------------------===// 4595// MIPS ABI Implementation. This works for both little-endian and 4596// big-endian variants. 4597//===----------------------------------------------------------------------===// 4598 4599namespace { 4600class MipsABIInfo : public ABIInfo { 4601 bool IsO32; 4602 unsigned MinABIStackAlignInBytes, StackAlignInBytes; 4603 void CoerceToIntArgs(uint64_t TySize, 4604 SmallVector<llvm::Type*, 8> &ArgList) const; 4605 llvm::Type* HandleAggregates(QualType Ty, uint64_t TySize) const; 4606 llvm::Type* returnAggregateInRegs(QualType RetTy, uint64_t Size) const; 4607 llvm::Type* getPaddingType(uint64_t Align, uint64_t Offset) const; 4608public: 4609 MipsABIInfo(CodeGenTypes &CGT, bool _IsO32) : 4610 ABIInfo(CGT), IsO32(_IsO32), MinABIStackAlignInBytes(IsO32 ? 4 : 8), 4611 StackAlignInBytes(IsO32 ? 8 : 16) {} 4612 4613 ABIArgInfo classifyReturnType(QualType RetTy) const; 4614 ABIArgInfo classifyArgumentType(QualType RetTy, uint64_t &Offset) const; 4615 virtual void computeInfo(CGFunctionInfo &FI) const; 4616 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 4617 CodeGenFunction &CGF) const; 4618}; 4619 4620class MIPSTargetCodeGenInfo : public TargetCodeGenInfo { 4621 unsigned SizeOfUnwindException; 4622public: 4623 MIPSTargetCodeGenInfo(CodeGenTypes &CGT, bool IsO32) 4624 : TargetCodeGenInfo(new MipsABIInfo(CGT, IsO32)), 4625 SizeOfUnwindException(IsO32 ? 24 : 32) {} 4626 4627 int getDwarfEHStackPointer(CodeGen::CodeGenModule &CGM) const { 4628 return 29; 4629 } 4630 4631 void SetTargetAttributes(const Decl *D, llvm::GlobalValue *GV, 4632 CodeGen::CodeGenModule &CGM) const { 4633 const FunctionDecl *FD = dyn_cast<FunctionDecl>(D); 4634 if (!FD) return; 4635 llvm::Function *Fn = cast<llvm::Function>(GV); 4636 if (FD->hasAttr<Mips16Attr>()) { 4637 Fn->addFnAttr("mips16"); 4638 } 4639 else if (FD->hasAttr<NoMips16Attr>()) { 4640 Fn->addFnAttr("nomips16"); 4641 } 4642 } 4643 4644 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 4645 llvm::Value *Address) const; 4646 4647 unsigned getSizeOfUnwindException() const { 4648 return SizeOfUnwindException; 4649 } 4650}; 4651} 4652 4653void MipsABIInfo::CoerceToIntArgs(uint64_t TySize, 4654 SmallVector<llvm::Type*, 8> &ArgList) const { 4655 llvm::IntegerType *IntTy = 4656 llvm::IntegerType::get(getVMContext(), MinABIStackAlignInBytes * 8); 4657 4658 // Add (TySize / MinABIStackAlignInBytes) args of IntTy. 4659 for (unsigned N = TySize / (MinABIStackAlignInBytes * 8); N; --N) 4660 ArgList.push_back(IntTy); 4661 4662 // If necessary, add one more integer type to ArgList. 4663 unsigned R = TySize % (MinABIStackAlignInBytes * 8); 4664 4665 if (R) 4666 ArgList.push_back(llvm::IntegerType::get(getVMContext(), R)); 4667} 4668 4669// In N32/64, an aligned double precision floating point field is passed in 4670// a register. 4671llvm::Type* MipsABIInfo::HandleAggregates(QualType Ty, uint64_t TySize) const { 4672 SmallVector<llvm::Type*, 8> ArgList, IntArgList; 4673 4674 if (IsO32) { 4675 CoerceToIntArgs(TySize, ArgList); 4676 return llvm::StructType::get(getVMContext(), ArgList); 4677 } 4678 4679 if (Ty->isComplexType()) 4680 return CGT.ConvertType(Ty); 4681 4682 const RecordType *RT = Ty->getAs<RecordType>(); 4683 4684 // Unions/vectors are passed in integer registers. 4685 if (!RT || !RT->isStructureOrClassType()) { 4686 CoerceToIntArgs(TySize, ArgList); 4687 return llvm::StructType::get(getVMContext(), ArgList); 4688 } 4689 4690 const RecordDecl *RD = RT->getDecl(); 4691 const ASTRecordLayout &Layout = getContext().getASTRecordLayout(RD); 4692 assert(!(TySize % 8) && "Size of structure must be multiple of 8."); 4693 4694 uint64_t LastOffset = 0; 4695 unsigned idx = 0; 4696 llvm::IntegerType *I64 = llvm::IntegerType::get(getVMContext(), 64); 4697 4698 // Iterate over fields in the struct/class and check if there are any aligned 4699 // double fields. 4700 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 4701 i != e; ++i, ++idx) { 4702 const QualType Ty = i->getType(); 4703 const BuiltinType *BT = Ty->getAs<BuiltinType>(); 4704 4705 if (!BT || BT->getKind() != BuiltinType::Double) 4706 continue; 4707 4708 uint64_t Offset = Layout.getFieldOffset(idx); 4709 if (Offset % 64) // Ignore doubles that are not aligned. 4710 continue; 4711 4712 // Add ((Offset - LastOffset) / 64) args of type i64. 4713 for (unsigned j = (Offset - LastOffset) / 64; j > 0; --j) 4714 ArgList.push_back(I64); 4715 4716 // Add double type. 4717 ArgList.push_back(llvm::Type::getDoubleTy(getVMContext())); 4718 LastOffset = Offset + 64; 4719 } 4720 4721 CoerceToIntArgs(TySize - LastOffset, IntArgList); 4722 ArgList.append(IntArgList.begin(), IntArgList.end()); 4723 4724 return llvm::StructType::get(getVMContext(), ArgList); 4725} 4726 4727llvm::Type *MipsABIInfo::getPaddingType(uint64_t Align, uint64_t Offset) const { 4728 assert((Offset % MinABIStackAlignInBytes) == 0); 4729 4730 if ((Align - 1) & Offset) 4731 return llvm::IntegerType::get(getVMContext(), MinABIStackAlignInBytes * 8); 4732 4733 return 0; 4734} 4735 4736ABIArgInfo 4737MipsABIInfo::classifyArgumentType(QualType Ty, uint64_t &Offset) const { 4738 uint64_t OrigOffset = Offset; 4739 uint64_t TySize = getContext().getTypeSize(Ty); 4740 uint64_t Align = getContext().getTypeAlign(Ty) / 8; 4741 4742 Align = std::min(std::max(Align, (uint64_t)MinABIStackAlignInBytes), 4743 (uint64_t)StackAlignInBytes); 4744 Offset = llvm::RoundUpToAlignment(Offset, Align); 4745 Offset += llvm::RoundUpToAlignment(TySize, Align * 8) / 8; 4746 4747 if (isAggregateTypeForABI(Ty) || Ty->isVectorType()) { 4748 // Ignore empty aggregates. 4749 if (TySize == 0) 4750 return ABIArgInfo::getIgnore(); 4751 4752 if (CGCXXABI::RecordArgABI RAA = getRecordArgABI(Ty, CGT)) { 4753 Offset = OrigOffset + MinABIStackAlignInBytes; 4754 return ABIArgInfo::getIndirect(0, RAA == CGCXXABI::RAA_DirectInMemory); 4755 } 4756 4757 // If we have reached here, aggregates are passed directly by coercing to 4758 // another structure type. Padding is inserted if the offset of the 4759 // aggregate is unaligned. 4760 return ABIArgInfo::getDirect(HandleAggregates(Ty, TySize), 0, 4761 getPaddingType(Align, OrigOffset)); 4762 } 4763 4764 // Treat an enum type as its underlying type. 4765 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 4766 Ty = EnumTy->getDecl()->getIntegerType(); 4767 4768 if (Ty->isPromotableIntegerType()) 4769 return ABIArgInfo::getExtend(); 4770 4771 return ABIArgInfo::getDirect(0, 0, 4772 IsO32 ? 0 : getPaddingType(Align, OrigOffset)); 4773} 4774 4775llvm::Type* 4776MipsABIInfo::returnAggregateInRegs(QualType RetTy, uint64_t Size) const { 4777 const RecordType *RT = RetTy->getAs<RecordType>(); 4778 SmallVector<llvm::Type*, 8> RTList; 4779 4780 if (RT && RT->isStructureOrClassType()) { 4781 const RecordDecl *RD = RT->getDecl(); 4782 const ASTRecordLayout &Layout = getContext().getASTRecordLayout(RD); 4783 unsigned FieldCnt = Layout.getFieldCount(); 4784 4785 // N32/64 returns struct/classes in floating point registers if the 4786 // following conditions are met: 4787 // 1. The size of the struct/class is no larger than 128-bit. 4788 // 2. The struct/class has one or two fields all of which are floating 4789 // point types. 4790 // 3. The offset of the first field is zero (this follows what gcc does). 4791 // 4792 // Any other composite results are returned in integer registers. 4793 // 4794 if (FieldCnt && (FieldCnt <= 2) && !Layout.getFieldOffset(0)) { 4795 RecordDecl::field_iterator b = RD->field_begin(), e = RD->field_end(); 4796 for (; b != e; ++b) { 4797 const BuiltinType *BT = b->getType()->getAs<BuiltinType>(); 4798 4799 if (!BT || !BT->isFloatingPoint()) 4800 break; 4801 4802 RTList.push_back(CGT.ConvertType(b->getType())); 4803 } 4804 4805 if (b == e) 4806 return llvm::StructType::get(getVMContext(), RTList, 4807 RD->hasAttr<PackedAttr>()); 4808 4809 RTList.clear(); 4810 } 4811 } 4812 4813 CoerceToIntArgs(Size, RTList); 4814 return llvm::StructType::get(getVMContext(), RTList); 4815} 4816 4817ABIArgInfo MipsABIInfo::classifyReturnType(QualType RetTy) const { 4818 uint64_t Size = getContext().getTypeSize(RetTy); 4819 4820 if (RetTy->isVoidType() || Size == 0) 4821 return ABIArgInfo::getIgnore(); 4822 4823 if (isAggregateTypeForABI(RetTy) || RetTy->isVectorType()) { 4824 if (isRecordReturnIndirect(RetTy, CGT)) 4825 return ABIArgInfo::getIndirect(0); 4826 4827 if (Size <= 128) { 4828 if (RetTy->isAnyComplexType()) 4829 return ABIArgInfo::getDirect(); 4830 4831 // O32 returns integer vectors in registers. 4832 if (IsO32 && RetTy->isVectorType() && !RetTy->hasFloatingRepresentation()) 4833 return ABIArgInfo::getDirect(returnAggregateInRegs(RetTy, Size)); 4834 4835 if (!IsO32) 4836 return ABIArgInfo::getDirect(returnAggregateInRegs(RetTy, Size)); 4837 } 4838 4839 return ABIArgInfo::getIndirect(0); 4840 } 4841 4842 // Treat an enum type as its underlying type. 4843 if (const EnumType *EnumTy = RetTy->getAs<EnumType>()) 4844 RetTy = EnumTy->getDecl()->getIntegerType(); 4845 4846 return (RetTy->isPromotableIntegerType() ? 4847 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 4848} 4849 4850void MipsABIInfo::computeInfo(CGFunctionInfo &FI) const { 4851 ABIArgInfo &RetInfo = FI.getReturnInfo(); 4852 RetInfo = classifyReturnType(FI.getReturnType()); 4853 4854 // Check if a pointer to an aggregate is passed as a hidden argument. 4855 uint64_t Offset = RetInfo.isIndirect() ? MinABIStackAlignInBytes : 0; 4856 4857 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 4858 it != ie; ++it) 4859 it->info = classifyArgumentType(it->type, Offset); 4860} 4861 4862llvm::Value* MipsABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 4863 CodeGenFunction &CGF) const { 4864 llvm::Type *BP = CGF.Int8PtrTy; 4865 llvm::Type *BPP = CGF.Int8PtrPtrTy; 4866 4867 CGBuilderTy &Builder = CGF.Builder; 4868 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP, "ap"); 4869 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur"); 4870 int64_t TypeAlign = getContext().getTypeAlign(Ty) / 8; 4871 llvm::Type *PTy = llvm::PointerType::getUnqual(CGF.ConvertType(Ty)); 4872 llvm::Value *AddrTyped; 4873 unsigned PtrWidth = getTarget().getPointerWidth(0); 4874 llvm::IntegerType *IntTy = (PtrWidth == 32) ? CGF.Int32Ty : CGF.Int64Ty; 4875 4876 if (TypeAlign > MinABIStackAlignInBytes) { 4877 llvm::Value *AddrAsInt = CGF.Builder.CreatePtrToInt(Addr, IntTy); 4878 llvm::Value *Inc = llvm::ConstantInt::get(IntTy, TypeAlign - 1); 4879 llvm::Value *Mask = llvm::ConstantInt::get(IntTy, -TypeAlign); 4880 llvm::Value *Add = CGF.Builder.CreateAdd(AddrAsInt, Inc); 4881 llvm::Value *And = CGF.Builder.CreateAnd(Add, Mask); 4882 AddrTyped = CGF.Builder.CreateIntToPtr(And, PTy); 4883 } 4884 else 4885 AddrTyped = Builder.CreateBitCast(Addr, PTy); 4886 4887 llvm::Value *AlignedAddr = Builder.CreateBitCast(AddrTyped, BP); 4888 TypeAlign = std::max((unsigned)TypeAlign, MinABIStackAlignInBytes); 4889 uint64_t Offset = 4890 llvm::RoundUpToAlignment(CGF.getContext().getTypeSize(Ty) / 8, TypeAlign); 4891 llvm::Value *NextAddr = 4892 Builder.CreateGEP(AlignedAddr, llvm::ConstantInt::get(IntTy, Offset), 4893 "ap.next"); 4894 Builder.CreateStore(NextAddr, VAListAddrAsBPP); 4895 4896 return AddrTyped; 4897} 4898 4899bool 4900MIPSTargetCodeGenInfo::initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 4901 llvm::Value *Address) const { 4902 // This information comes from gcc's implementation, which seems to 4903 // as canonical as it gets. 4904 4905 // Everything on MIPS is 4 bytes. Double-precision FP registers 4906 // are aliased to pairs of single-precision FP registers. 4907 llvm::Value *Four8 = llvm::ConstantInt::get(CGF.Int8Ty, 4); 4908 4909 // 0-31 are the general purpose registers, $0 - $31. 4910 // 32-63 are the floating-point registers, $f0 - $f31. 4911 // 64 and 65 are the multiply/divide registers, $hi and $lo. 4912 // 66 is the (notional, I think) register for signal-handler return. 4913 AssignToArrayRange(CGF.Builder, Address, Four8, 0, 65); 4914 4915 // 67-74 are the floating-point status registers, $fcc0 - $fcc7. 4916 // They are one bit wide and ignored here. 4917 4918 // 80-111 are the coprocessor 0 registers, $c0r0 - $c0r31. 4919 // (coprocessor 1 is the FP unit) 4920 // 112-143 are the coprocessor 2 registers, $c2r0 - $c2r31. 4921 // 144-175 are the coprocessor 3 registers, $c3r0 - $c3r31. 4922 // 176-181 are the DSP accumulator registers. 4923 AssignToArrayRange(CGF.Builder, Address, Four8, 80, 181); 4924 return false; 4925} 4926 4927//===----------------------------------------------------------------------===// 4928// TCE ABI Implementation (see http://tce.cs.tut.fi). Uses mostly the defaults. 4929// Currently subclassed only to implement custom OpenCL C function attribute 4930// handling. 4931//===----------------------------------------------------------------------===// 4932 4933namespace { 4934 4935class TCETargetCodeGenInfo : public DefaultTargetCodeGenInfo { 4936public: 4937 TCETargetCodeGenInfo(CodeGenTypes &CGT) 4938 : DefaultTargetCodeGenInfo(CGT) {} 4939 4940 virtual void SetTargetAttributes(const Decl *D, llvm::GlobalValue *GV, 4941 CodeGen::CodeGenModule &M) const; 4942}; 4943 4944void TCETargetCodeGenInfo::SetTargetAttributes(const Decl *D, 4945 llvm::GlobalValue *GV, 4946 CodeGen::CodeGenModule &M) const { 4947 const FunctionDecl *FD = dyn_cast<FunctionDecl>(D); 4948 if (!FD) return; 4949 4950 llvm::Function *F = cast<llvm::Function>(GV); 4951 4952 if (M.getLangOpts().OpenCL) { 4953 if (FD->hasAttr<OpenCLKernelAttr>()) { 4954 // OpenCL C Kernel functions are not subject to inlining 4955 F->addFnAttr(llvm::Attribute::NoInline); 4956 4957 if (FD->hasAttr<ReqdWorkGroupSizeAttr>()) { 4958 4959 // Convert the reqd_work_group_size() attributes to metadata. 4960 llvm::LLVMContext &Context = F->getContext(); 4961 llvm::NamedMDNode *OpenCLMetadata = 4962 M.getModule().getOrInsertNamedMetadata("opencl.kernel_wg_size_info"); 4963 4964 SmallVector<llvm::Value*, 5> Operands; 4965 Operands.push_back(F); 4966 4967 Operands.push_back(llvm::Constant::getIntegerValue(M.Int32Ty, 4968 llvm::APInt(32, 4969 FD->getAttr<ReqdWorkGroupSizeAttr>()->getXDim()))); 4970 Operands.push_back(llvm::Constant::getIntegerValue(M.Int32Ty, 4971 llvm::APInt(32, 4972 FD->getAttr<ReqdWorkGroupSizeAttr>()->getYDim()))); 4973 Operands.push_back(llvm::Constant::getIntegerValue(M.Int32Ty, 4974 llvm::APInt(32, 4975 FD->getAttr<ReqdWorkGroupSizeAttr>()->getZDim()))); 4976 4977 // Add a boolean constant operand for "required" (true) or "hint" (false) 4978 // for implementing the work_group_size_hint attr later. Currently 4979 // always true as the hint is not yet implemented. 4980 Operands.push_back(llvm::ConstantInt::getTrue(Context)); 4981 OpenCLMetadata->addOperand(llvm::MDNode::get(Context, Operands)); 4982 } 4983 } 4984 } 4985} 4986 4987} 4988 4989//===----------------------------------------------------------------------===// 4990// Hexagon ABI Implementation 4991//===----------------------------------------------------------------------===// 4992 4993namespace { 4994 4995class HexagonABIInfo : public ABIInfo { 4996 4997 4998public: 4999 HexagonABIInfo(CodeGenTypes &CGT) : ABIInfo(CGT) {} 5000 5001private: 5002 5003 ABIArgInfo classifyReturnType(QualType RetTy) const; 5004 ABIArgInfo classifyArgumentType(QualType RetTy) const; 5005 5006 virtual void computeInfo(CGFunctionInfo &FI) const; 5007 5008 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 5009 CodeGenFunction &CGF) const; 5010}; 5011 5012class HexagonTargetCodeGenInfo : public TargetCodeGenInfo { 5013public: 5014 HexagonTargetCodeGenInfo(CodeGenTypes &CGT) 5015 :TargetCodeGenInfo(new HexagonABIInfo(CGT)) {} 5016 5017 int getDwarfEHStackPointer(CodeGen::CodeGenModule &M) const { 5018 return 29; 5019 } 5020}; 5021 5022} 5023 5024void HexagonABIInfo::computeInfo(CGFunctionInfo &FI) const { 5025 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 5026 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 5027 it != ie; ++it) 5028 it->info = classifyArgumentType(it->type); 5029} 5030 5031ABIArgInfo HexagonABIInfo::classifyArgumentType(QualType Ty) const { 5032 if (!isAggregateTypeForABI(Ty)) { 5033 // Treat an enum type as its underlying type. 5034 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 5035 Ty = EnumTy->getDecl()->getIntegerType(); 5036 5037 return (Ty->isPromotableIntegerType() ? 5038 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 5039 } 5040 5041 // Ignore empty records. 5042 if (isEmptyRecord(getContext(), Ty, true)) 5043 return ABIArgInfo::getIgnore(); 5044 5045 if (CGCXXABI::RecordArgABI RAA = getRecordArgABI(Ty, CGT)) 5046 return ABIArgInfo::getIndirect(0, RAA == CGCXXABI::RAA_DirectInMemory); 5047 5048 uint64_t Size = getContext().getTypeSize(Ty); 5049 if (Size > 64) 5050 return ABIArgInfo::getIndirect(0, /*ByVal=*/true); 5051 // Pass in the smallest viable integer type. 5052 else if (Size > 32) 5053 return ABIArgInfo::getDirect(llvm::Type::getInt64Ty(getVMContext())); 5054 else if (Size > 16) 5055 return ABIArgInfo::getDirect(llvm::Type::getInt32Ty(getVMContext())); 5056 else if (Size > 8) 5057 return ABIArgInfo::getDirect(llvm::Type::getInt16Ty(getVMContext())); 5058 else 5059 return ABIArgInfo::getDirect(llvm::Type::getInt8Ty(getVMContext())); 5060} 5061 5062ABIArgInfo HexagonABIInfo::classifyReturnType(QualType RetTy) const { 5063 if (RetTy->isVoidType()) 5064 return ABIArgInfo::getIgnore(); 5065 5066 // Large vector types should be returned via memory. 5067 if (RetTy->isVectorType() && getContext().getTypeSize(RetTy) > 64) 5068 return ABIArgInfo::getIndirect(0); 5069 5070 if (!isAggregateTypeForABI(RetTy)) { 5071 // Treat an enum type as its underlying type. 5072 if (const EnumType *EnumTy = RetTy->getAs<EnumType>()) 5073 RetTy = EnumTy->getDecl()->getIntegerType(); 5074 5075 return (RetTy->isPromotableIntegerType() ? 5076 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 5077 } 5078 5079 // Structures with either a non-trivial destructor or a non-trivial 5080 // copy constructor are always indirect. 5081 if (isRecordReturnIndirect(RetTy, CGT)) 5082 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 5083 5084 if (isEmptyRecord(getContext(), RetTy, true)) 5085 return ABIArgInfo::getIgnore(); 5086 5087 // Aggregates <= 8 bytes are returned in r0; other aggregates 5088 // are returned indirectly. 5089 uint64_t Size = getContext().getTypeSize(RetTy); 5090 if (Size <= 64) { 5091 // Return in the smallest viable integer type. 5092 if (Size <= 8) 5093 return ABIArgInfo::getDirect(llvm::Type::getInt8Ty(getVMContext())); 5094 if (Size <= 16) 5095 return ABIArgInfo::getDirect(llvm::Type::getInt16Ty(getVMContext())); 5096 if (Size <= 32) 5097 return ABIArgInfo::getDirect(llvm::Type::getInt32Ty(getVMContext())); 5098 return ABIArgInfo::getDirect(llvm::Type::getInt64Ty(getVMContext())); 5099 } 5100 5101 return ABIArgInfo::getIndirect(0, /*ByVal=*/true); 5102} 5103 5104llvm::Value *HexagonABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 5105 CodeGenFunction &CGF) const { 5106 // FIXME: Need to handle alignment 5107 llvm::Type *BPP = CGF.Int8PtrPtrTy; 5108 5109 CGBuilderTy &Builder = CGF.Builder; 5110 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP, 5111 "ap"); 5112 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur"); 5113 llvm::Type *PTy = 5114 llvm::PointerType::getUnqual(CGF.ConvertType(Ty)); 5115 llvm::Value *AddrTyped = Builder.CreateBitCast(Addr, PTy); 5116 5117 uint64_t Offset = 5118 llvm::RoundUpToAlignment(CGF.getContext().getTypeSize(Ty) / 8, 4); 5119 llvm::Value *NextAddr = 5120 Builder.CreateGEP(Addr, llvm::ConstantInt::get(CGF.Int32Ty, Offset), 5121 "ap.next"); 5122 Builder.CreateStore(NextAddr, VAListAddrAsBPP); 5123 5124 return AddrTyped; 5125} 5126 5127 5128//===----------------------------------------------------------------------===// 5129// SPARC v9 ABI Implementation. 5130// Based on the SPARC Compliance Definition version 2.4.1. 5131// 5132// Function arguments a mapped to a nominal "parameter array" and promoted to 5133// registers depending on their type. Each argument occupies 8 or 16 bytes in 5134// the array, structs larger than 16 bytes are passed indirectly. 5135// 5136// One case requires special care: 5137// 5138// struct mixed { 5139// int i; 5140// float f; 5141// }; 5142// 5143// When a struct mixed is passed by value, it only occupies 8 bytes in the 5144// parameter array, but the int is passed in an integer register, and the float 5145// is passed in a floating point register. This is represented as two arguments 5146// with the LLVM IR inreg attribute: 5147// 5148// declare void f(i32 inreg %i, float inreg %f) 5149// 5150// The code generator will only allocate 4 bytes from the parameter array for 5151// the inreg arguments. All other arguments are allocated a multiple of 8 5152// bytes. 5153// 5154namespace { 5155class SparcV9ABIInfo : public ABIInfo { 5156public: 5157 SparcV9ABIInfo(CodeGenTypes &CGT) : ABIInfo(CGT) {} 5158 5159private: 5160 ABIArgInfo classifyType(QualType RetTy, unsigned SizeLimit) const; 5161 virtual void computeInfo(CGFunctionInfo &FI) const; 5162 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 5163 CodeGenFunction &CGF) const; 5164}; 5165} // end anonymous namespace 5166 5167ABIArgInfo 5168SparcV9ABIInfo::classifyType(QualType Ty, unsigned SizeLimit) const { 5169 if (Ty->isVoidType()) 5170 return ABIArgInfo::getIgnore(); 5171 5172 uint64_t Size = getContext().getTypeSize(Ty); 5173 5174 // Anything too big to fit in registers is passed with an explicit indirect 5175 // pointer / sret pointer. 5176 if (Size > SizeLimit) 5177 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 5178 5179 // Treat an enum type as its underlying type. 5180 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 5181 Ty = EnumTy->getDecl()->getIntegerType(); 5182 5183 // Integer types smaller than a register are extended. 5184 if (Size < 64 && Ty->isIntegerType()) 5185 return ABIArgInfo::getExtend(); 5186 5187 // Other non-aggregates go in registers. 5188 if (!isAggregateTypeForABI(Ty)) 5189 return ABIArgInfo::getDirect(); 5190 5191 // This is a small aggregate type that should be passed in registers. 5192 // FIXME: Compute the correct coersion type. 5193 // FIXME: Ensure any float members are passed in float registers. 5194 return ABIArgInfo::getDirect(); 5195} 5196 5197llvm::Value *SparcV9ABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 5198 CodeGenFunction &CGF) const { 5199 // FIXME: Implement with va_arg. 5200 return 0; 5201} 5202 5203void SparcV9ABIInfo::computeInfo(CGFunctionInfo &FI) const { 5204 FI.getReturnInfo() = classifyType(FI.getReturnType(), 32 * 8); 5205 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 5206 it != ie; ++it) 5207 it->info = classifyType(it->type, 16 * 8); 5208} 5209 5210namespace { 5211class SparcV9TargetCodeGenInfo : public TargetCodeGenInfo { 5212public: 5213 SparcV9TargetCodeGenInfo(CodeGenTypes &CGT) 5214 : TargetCodeGenInfo(new SparcV9ABIInfo(CGT)) {} 5215}; 5216} // end anonymous namespace 5217 5218 5219const TargetCodeGenInfo &CodeGenModule::getTargetCodeGenInfo() { 5220 if (TheTargetCodeGenInfo) 5221 return *TheTargetCodeGenInfo; 5222 5223 const llvm::Triple &Triple = getTarget().getTriple(); 5224 switch (Triple.getArch()) { 5225 default: 5226 return *(TheTargetCodeGenInfo = new DefaultTargetCodeGenInfo(Types)); 5227 5228 case llvm::Triple::le32: 5229 return *(TheTargetCodeGenInfo = new PNaClTargetCodeGenInfo(Types)); 5230 case llvm::Triple::mips: 5231 case llvm::Triple::mipsel: 5232 return *(TheTargetCodeGenInfo = new MIPSTargetCodeGenInfo(Types, true)); 5233 5234 case llvm::Triple::mips64: 5235 case llvm::Triple::mips64el: 5236 return *(TheTargetCodeGenInfo = new MIPSTargetCodeGenInfo(Types, false)); 5237 5238 case llvm::Triple::aarch64: 5239 return *(TheTargetCodeGenInfo = new AArch64TargetCodeGenInfo(Types)); 5240 5241 case llvm::Triple::arm: 5242 case llvm::Triple::thumb: 5243 { 5244 ARMABIInfo::ABIKind Kind = ARMABIInfo::AAPCS; 5245 if (strcmp(getTarget().getABI(), "apcs-gnu") == 0) 5246 Kind = ARMABIInfo::APCS; 5247 else if (CodeGenOpts.FloatABI == "hard" || 5248 (CodeGenOpts.FloatABI != "soft" && 5249 Triple.getEnvironment() == llvm::Triple::GNUEABIHF)) 5250 Kind = ARMABIInfo::AAPCS_VFP; 5251 5252 switch (Triple.getOS()) { 5253 case llvm::Triple::NaCl: 5254 return *(TheTargetCodeGenInfo = 5255 new NaClARMTargetCodeGenInfo(Types, Kind)); 5256 default: 5257 return *(TheTargetCodeGenInfo = 5258 new ARMTargetCodeGenInfo(Types, Kind)); 5259 } 5260 } 5261 5262 case llvm::Triple::ppc: 5263 return *(TheTargetCodeGenInfo = new PPC32TargetCodeGenInfo(Types)); 5264 case llvm::Triple::ppc64: 5265 if (Triple.isOSBinFormatELF()) 5266 return *(TheTargetCodeGenInfo = new PPC64_SVR4_TargetCodeGenInfo(Types)); 5267 else 5268 return *(TheTargetCodeGenInfo = new PPC64TargetCodeGenInfo(Types)); 5269 5270 case llvm::Triple::nvptx: 5271 case llvm::Triple::nvptx64: 5272 return *(TheTargetCodeGenInfo = new NVPTXTargetCodeGenInfo(Types)); 5273 5274 case llvm::Triple::mblaze: 5275 return *(TheTargetCodeGenInfo = new MBlazeTargetCodeGenInfo(Types)); 5276 5277 case llvm::Triple::msp430: 5278 return *(TheTargetCodeGenInfo = new MSP430TargetCodeGenInfo(Types)); 5279 5280 case llvm::Triple::systemz: 5281 return *(TheTargetCodeGenInfo = new SystemZTargetCodeGenInfo(Types)); 5282 5283 case llvm::Triple::tce: 5284 return *(TheTargetCodeGenInfo = new TCETargetCodeGenInfo(Types)); 5285 5286 case llvm::Triple::x86: { 5287 if (Triple.isOSDarwin()) 5288 return *(TheTargetCodeGenInfo = 5289 new X86_32TargetCodeGenInfo(Types, true, true, false, 5290 CodeGenOpts.NumRegisterParameters)); 5291 5292 switch (Triple.getOS()) { 5293 case llvm::Triple::Cygwin: 5294 case llvm::Triple::MinGW32: 5295 case llvm::Triple::AuroraUX: 5296 case llvm::Triple::DragonFly: 5297 case llvm::Triple::FreeBSD: 5298 case llvm::Triple::OpenBSD: 5299 case llvm::Triple::Bitrig: 5300 return *(TheTargetCodeGenInfo = 5301 new X86_32TargetCodeGenInfo(Types, false, true, false, 5302 CodeGenOpts.NumRegisterParameters)); 5303 5304 case llvm::Triple::Win32: 5305 return *(TheTargetCodeGenInfo = 5306 new WinX86_32TargetCodeGenInfo(Types, 5307 CodeGenOpts.NumRegisterParameters)); 5308 5309 default: 5310 return *(TheTargetCodeGenInfo = 5311 new X86_32TargetCodeGenInfo(Types, false, false, false, 5312 CodeGenOpts.NumRegisterParameters)); 5313 } 5314 } 5315 5316 case llvm::Triple::x86_64: { 5317 bool HasAVX = strcmp(getTarget().getABI(), "avx") == 0; 5318 5319 switch (Triple.getOS()) { 5320 case llvm::Triple::Win32: 5321 case llvm::Triple::MinGW32: 5322 case llvm::Triple::Cygwin: 5323 return *(TheTargetCodeGenInfo = new WinX86_64TargetCodeGenInfo(Types)); 5324 case llvm::Triple::NaCl: 5325 return *(TheTargetCodeGenInfo = new NaClX86_64TargetCodeGenInfo(Types, 5326 HasAVX)); 5327 default: 5328 return *(TheTargetCodeGenInfo = new X86_64TargetCodeGenInfo(Types, 5329 HasAVX)); 5330 } 5331 } 5332 case llvm::Triple::hexagon: 5333 return *(TheTargetCodeGenInfo = new HexagonTargetCodeGenInfo(Types)); 5334 case llvm::Triple::sparcv9: 5335 return *(TheTargetCodeGenInfo = new SparcV9TargetCodeGenInfo(Types)); 5336 } 5337} 5338