TargetInfo.cpp revision 1cce1958b127f1722a18825b2cd793ce21246911
1//===---- TargetInfo.cpp - Encapsulate target details -----------*- C++ -*-===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// These classes wrap the information about a call or function 11// definition used to handle ABI compliancy. 12// 13//===----------------------------------------------------------------------===// 14 15#include "TargetInfo.h" 16#include "ABIInfo.h" 17#include "CodeGenFunction.h" 18#include "clang/AST/RecordLayout.h" 19#include "llvm/Type.h" 20#include "llvm/Target/TargetData.h" 21#include "llvm/ADT/StringExtras.h" 22#include "llvm/ADT/Triple.h" 23#include "llvm/Support/raw_ostream.h" 24using namespace clang; 25using namespace CodeGen; 26 27static void AssignToArrayRange(CodeGen::CGBuilderTy &Builder, 28 llvm::Value *Array, 29 llvm::Value *Value, 30 unsigned FirstIndex, 31 unsigned LastIndex) { 32 // Alternatively, we could emit this as a loop in the source. 33 for (unsigned I = FirstIndex; I <= LastIndex; ++I) { 34 llvm::Value *Cell = Builder.CreateConstInBoundsGEP1_32(Array, I); 35 Builder.CreateStore(Value, Cell); 36 } 37} 38 39ABIInfo::~ABIInfo() {} 40 41ASTContext &ABIInfo::getContext() const { 42 return CGT.getContext(); 43} 44 45llvm::LLVMContext &ABIInfo::getVMContext() const { 46 return CGT.getLLVMContext(); 47} 48 49const llvm::TargetData &ABIInfo::getTargetData() const { 50 return CGT.getTargetData(); 51} 52 53 54void ABIArgInfo::dump() const { 55 llvm::raw_ostream &OS = llvm::errs(); 56 OS << "(ABIArgInfo Kind="; 57 switch (TheKind) { 58 case Direct: 59 OS << "Direct Type="; 60 if (const llvm::Type *Ty = getCoerceToType()) 61 Ty->print(OS); 62 else 63 OS << "null"; 64 break; 65 case Extend: 66 OS << "Extend"; 67 break; 68 case Ignore: 69 OS << "Ignore"; 70 break; 71 case Indirect: 72 OS << "Indirect Align=" << getIndirectAlign() 73 << " Byal=" << getIndirectByVal(); 74 break; 75 case Expand: 76 OS << "Expand"; 77 break; 78 } 79 OS << ")\n"; 80} 81 82TargetCodeGenInfo::~TargetCodeGenInfo() { delete Info; } 83 84static bool isEmptyRecord(ASTContext &Context, QualType T, bool AllowArrays); 85 86/// isEmptyField - Return true iff a the field is "empty", that is it 87/// is an unnamed bit-field or an (array of) empty record(s). 88static bool isEmptyField(ASTContext &Context, const FieldDecl *FD, 89 bool AllowArrays) { 90 if (FD->isUnnamedBitfield()) 91 return true; 92 93 QualType FT = FD->getType(); 94 95 // Constant arrays of empty records count as empty, strip them off. 96 if (AllowArrays) 97 while (const ConstantArrayType *AT = Context.getAsConstantArrayType(FT)) 98 FT = AT->getElementType(); 99 100 const RecordType *RT = FT->getAs<RecordType>(); 101 if (!RT) 102 return false; 103 104 // C++ record fields are never empty, at least in the Itanium ABI. 105 // 106 // FIXME: We should use a predicate for whether this behavior is true in the 107 // current ABI. 108 if (isa<CXXRecordDecl>(RT->getDecl())) 109 return false; 110 111 return isEmptyRecord(Context, FT, AllowArrays); 112} 113 114/// isEmptyRecord - Return true iff a structure contains only empty 115/// fields. Note that a structure with a flexible array member is not 116/// considered empty. 117static bool isEmptyRecord(ASTContext &Context, QualType T, bool AllowArrays) { 118 const RecordType *RT = T->getAs<RecordType>(); 119 if (!RT) 120 return 0; 121 const RecordDecl *RD = RT->getDecl(); 122 if (RD->hasFlexibleArrayMember()) 123 return false; 124 125 // If this is a C++ record, check the bases first. 126 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) 127 for (CXXRecordDecl::base_class_const_iterator i = CXXRD->bases_begin(), 128 e = CXXRD->bases_end(); i != e; ++i) 129 if (!isEmptyRecord(Context, i->getType(), true)) 130 return false; 131 132 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 133 i != e; ++i) 134 if (!isEmptyField(Context, *i, AllowArrays)) 135 return false; 136 return true; 137} 138 139/// hasNonTrivialDestructorOrCopyConstructor - Determine if a type has either 140/// a non-trivial destructor or a non-trivial copy constructor. 141static bool hasNonTrivialDestructorOrCopyConstructor(const RecordType *RT) { 142 const CXXRecordDecl *RD = dyn_cast<CXXRecordDecl>(RT->getDecl()); 143 if (!RD) 144 return false; 145 146 return !RD->hasTrivialDestructor() || !RD->hasTrivialCopyConstructor(); 147} 148 149/// isRecordWithNonTrivialDestructorOrCopyConstructor - Determine if a type is 150/// a record type with either a non-trivial destructor or a non-trivial copy 151/// constructor. 152static bool isRecordWithNonTrivialDestructorOrCopyConstructor(QualType T) { 153 const RecordType *RT = T->getAs<RecordType>(); 154 if (!RT) 155 return false; 156 157 return hasNonTrivialDestructorOrCopyConstructor(RT); 158} 159 160/// isSingleElementStruct - Determine if a structure is a "single 161/// element struct", i.e. it has exactly one non-empty field or 162/// exactly one field which is itself a single element 163/// struct. Structures with flexible array members are never 164/// considered single element structs. 165/// 166/// \return The field declaration for the single non-empty field, if 167/// it exists. 168static const Type *isSingleElementStruct(QualType T, ASTContext &Context) { 169 const RecordType *RT = T->getAsStructureType(); 170 if (!RT) 171 return 0; 172 173 const RecordDecl *RD = RT->getDecl(); 174 if (RD->hasFlexibleArrayMember()) 175 return 0; 176 177 const Type *Found = 0; 178 179 // If this is a C++ record, check the bases first. 180 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) { 181 for (CXXRecordDecl::base_class_const_iterator i = CXXRD->bases_begin(), 182 e = CXXRD->bases_end(); i != e; ++i) { 183 // Ignore empty records. 184 if (isEmptyRecord(Context, i->getType(), true)) 185 continue; 186 187 // If we already found an element then this isn't a single-element struct. 188 if (Found) 189 return 0; 190 191 // If this is non-empty and not a single element struct, the composite 192 // cannot be a single element struct. 193 Found = isSingleElementStruct(i->getType(), Context); 194 if (!Found) 195 return 0; 196 } 197 } 198 199 // Check for single element. 200 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 201 i != e; ++i) { 202 const FieldDecl *FD = *i; 203 QualType FT = FD->getType(); 204 205 // Ignore empty fields. 206 if (isEmptyField(Context, FD, true)) 207 continue; 208 209 // If we already found an element then this isn't a single-element 210 // struct. 211 if (Found) 212 return 0; 213 214 // Treat single element arrays as the element. 215 while (const ConstantArrayType *AT = Context.getAsConstantArrayType(FT)) { 216 if (AT->getSize().getZExtValue() != 1) 217 break; 218 FT = AT->getElementType(); 219 } 220 221 if (!CodeGenFunction::hasAggregateLLVMType(FT)) { 222 Found = FT.getTypePtr(); 223 } else { 224 Found = isSingleElementStruct(FT, Context); 225 if (!Found) 226 return 0; 227 } 228 } 229 230 return Found; 231} 232 233static bool is32Or64BitBasicType(QualType Ty, ASTContext &Context) { 234 if (!Ty->getAs<BuiltinType>() && !Ty->hasPointerRepresentation() && 235 !Ty->isAnyComplexType() && !Ty->isEnumeralType() && 236 !Ty->isBlockPointerType()) 237 return false; 238 239 uint64_t Size = Context.getTypeSize(Ty); 240 return Size == 32 || Size == 64; 241} 242 243/// canExpandIndirectArgument - Test whether an argument type which is to be 244/// passed indirectly (on the stack) would have the equivalent layout if it was 245/// expanded into separate arguments. If so, we prefer to do the latter to avoid 246/// inhibiting optimizations. 247/// 248// FIXME: This predicate is missing many cases, currently it just follows 249// llvm-gcc (checks that all fields are 32-bit or 64-bit primitive types). We 250// should probably make this smarter, or better yet make the LLVM backend 251// capable of handling it. 252static bool canExpandIndirectArgument(QualType Ty, ASTContext &Context) { 253 // We can only expand structure types. 254 const RecordType *RT = Ty->getAs<RecordType>(); 255 if (!RT) 256 return false; 257 258 // We can only expand (C) structures. 259 // 260 // FIXME: This needs to be generalized to handle classes as well. 261 const RecordDecl *RD = RT->getDecl(); 262 if (!RD->isStruct() || isa<CXXRecordDecl>(RD)) 263 return false; 264 265 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 266 i != e; ++i) { 267 const FieldDecl *FD = *i; 268 269 if (!is32Or64BitBasicType(FD->getType(), Context)) 270 return false; 271 272 // FIXME: Reject bit-fields wholesale; there are two problems, we don't know 273 // how to expand them yet, and the predicate for telling if a bitfield still 274 // counts as "basic" is more complicated than what we were doing previously. 275 if (FD->isBitField()) 276 return false; 277 } 278 279 return true; 280} 281 282namespace { 283/// DefaultABIInfo - The default implementation for ABI specific 284/// details. This implementation provides information which results in 285/// self-consistent and sensible LLVM IR generation, but does not 286/// conform to any particular ABI. 287class DefaultABIInfo : public ABIInfo { 288public: 289 DefaultABIInfo(CodeGen::CodeGenTypes &CGT) : ABIInfo(CGT) {} 290 291 ABIArgInfo classifyReturnType(QualType RetTy) const; 292 ABIArgInfo classifyArgumentType(QualType RetTy) const; 293 294 virtual void computeInfo(CGFunctionInfo &FI) const { 295 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 296 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 297 it != ie; ++it) 298 it->info = classifyArgumentType(it->type); 299 } 300 301 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 302 CodeGenFunction &CGF) const; 303}; 304 305class DefaultTargetCodeGenInfo : public TargetCodeGenInfo { 306public: 307 DefaultTargetCodeGenInfo(CodeGen::CodeGenTypes &CGT) 308 : TargetCodeGenInfo(new DefaultABIInfo(CGT)) {} 309}; 310 311llvm::Value *DefaultABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 312 CodeGenFunction &CGF) const { 313 return 0; 314} 315 316ABIArgInfo DefaultABIInfo::classifyArgumentType(QualType Ty) const { 317 if (CodeGenFunction::hasAggregateLLVMType(Ty)) 318 return ABIArgInfo::getIndirect(0); 319 320 // Treat an enum type as its underlying type. 321 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 322 Ty = EnumTy->getDecl()->getIntegerType(); 323 324 return (Ty->isPromotableIntegerType() ? 325 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 326} 327 328//===----------------------------------------------------------------------===// 329// X86-32 ABI Implementation 330//===----------------------------------------------------------------------===// 331 332/// X86_32ABIInfo - The X86-32 ABI information. 333class X86_32ABIInfo : public ABIInfo { 334 bool IsDarwinVectorABI; 335 bool IsSmallStructInRegABI; 336 337 static bool isRegisterSize(unsigned Size) { 338 return (Size == 8 || Size == 16 || Size == 32 || Size == 64); 339 } 340 341 static bool shouldReturnTypeInRegister(QualType Ty, ASTContext &Context); 342 343 /// getIndirectResult - Give a source type \arg Ty, return a suitable result 344 /// such that the argument will be passed in memory. 345 ABIArgInfo getIndirectResult(QualType Ty, bool ByVal = true) const; 346 347public: 348 349 ABIArgInfo classifyReturnType(QualType RetTy) const; 350 ABIArgInfo classifyArgumentType(QualType RetTy) const; 351 352 virtual void computeInfo(CGFunctionInfo &FI) const { 353 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 354 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 355 it != ie; ++it) 356 it->info = classifyArgumentType(it->type); 357 } 358 359 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 360 CodeGenFunction &CGF) const; 361 362 X86_32ABIInfo(CodeGen::CodeGenTypes &CGT, bool d, bool p) 363 : ABIInfo(CGT), IsDarwinVectorABI(d), IsSmallStructInRegABI(p) {} 364}; 365 366class X86_32TargetCodeGenInfo : public TargetCodeGenInfo { 367public: 368 X86_32TargetCodeGenInfo(CodeGen::CodeGenTypes &CGT, bool d, bool p) 369 :TargetCodeGenInfo(new X86_32ABIInfo(CGT, d, p)) {} 370 371 void SetTargetAttributes(const Decl *D, llvm::GlobalValue *GV, 372 CodeGen::CodeGenModule &CGM) const; 373 374 int getDwarfEHStackPointer(CodeGen::CodeGenModule &CGM) const { 375 // Darwin uses different dwarf register numbers for EH. 376 if (CGM.isTargetDarwin()) return 5; 377 378 return 4; 379 } 380 381 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 382 llvm::Value *Address) const; 383}; 384 385} 386 387/// shouldReturnTypeInRegister - Determine if the given type should be 388/// passed in a register (for the Darwin ABI). 389bool X86_32ABIInfo::shouldReturnTypeInRegister(QualType Ty, 390 ASTContext &Context) { 391 uint64_t Size = Context.getTypeSize(Ty); 392 393 // Type must be register sized. 394 if (!isRegisterSize(Size)) 395 return false; 396 397 if (Ty->isVectorType()) { 398 // 64- and 128- bit vectors inside structures are not returned in 399 // registers. 400 if (Size == 64 || Size == 128) 401 return false; 402 403 return true; 404 } 405 406 // If this is a builtin, pointer, enum, complex type, member pointer, or 407 // member function pointer it is ok. 408 if (Ty->getAs<BuiltinType>() || Ty->hasPointerRepresentation() || 409 Ty->isAnyComplexType() || Ty->isEnumeralType() || 410 Ty->isBlockPointerType() || Ty->isMemberPointerType()) 411 return true; 412 413 // Arrays are treated like records. 414 if (const ConstantArrayType *AT = Context.getAsConstantArrayType(Ty)) 415 return shouldReturnTypeInRegister(AT->getElementType(), Context); 416 417 // Otherwise, it must be a record type. 418 const RecordType *RT = Ty->getAs<RecordType>(); 419 if (!RT) return false; 420 421 // FIXME: Traverse bases here too. 422 423 // Structure types are passed in register if all fields would be 424 // passed in a register. 425 for (RecordDecl::field_iterator i = RT->getDecl()->field_begin(), 426 e = RT->getDecl()->field_end(); i != e; ++i) { 427 const FieldDecl *FD = *i; 428 429 // Empty fields are ignored. 430 if (isEmptyField(Context, FD, true)) 431 continue; 432 433 // Check fields recursively. 434 if (!shouldReturnTypeInRegister(FD->getType(), Context)) 435 return false; 436 } 437 438 return true; 439} 440 441ABIArgInfo X86_32ABIInfo::classifyReturnType(QualType RetTy) const { 442 if (RetTy->isVoidType()) 443 return ABIArgInfo::getIgnore(); 444 445 if (const VectorType *VT = RetTy->getAs<VectorType>()) { 446 // On Darwin, some vectors are returned in registers. 447 if (IsDarwinVectorABI) { 448 uint64_t Size = getContext().getTypeSize(RetTy); 449 450 // 128-bit vectors are a special case; they are returned in 451 // registers and we need to make sure to pick a type the LLVM 452 // backend will like. 453 if (Size == 128) 454 return ABIArgInfo::getDirect(llvm::VectorType::get( 455 llvm::Type::getInt64Ty(getVMContext()), 2)); 456 457 // Always return in register if it fits in a general purpose 458 // register, or if it is 64 bits and has a single element. 459 if ((Size == 8 || Size == 16 || Size == 32) || 460 (Size == 64 && VT->getNumElements() == 1)) 461 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(), 462 Size)); 463 464 return ABIArgInfo::getIndirect(0); 465 } 466 467 return ABIArgInfo::getDirect(); 468 } 469 470 if (CodeGenFunction::hasAggregateLLVMType(RetTy)) { 471 if (const RecordType *RT = RetTy->getAs<RecordType>()) { 472 // Structures with either a non-trivial destructor or a non-trivial 473 // copy constructor are always indirect. 474 if (hasNonTrivialDestructorOrCopyConstructor(RT)) 475 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 476 477 // Structures with flexible arrays are always indirect. 478 if (RT->getDecl()->hasFlexibleArrayMember()) 479 return ABIArgInfo::getIndirect(0); 480 } 481 482 // If specified, structs and unions are always indirect. 483 if (!IsSmallStructInRegABI && !RetTy->isAnyComplexType()) 484 return ABIArgInfo::getIndirect(0); 485 486 // Classify "single element" structs as their element type. 487 if (const Type *SeltTy = isSingleElementStruct(RetTy, getContext())) { 488 if (const BuiltinType *BT = SeltTy->getAs<BuiltinType>()) { 489 if (BT->isIntegerType()) { 490 // We need to use the size of the structure, padding 491 // bit-fields can adjust that to be larger than the single 492 // element type. 493 uint64_t Size = getContext().getTypeSize(RetTy); 494 return ABIArgInfo::getDirect( 495 llvm::IntegerType::get(getVMContext(), (unsigned)Size)); 496 } 497 498 if (BT->getKind() == BuiltinType::Float) { 499 assert(getContext().getTypeSize(RetTy) == 500 getContext().getTypeSize(SeltTy) && 501 "Unexpect single element structure size!"); 502 return ABIArgInfo::getDirect(llvm::Type::getFloatTy(getVMContext())); 503 } 504 505 if (BT->getKind() == BuiltinType::Double) { 506 assert(getContext().getTypeSize(RetTy) == 507 getContext().getTypeSize(SeltTy) && 508 "Unexpect single element structure size!"); 509 return ABIArgInfo::getDirect(llvm::Type::getDoubleTy(getVMContext())); 510 } 511 } else if (SeltTy->isPointerType()) { 512 // FIXME: It would be really nice if this could come out as the proper 513 // pointer type. 514 const llvm::Type *PtrTy = llvm::Type::getInt8PtrTy(getVMContext()); 515 return ABIArgInfo::getDirect(PtrTy); 516 } else if (SeltTy->isVectorType()) { 517 // 64- and 128-bit vectors are never returned in a 518 // register when inside a structure. 519 uint64_t Size = getContext().getTypeSize(RetTy); 520 if (Size == 64 || Size == 128) 521 return ABIArgInfo::getIndirect(0); 522 523 return classifyReturnType(QualType(SeltTy, 0)); 524 } 525 } 526 527 // Small structures which are register sized are generally returned 528 // in a register. 529 if (X86_32ABIInfo::shouldReturnTypeInRegister(RetTy, getContext())) { 530 uint64_t Size = getContext().getTypeSize(RetTy); 531 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(),Size)); 532 } 533 534 return ABIArgInfo::getIndirect(0); 535 } 536 537 // Treat an enum type as its underlying type. 538 if (const EnumType *EnumTy = RetTy->getAs<EnumType>()) 539 RetTy = EnumTy->getDecl()->getIntegerType(); 540 541 return (RetTy->isPromotableIntegerType() ? 542 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 543} 544 545ABIArgInfo X86_32ABIInfo::getIndirectResult(QualType Ty, bool ByVal) const { 546 if (!ByVal) 547 return ABIArgInfo::getIndirect(0, false); 548 549 // Compute the byval alignment. We trust the back-end to honor the 550 // minimum ABI alignment for byval, to make cleaner IR. 551 const unsigned MinABIAlign = 4; 552 unsigned Align = getContext().getTypeAlign(Ty) / 8; 553 if (Align > MinABIAlign) 554 return ABIArgInfo::getIndirect(Align); 555 return ABIArgInfo::getIndirect(0); 556} 557 558ABIArgInfo X86_32ABIInfo::classifyArgumentType(QualType Ty) const { 559 // FIXME: Set alignment on indirect arguments. 560 if (CodeGenFunction::hasAggregateLLVMType(Ty)) { 561 // Structures with flexible arrays are always indirect. 562 if (const RecordType *RT = Ty->getAs<RecordType>()) { 563 // Structures with either a non-trivial destructor or a non-trivial 564 // copy constructor are always indirect. 565 if (hasNonTrivialDestructorOrCopyConstructor(RT)) 566 return getIndirectResult(Ty, /*ByVal=*/false); 567 568 if (RT->getDecl()->hasFlexibleArrayMember()) 569 return getIndirectResult(Ty); 570 } 571 572 // Ignore empty structs. 573 if (Ty->isStructureType() && getContext().getTypeSize(Ty) == 0) 574 return ABIArgInfo::getIgnore(); 575 576 // Expand small (<= 128-bit) record types when we know that the stack layout 577 // of those arguments will match the struct. This is important because the 578 // LLVM backend isn't smart enough to remove byval, which inhibits many 579 // optimizations. 580 if (getContext().getTypeSize(Ty) <= 4*32 && 581 canExpandIndirectArgument(Ty, getContext())) 582 return ABIArgInfo::getExpand(); 583 584 return getIndirectResult(Ty); 585 } 586 587 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 588 Ty = EnumTy->getDecl()->getIntegerType(); 589 590 return (Ty->isPromotableIntegerType() ? 591 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 592} 593 594llvm::Value *X86_32ABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 595 CodeGenFunction &CGF) const { 596 const llvm::Type *BP = llvm::Type::getInt8PtrTy(CGF.getLLVMContext()); 597 const llvm::Type *BPP = llvm::PointerType::getUnqual(BP); 598 599 CGBuilderTy &Builder = CGF.Builder; 600 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP, 601 "ap"); 602 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur"); 603 llvm::Type *PTy = 604 llvm::PointerType::getUnqual(CGF.ConvertType(Ty)); 605 llvm::Value *AddrTyped = Builder.CreateBitCast(Addr, PTy); 606 607 uint64_t Offset = 608 llvm::RoundUpToAlignment(CGF.getContext().getTypeSize(Ty) / 8, 4); 609 llvm::Value *NextAddr = 610 Builder.CreateGEP(Addr, llvm::ConstantInt::get(CGF.Int32Ty, Offset), 611 "ap.next"); 612 Builder.CreateStore(NextAddr, VAListAddrAsBPP); 613 614 return AddrTyped; 615} 616 617void X86_32TargetCodeGenInfo::SetTargetAttributes(const Decl *D, 618 llvm::GlobalValue *GV, 619 CodeGen::CodeGenModule &CGM) const { 620 if (const FunctionDecl *FD = dyn_cast<FunctionDecl>(D)) { 621 if (FD->hasAttr<X86ForceAlignArgPointerAttr>()) { 622 // Get the LLVM function. 623 llvm::Function *Fn = cast<llvm::Function>(GV); 624 625 // Now add the 'alignstack' attribute with a value of 16. 626 Fn->addFnAttr(llvm::Attribute::constructStackAlignmentFromInt(16)); 627 } 628 } 629} 630 631bool X86_32TargetCodeGenInfo::initDwarfEHRegSizeTable( 632 CodeGen::CodeGenFunction &CGF, 633 llvm::Value *Address) const { 634 CodeGen::CGBuilderTy &Builder = CGF.Builder; 635 llvm::LLVMContext &Context = CGF.getLLVMContext(); 636 637 const llvm::IntegerType *i8 = llvm::Type::getInt8Ty(Context); 638 llvm::Value *Four8 = llvm::ConstantInt::get(i8, 4); 639 640 // 0-7 are the eight integer registers; the order is different 641 // on Darwin (for EH), but the range is the same. 642 // 8 is %eip. 643 AssignToArrayRange(Builder, Address, Four8, 0, 8); 644 645 if (CGF.CGM.isTargetDarwin()) { 646 // 12-16 are st(0..4). Not sure why we stop at 4. 647 // These have size 16, which is sizeof(long double) on 648 // platforms with 8-byte alignment for that type. 649 llvm::Value *Sixteen8 = llvm::ConstantInt::get(i8, 16); 650 AssignToArrayRange(Builder, Address, Sixteen8, 12, 16); 651 652 } else { 653 // 9 is %eflags, which doesn't get a size on Darwin for some 654 // reason. 655 Builder.CreateStore(Four8, Builder.CreateConstInBoundsGEP1_32(Address, 9)); 656 657 // 11-16 are st(0..5). Not sure why we stop at 5. 658 // These have size 12, which is sizeof(long double) on 659 // platforms with 4-byte alignment for that type. 660 llvm::Value *Twelve8 = llvm::ConstantInt::get(i8, 12); 661 AssignToArrayRange(Builder, Address, Twelve8, 11, 16); 662 } 663 664 return false; 665} 666 667//===----------------------------------------------------------------------===// 668// X86-64 ABI Implementation 669//===----------------------------------------------------------------------===// 670 671 672namespace { 673/// X86_64ABIInfo - The X86_64 ABI information. 674class X86_64ABIInfo : public ABIInfo { 675 enum Class { 676 Integer = 0, 677 SSE, 678 SSEUp, 679 X87, 680 X87Up, 681 ComplexX87, 682 NoClass, 683 Memory 684 }; 685 686 /// merge - Implement the X86_64 ABI merging algorithm. 687 /// 688 /// Merge an accumulating classification \arg Accum with a field 689 /// classification \arg Field. 690 /// 691 /// \param Accum - The accumulating classification. This should 692 /// always be either NoClass or the result of a previous merge 693 /// call. In addition, this should never be Memory (the caller 694 /// should just return Memory for the aggregate). 695 static Class merge(Class Accum, Class Field); 696 697 /// classify - Determine the x86_64 register classes in which the 698 /// given type T should be passed. 699 /// 700 /// \param Lo - The classification for the parts of the type 701 /// residing in the low word of the containing object. 702 /// 703 /// \param Hi - The classification for the parts of the type 704 /// residing in the high word of the containing object. 705 /// 706 /// \param OffsetBase - The bit offset of this type in the 707 /// containing object. Some parameters are classified different 708 /// depending on whether they straddle an eightbyte boundary. 709 /// 710 /// If a word is unused its result will be NoClass; if a type should 711 /// be passed in Memory then at least the classification of \arg Lo 712 /// will be Memory. 713 /// 714 /// The \arg Lo class will be NoClass iff the argument is ignored. 715 /// 716 /// If the \arg Lo class is ComplexX87, then the \arg Hi class will 717 /// also be ComplexX87. 718 void classify(QualType T, uint64_t OffsetBase, Class &Lo, Class &Hi) const; 719 720 const llvm::Type *Get16ByteVectorType(QualType Ty) const; 721 const llvm::Type *GetSSETypeAtOffset(const llvm::Type *IRType, 722 unsigned IROffset, QualType SourceTy, 723 unsigned SourceOffset) const; 724 const llvm::Type *GetINTEGERTypeAtOffset(const llvm::Type *IRType, 725 unsigned IROffset, QualType SourceTy, 726 unsigned SourceOffset) const; 727 728 /// getCoerceResult - Given a source type \arg Ty and an LLVM type 729 /// to coerce to, chose the best way to pass Ty in the same place 730 /// that \arg CoerceTo would be passed, but while keeping the 731 /// emitted code as simple as possible. 732 /// 733 /// FIXME: Note, this should be cleaned up to just take an enumeration of all 734 /// the ways we might want to pass things, instead of constructing an LLVM 735 /// type. This makes this code more explicit, and it makes it clearer that we 736 /// are also doing this for correctness in the case of passing scalar types. 737 ABIArgInfo getCoerceResult(QualType Ty, 738 const llvm::Type *CoerceTo) const; 739 740 /// getIndirectResult - Give a source type \arg Ty, return a suitable result 741 /// such that the argument will be returned in memory. 742 ABIArgInfo getIndirectReturnResult(QualType Ty) const; 743 744 /// getIndirectResult - Give a source type \arg Ty, return a suitable result 745 /// such that the argument will be passed in memory. 746 ABIArgInfo getIndirectResult(QualType Ty) const; 747 748 ABIArgInfo classifyReturnType(QualType RetTy) const; 749 750 ABIArgInfo classifyArgumentType(QualType Ty, unsigned &neededInt, 751 unsigned &neededSSE) const; 752 753public: 754 X86_64ABIInfo(CodeGen::CodeGenTypes &CGT) : ABIInfo(CGT) {} 755 756 virtual void computeInfo(CGFunctionInfo &FI) const; 757 758 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 759 CodeGenFunction &CGF) const; 760}; 761 762class X86_64TargetCodeGenInfo : public TargetCodeGenInfo { 763public: 764 X86_64TargetCodeGenInfo(CodeGen::CodeGenTypes &CGT) 765 : TargetCodeGenInfo(new X86_64ABIInfo(CGT)) {} 766 767 int getDwarfEHStackPointer(CodeGen::CodeGenModule &CGM) const { 768 return 7; 769 } 770 771 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 772 llvm::Value *Address) const { 773 CodeGen::CGBuilderTy &Builder = CGF.Builder; 774 llvm::LLVMContext &Context = CGF.getLLVMContext(); 775 776 const llvm::IntegerType *i8 = llvm::Type::getInt8Ty(Context); 777 llvm::Value *Eight8 = llvm::ConstantInt::get(i8, 8); 778 779 // 0-15 are the 16 integer registers. 780 // 16 is %rip. 781 AssignToArrayRange(Builder, Address, Eight8, 0, 16); 782 783 return false; 784 } 785}; 786 787} 788 789X86_64ABIInfo::Class X86_64ABIInfo::merge(Class Accum, Class Field) { 790 // AMD64-ABI 3.2.3p2: Rule 4. Each field of an object is 791 // classified recursively so that always two fields are 792 // considered. The resulting class is calculated according to 793 // the classes of the fields in the eightbyte: 794 // 795 // (a) If both classes are equal, this is the resulting class. 796 // 797 // (b) If one of the classes is NO_CLASS, the resulting class is 798 // the other class. 799 // 800 // (c) If one of the classes is MEMORY, the result is the MEMORY 801 // class. 802 // 803 // (d) If one of the classes is INTEGER, the result is the 804 // INTEGER. 805 // 806 // (e) If one of the classes is X87, X87UP, COMPLEX_X87 class, 807 // MEMORY is used as class. 808 // 809 // (f) Otherwise class SSE is used. 810 811 // Accum should never be memory (we should have returned) or 812 // ComplexX87 (because this cannot be passed in a structure). 813 assert((Accum != Memory && Accum != ComplexX87) && 814 "Invalid accumulated classification during merge."); 815 if (Accum == Field || Field == NoClass) 816 return Accum; 817 if (Field == Memory) 818 return Memory; 819 if (Accum == NoClass) 820 return Field; 821 if (Accum == Integer || Field == Integer) 822 return Integer; 823 if (Field == X87 || Field == X87Up || Field == ComplexX87 || 824 Accum == X87 || Accum == X87Up) 825 return Memory; 826 return SSE; 827} 828 829void X86_64ABIInfo::classify(QualType Ty, uint64_t OffsetBase, 830 Class &Lo, Class &Hi) const { 831 // FIXME: This code can be simplified by introducing a simple value class for 832 // Class pairs with appropriate constructor methods for the various 833 // situations. 834 835 // FIXME: Some of the split computations are wrong; unaligned vectors 836 // shouldn't be passed in registers for example, so there is no chance they 837 // can straddle an eightbyte. Verify & simplify. 838 839 Lo = Hi = NoClass; 840 841 Class &Current = OffsetBase < 64 ? Lo : Hi; 842 Current = Memory; 843 844 if (const BuiltinType *BT = Ty->getAs<BuiltinType>()) { 845 BuiltinType::Kind k = BT->getKind(); 846 847 if (k == BuiltinType::Void) { 848 Current = NoClass; 849 } else if (k == BuiltinType::Int128 || k == BuiltinType::UInt128) { 850 Lo = Integer; 851 Hi = Integer; 852 } else if (k >= BuiltinType::Bool && k <= BuiltinType::LongLong) { 853 Current = Integer; 854 } else if (k == BuiltinType::Float || k == BuiltinType::Double) { 855 Current = SSE; 856 } else if (k == BuiltinType::LongDouble) { 857 Lo = X87; 858 Hi = X87Up; 859 } 860 // FIXME: _Decimal32 and _Decimal64 are SSE. 861 // FIXME: _float128 and _Decimal128 are (SSE, SSEUp). 862 return; 863 } 864 865 if (const EnumType *ET = Ty->getAs<EnumType>()) { 866 // Classify the underlying integer type. 867 classify(ET->getDecl()->getIntegerType(), OffsetBase, Lo, Hi); 868 return; 869 } 870 871 if (Ty->hasPointerRepresentation()) { 872 Current = Integer; 873 return; 874 } 875 876 if (Ty->isMemberPointerType()) { 877 if (Ty->isMemberFunctionPointerType()) 878 Lo = Hi = Integer; 879 else 880 Current = Integer; 881 return; 882 } 883 884 if (const VectorType *VT = Ty->getAs<VectorType>()) { 885 uint64_t Size = getContext().getTypeSize(VT); 886 if (Size == 32) { 887 // gcc passes all <4 x char>, <2 x short>, <1 x int>, <1 x 888 // float> as integer. 889 Current = Integer; 890 891 // If this type crosses an eightbyte boundary, it should be 892 // split. 893 uint64_t EB_Real = (OffsetBase) / 64; 894 uint64_t EB_Imag = (OffsetBase + Size - 1) / 64; 895 if (EB_Real != EB_Imag) 896 Hi = Lo; 897 } else if (Size == 64) { 898 // gcc passes <1 x double> in memory. :( 899 if (VT->getElementType()->isSpecificBuiltinType(BuiltinType::Double)) 900 return; 901 902 // gcc passes <1 x long long> as INTEGER. 903 if (VT->getElementType()->isSpecificBuiltinType(BuiltinType::LongLong)) 904 Current = Integer; 905 else 906 Current = SSE; 907 908 // If this type crosses an eightbyte boundary, it should be 909 // split. 910 if (OffsetBase && OffsetBase != 64) 911 Hi = Lo; 912 } else if (Size == 128) { 913 Lo = SSE; 914 Hi = SSEUp; 915 } 916 return; 917 } 918 919 if (const ComplexType *CT = Ty->getAs<ComplexType>()) { 920 QualType ET = getContext().getCanonicalType(CT->getElementType()); 921 922 uint64_t Size = getContext().getTypeSize(Ty); 923 if (ET->isIntegralOrEnumerationType()) { 924 if (Size <= 64) 925 Current = Integer; 926 else if (Size <= 128) 927 Lo = Hi = Integer; 928 } else if (ET == getContext().FloatTy) 929 Current = SSE; 930 else if (ET == getContext().DoubleTy) 931 Lo = Hi = SSE; 932 else if (ET == getContext().LongDoubleTy) 933 Current = ComplexX87; 934 935 // If this complex type crosses an eightbyte boundary then it 936 // should be split. 937 uint64_t EB_Real = (OffsetBase) / 64; 938 uint64_t EB_Imag = (OffsetBase + getContext().getTypeSize(ET)) / 64; 939 if (Hi == NoClass && EB_Real != EB_Imag) 940 Hi = Lo; 941 942 return; 943 } 944 945 if (const ConstantArrayType *AT = getContext().getAsConstantArrayType(Ty)) { 946 // Arrays are treated like structures. 947 948 uint64_t Size = getContext().getTypeSize(Ty); 949 950 // AMD64-ABI 3.2.3p2: Rule 1. If the size of an object is larger 951 // than two eightbytes, ..., it has class MEMORY. 952 if (Size > 128) 953 return; 954 955 // AMD64-ABI 3.2.3p2: Rule 1. If ..., or it contains unaligned 956 // fields, it has class MEMORY. 957 // 958 // Only need to check alignment of array base. 959 if (OffsetBase % getContext().getTypeAlign(AT->getElementType())) 960 return; 961 962 // Otherwise implement simplified merge. We could be smarter about 963 // this, but it isn't worth it and would be harder to verify. 964 Current = NoClass; 965 uint64_t EltSize = getContext().getTypeSize(AT->getElementType()); 966 uint64_t ArraySize = AT->getSize().getZExtValue(); 967 for (uint64_t i=0, Offset=OffsetBase; i<ArraySize; ++i, Offset += EltSize) { 968 Class FieldLo, FieldHi; 969 classify(AT->getElementType(), Offset, FieldLo, FieldHi); 970 Lo = merge(Lo, FieldLo); 971 Hi = merge(Hi, FieldHi); 972 if (Lo == Memory || Hi == Memory) 973 break; 974 } 975 976 // Do post merger cleanup (see below). Only case we worry about is Memory. 977 if (Hi == Memory) 978 Lo = Memory; 979 assert((Hi != SSEUp || Lo == SSE) && "Invalid SSEUp array classification."); 980 return; 981 } 982 983 if (const RecordType *RT = Ty->getAs<RecordType>()) { 984 uint64_t Size = getContext().getTypeSize(Ty); 985 986 // AMD64-ABI 3.2.3p2: Rule 1. If the size of an object is larger 987 // than two eightbytes, ..., it has class MEMORY. 988 if (Size > 128) 989 return; 990 991 // AMD64-ABI 3.2.3p2: Rule 2. If a C++ object has either a non-trivial 992 // copy constructor or a non-trivial destructor, it is passed by invisible 993 // reference. 994 if (hasNonTrivialDestructorOrCopyConstructor(RT)) 995 return; 996 997 const RecordDecl *RD = RT->getDecl(); 998 999 // Assume variable sized types are passed in memory. 1000 if (RD->hasFlexibleArrayMember()) 1001 return; 1002 1003 const ASTRecordLayout &Layout = getContext().getASTRecordLayout(RD); 1004 1005 // Reset Lo class, this will be recomputed. 1006 Current = NoClass; 1007 1008 // If this is a C++ record, classify the bases first. 1009 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) { 1010 for (CXXRecordDecl::base_class_const_iterator i = CXXRD->bases_begin(), 1011 e = CXXRD->bases_end(); i != e; ++i) { 1012 assert(!i->isVirtual() && !i->getType()->isDependentType() && 1013 "Unexpected base class!"); 1014 const CXXRecordDecl *Base = 1015 cast<CXXRecordDecl>(i->getType()->getAs<RecordType>()->getDecl()); 1016 1017 // Classify this field. 1018 // 1019 // AMD64-ABI 3.2.3p2: Rule 3. If the size of the aggregate exceeds a 1020 // single eightbyte, each is classified separately. Each eightbyte gets 1021 // initialized to class NO_CLASS. 1022 Class FieldLo, FieldHi; 1023 uint64_t Offset = OffsetBase + Layout.getBaseClassOffset(Base); 1024 classify(i->getType(), Offset, FieldLo, FieldHi); 1025 Lo = merge(Lo, FieldLo); 1026 Hi = merge(Hi, FieldHi); 1027 if (Lo == Memory || Hi == Memory) 1028 break; 1029 } 1030 1031 // If this record has no fields, no bases, no vtable, but isn't empty, 1032 // classify as INTEGER. 1033 if (CXXRD->isEmpty() && Size) 1034 Current = Integer; 1035 } 1036 1037 // Classify the fields one at a time, merging the results. 1038 unsigned idx = 0; 1039 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 1040 i != e; ++i, ++idx) { 1041 uint64_t Offset = OffsetBase + Layout.getFieldOffset(idx); 1042 bool BitField = i->isBitField(); 1043 1044 // AMD64-ABI 3.2.3p2: Rule 1. If ..., or it contains unaligned 1045 // fields, it has class MEMORY. 1046 // 1047 // Note, skip this test for bit-fields, see below. 1048 if (!BitField && Offset % getContext().getTypeAlign(i->getType())) { 1049 Lo = Memory; 1050 return; 1051 } 1052 1053 // Classify this field. 1054 // 1055 // AMD64-ABI 3.2.3p2: Rule 3. If the size of the aggregate 1056 // exceeds a single eightbyte, each is classified 1057 // separately. Each eightbyte gets initialized to class 1058 // NO_CLASS. 1059 Class FieldLo, FieldHi; 1060 1061 // Bit-fields require special handling, they do not force the 1062 // structure to be passed in memory even if unaligned, and 1063 // therefore they can straddle an eightbyte. 1064 if (BitField) { 1065 // Ignore padding bit-fields. 1066 if (i->isUnnamedBitfield()) 1067 continue; 1068 1069 uint64_t Offset = OffsetBase + Layout.getFieldOffset(idx); 1070 uint64_t Size = 1071 i->getBitWidth()->EvaluateAsInt(getContext()).getZExtValue(); 1072 1073 uint64_t EB_Lo = Offset / 64; 1074 uint64_t EB_Hi = (Offset + Size - 1) / 64; 1075 FieldLo = FieldHi = NoClass; 1076 if (EB_Lo) { 1077 assert(EB_Hi == EB_Lo && "Invalid classification, type > 16 bytes."); 1078 FieldLo = NoClass; 1079 FieldHi = Integer; 1080 } else { 1081 FieldLo = Integer; 1082 FieldHi = EB_Hi ? Integer : NoClass; 1083 } 1084 } else 1085 classify(i->getType(), Offset, FieldLo, FieldHi); 1086 Lo = merge(Lo, FieldLo); 1087 Hi = merge(Hi, FieldHi); 1088 if (Lo == Memory || Hi == Memory) 1089 break; 1090 } 1091 1092 // AMD64-ABI 3.2.3p2: Rule 5. Then a post merger cleanup is done: 1093 // 1094 // (a) If one of the classes is MEMORY, the whole argument is 1095 // passed in memory. 1096 // 1097 // (b) If SSEUP is not preceeded by SSE, it is converted to SSE. 1098 1099 // The first of these conditions is guaranteed by how we implement 1100 // the merge (just bail). 1101 // 1102 // The second condition occurs in the case of unions; for example 1103 // union { _Complex double; unsigned; }. 1104 if (Hi == Memory) 1105 Lo = Memory; 1106 if (Hi == SSEUp && Lo != SSE) 1107 Hi = SSE; 1108 } 1109} 1110 1111ABIArgInfo X86_64ABIInfo::getCoerceResult(QualType Ty, 1112 const llvm::Type *CoerceTo) const { 1113 if (isa<llvm::IntegerType>(CoerceTo)) { 1114 // Integer and pointer types will end up in a general purpose 1115 // register. 1116 1117 // Treat an enum type as its underlying type. 1118 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 1119 Ty = EnumTy->getDecl()->getIntegerType(); 1120 1121 if (Ty->isIntegralOrEnumerationType()) 1122 return (Ty->isPromotableIntegerType() ? 1123 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 1124 1125 } 1126 return ABIArgInfo::getDirect(CoerceTo); 1127} 1128 1129ABIArgInfo X86_64ABIInfo::getIndirectReturnResult(QualType Ty) const { 1130 // If this is a scalar LLVM value then assume LLVM will pass it in the right 1131 // place naturally. 1132 if (!CodeGenFunction::hasAggregateLLVMType(Ty)) { 1133 // Treat an enum type as its underlying type. 1134 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 1135 Ty = EnumTy->getDecl()->getIntegerType(); 1136 1137 return (Ty->isPromotableIntegerType() ? 1138 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 1139 } 1140 1141 return ABIArgInfo::getIndirect(0); 1142} 1143 1144ABIArgInfo X86_64ABIInfo::getIndirectResult(QualType Ty) const { 1145 // If this is a scalar LLVM value then assume LLVM will pass it in the right 1146 // place naturally. 1147 if (!CodeGenFunction::hasAggregateLLVMType(Ty)) { 1148 // Treat an enum type as its underlying type. 1149 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 1150 Ty = EnumTy->getDecl()->getIntegerType(); 1151 1152 return (Ty->isPromotableIntegerType() ? 1153 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 1154 } 1155 1156 if (isRecordWithNonTrivialDestructorOrCopyConstructor(Ty)) 1157 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 1158 1159 // Compute the byval alignment. We trust the back-end to honor the 1160 // minimum ABI alignment for byval, to make cleaner IR. 1161 const unsigned MinABIAlign = 8; 1162 unsigned Align = getContext().getTypeAlign(Ty) / 8; 1163 if (Align > MinABIAlign) 1164 return ABIArgInfo::getIndirect(Align); 1165 return ABIArgInfo::getIndirect(0); 1166} 1167 1168/// Get16ByteVectorType - The ABI specifies that a value should be passed in an 1169/// full vector XMM register. Pick an LLVM IR type that will be passed as a 1170/// vector register. 1171const llvm::Type *X86_64ABIInfo::Get16ByteVectorType(QualType Ty) const { 1172 const llvm::Type *IRType = CGT.ConvertTypeRecursive(Ty); 1173 1174 // Wrapper structs that just contain vectors are passed just like vectors, 1175 // strip them off if present. 1176 const llvm::StructType *STy = dyn_cast<llvm::StructType>(IRType); 1177 while (STy && STy->getNumElements() == 1) { 1178 IRType = STy->getElementType(0); 1179 STy = dyn_cast<llvm::StructType>(IRType); 1180 } 1181 1182 // If the preferred type is a 16-byte vector, prefer to pass it. 1183 if (const llvm::VectorType *VT = dyn_cast<llvm::VectorType>(IRType)){ 1184 const llvm::Type *EltTy = VT->getElementType(); 1185 if (VT->getBitWidth() == 128 && 1186 (EltTy->isFloatTy() || EltTy->isDoubleTy() || 1187 EltTy->isIntegerTy(8) || EltTy->isIntegerTy(16) || 1188 EltTy->isIntegerTy(32) || EltTy->isIntegerTy(64) || 1189 EltTy->isIntegerTy(128))) 1190 return VT; 1191 } 1192 1193 return llvm::VectorType::get(llvm::Type::getDoubleTy(getVMContext()), 2); 1194} 1195 1196/// BitsContainNoUserData - Return true if the specified [start,end) bit range 1197/// is known to either be off the end of the specified type or being in 1198/// alignment padding. The user type specified is known to be at most 128 bits 1199/// in size, and have passed through X86_64ABIInfo::classify with a successful 1200/// classification that put one of the two halves in the INTEGER class. 1201/// 1202/// It is conservatively correct to return false. 1203static bool BitsContainNoUserData(QualType Ty, unsigned StartBit, 1204 unsigned EndBit, ASTContext &Context) { 1205 // If the bytes being queried are off the end of the type, there is no user 1206 // data hiding here. This handles analysis of builtins, vectors and other 1207 // types that don't contain interesting padding. 1208 unsigned TySize = (unsigned)Context.getTypeSize(Ty); 1209 if (TySize <= StartBit) 1210 return true; 1211 1212 if (const ConstantArrayType *AT = Context.getAsConstantArrayType(Ty)) { 1213 unsigned EltSize = (unsigned)Context.getTypeSize(AT->getElementType()); 1214 unsigned NumElts = (unsigned)AT->getSize().getZExtValue(); 1215 1216 // Check each element to see if the element overlaps with the queried range. 1217 for (unsigned i = 0; i != NumElts; ++i) { 1218 // If the element is after the span we care about, then we're done.. 1219 unsigned EltOffset = i*EltSize; 1220 if (EltOffset >= EndBit) break; 1221 1222 unsigned EltStart = EltOffset < StartBit ? StartBit-EltOffset :0; 1223 if (!BitsContainNoUserData(AT->getElementType(), EltStart, 1224 EndBit-EltOffset, Context)) 1225 return false; 1226 } 1227 // If it overlaps no elements, then it is safe to process as padding. 1228 return true; 1229 } 1230 1231 if (const RecordType *RT = Ty->getAs<RecordType>()) { 1232 const RecordDecl *RD = RT->getDecl(); 1233 const ASTRecordLayout &Layout = Context.getASTRecordLayout(RD); 1234 1235 // If this is a C++ record, check the bases first. 1236 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) { 1237 for (CXXRecordDecl::base_class_const_iterator i = CXXRD->bases_begin(), 1238 e = CXXRD->bases_end(); i != e; ++i) { 1239 assert(!i->isVirtual() && !i->getType()->isDependentType() && 1240 "Unexpected base class!"); 1241 const CXXRecordDecl *Base = 1242 cast<CXXRecordDecl>(i->getType()->getAs<RecordType>()->getDecl()); 1243 1244 // If the base is after the span we care about, ignore it. 1245 unsigned BaseOffset = (unsigned)Layout.getBaseClassOffset(Base); 1246 if (BaseOffset >= EndBit) continue; 1247 1248 unsigned BaseStart = BaseOffset < StartBit ? StartBit-BaseOffset :0; 1249 if (!BitsContainNoUserData(i->getType(), BaseStart, 1250 EndBit-BaseOffset, Context)) 1251 return false; 1252 } 1253 } 1254 1255 // Verify that no field has data that overlaps the region of interest. Yes 1256 // this could be sped up a lot by being smarter about queried fields, 1257 // however we're only looking at structs up to 16 bytes, so we don't care 1258 // much. 1259 unsigned idx = 0; 1260 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 1261 i != e; ++i, ++idx) { 1262 unsigned FieldOffset = (unsigned)Layout.getFieldOffset(idx); 1263 1264 // If we found a field after the region we care about, then we're done. 1265 if (FieldOffset >= EndBit) break; 1266 1267 unsigned FieldStart = FieldOffset < StartBit ? StartBit-FieldOffset :0; 1268 if (!BitsContainNoUserData(i->getType(), FieldStart, EndBit-FieldOffset, 1269 Context)) 1270 return false; 1271 } 1272 1273 // If nothing in this record overlapped the area of interest, then we're 1274 // clean. 1275 return true; 1276 } 1277 1278 return false; 1279} 1280 1281/// ContainsFloatAtOffset - Return true if the specified LLVM IR type has a 1282/// float member at the specified offset. For example, {int,{float}} has a 1283/// float at offset 4. It is conservatively correct for this routine to return 1284/// false. 1285static bool ContainsFloatAtOffset(const llvm::Type *IRType, unsigned IROffset, 1286 const llvm::TargetData &TD) { 1287 // Base case if we find a float. 1288 if (IROffset == 0 && IRType->isFloatTy()) 1289 return true; 1290 1291 // If this is a struct, recurse into the field at the specified offset. 1292 if (const llvm::StructType *STy = dyn_cast<llvm::StructType>(IRType)) { 1293 const llvm::StructLayout *SL = TD.getStructLayout(STy); 1294 unsigned Elt = SL->getElementContainingOffset(IROffset); 1295 IROffset -= SL->getElementOffset(Elt); 1296 return ContainsFloatAtOffset(STy->getElementType(Elt), IROffset, TD); 1297 } 1298 1299 // If this is an array, recurse into the field at the specified offset. 1300 if (const llvm::ArrayType *ATy = dyn_cast<llvm::ArrayType>(IRType)) { 1301 const llvm::Type *EltTy = ATy->getElementType(); 1302 unsigned EltSize = TD.getTypeAllocSize(EltTy); 1303 IROffset -= IROffset/EltSize*EltSize; 1304 return ContainsFloatAtOffset(EltTy, IROffset, TD); 1305 } 1306 1307 return false; 1308} 1309 1310 1311/// GetSSETypeAtOffset - Return a type that will be passed by the backend in the 1312/// low 8 bytes of an XMM register, corresponding to the SSE class. 1313const llvm::Type *X86_64ABIInfo:: 1314GetSSETypeAtOffset(const llvm::Type *IRType, unsigned IROffset, 1315 QualType SourceTy, unsigned SourceOffset) const { 1316 // The only three choices we have are either double, <2 x float>, or float. We 1317 // pass as float if the last 4 bytes is just padding. This happens for 1318 // structs that contain 3 floats. 1319 if (BitsContainNoUserData(SourceTy, SourceOffset*8+32, 1320 SourceOffset*8+64, getContext())) 1321 return llvm::Type::getFloatTy(getVMContext()); 1322 1323 // We want to pass as <2 x float> if the LLVM IR type contains a float at 1324 // offset+0 and offset+4. Walk the LLVM IR type to find out if this is the 1325 // case. 1326 if (ContainsFloatAtOffset(IRType, IROffset, getTargetData()) && 1327 ContainsFloatAtOffset(IRType, IROffset+4, getTargetData())) { 1328 // FIXME: <2 x float> doesn't pass as one XMM register yet. Don't enable 1329 // this code until it does. 1330 //return llvm::VectorType::get(llvm::Type::getFloatTy(getVMContext()), 2); 1331 1332 } 1333 1334 return llvm::Type::getDoubleTy(getVMContext()); 1335} 1336 1337 1338/// GetINTEGERTypeAtOffset - The ABI specifies that a value should be passed in 1339/// an 8-byte GPR. This means that we either have a scalar or we are talking 1340/// about the high or low part of an up-to-16-byte struct. This routine picks 1341/// the best LLVM IR type to represent this, which may be i64 or may be anything 1342/// else that the backend will pass in a GPR that works better (e.g. i8, %foo*, 1343/// etc). 1344/// 1345/// PrefType is an LLVM IR type that corresponds to (part of) the IR type for 1346/// the source type. IROffset is an offset in bytes into the LLVM IR type that 1347/// the 8-byte value references. PrefType may be null. 1348/// 1349/// SourceTy is the source level type for the entire argument. SourceOffset is 1350/// an offset into this that we're processing (which is always either 0 or 8). 1351/// 1352const llvm::Type *X86_64ABIInfo:: 1353GetINTEGERTypeAtOffset(const llvm::Type *IRType, unsigned IROffset, 1354 QualType SourceTy, unsigned SourceOffset) const { 1355 // If we're dealing with an un-offset LLVM IR type, then it means that we're 1356 // returning an 8-byte unit starting with it. See if we can safely use it. 1357 if (IROffset == 0) { 1358 // Pointers and int64's always fill the 8-byte unit. 1359 if (isa<llvm::PointerType>(IRType) || IRType->isIntegerTy(64)) 1360 return IRType; 1361 1362 // If we have a 1/2/4-byte integer, we can use it only if the rest of the 1363 // goodness in the source type is just tail padding. This is allowed to 1364 // kick in for struct {double,int} on the int, but not on 1365 // struct{double,int,int} because we wouldn't return the second int. We 1366 // have to do this analysis on the source type because we can't depend on 1367 // unions being lowered a specific way etc. 1368 if (IRType->isIntegerTy(8) || IRType->isIntegerTy(16) || 1369 IRType->isIntegerTy(32)) { 1370 unsigned BitWidth = cast<llvm::IntegerType>(IRType)->getBitWidth(); 1371 1372 if (BitsContainNoUserData(SourceTy, SourceOffset*8+BitWidth, 1373 SourceOffset*8+64, getContext())) 1374 return IRType; 1375 } 1376 } 1377 1378 if (const llvm::StructType *STy = dyn_cast<llvm::StructType>(IRType)) { 1379 // If this is a struct, recurse into the field at the specified offset. 1380 const llvm::StructLayout *SL = getTargetData().getStructLayout(STy); 1381 if (IROffset < SL->getSizeInBytes()) { 1382 unsigned FieldIdx = SL->getElementContainingOffset(IROffset); 1383 IROffset -= SL->getElementOffset(FieldIdx); 1384 1385 return GetINTEGERTypeAtOffset(STy->getElementType(FieldIdx), IROffset, 1386 SourceTy, SourceOffset); 1387 } 1388 } 1389 1390 if (const llvm::ArrayType *ATy = dyn_cast<llvm::ArrayType>(IRType)) { 1391 const llvm::Type *EltTy = ATy->getElementType(); 1392 unsigned EltSize = getTargetData().getTypeAllocSize(EltTy); 1393 unsigned EltOffset = IROffset/EltSize*EltSize; 1394 return GetINTEGERTypeAtOffset(EltTy, IROffset-EltOffset, SourceTy, 1395 SourceOffset); 1396 } 1397 1398 // Okay, we don't have any better idea of what to pass, so we pass this in an 1399 // integer register that isn't too big to fit the rest of the struct. 1400 unsigned TySizeInBytes = 1401 (unsigned)getContext().getTypeSizeInChars(SourceTy).getQuantity(); 1402 1403 assert(TySizeInBytes != SourceOffset && "Empty field?"); 1404 1405 // It is always safe to classify this as an integer type up to i64 that 1406 // isn't larger than the structure. 1407 return llvm::IntegerType::get(getVMContext(), 1408 std::min(TySizeInBytes-SourceOffset, 8U)*8); 1409} 1410 1411ABIArgInfo X86_64ABIInfo:: 1412classifyReturnType(QualType RetTy) const { 1413 // AMD64-ABI 3.2.3p4: Rule 1. Classify the return type with the 1414 // classification algorithm. 1415 X86_64ABIInfo::Class Lo, Hi; 1416 classify(RetTy, 0, Lo, Hi); 1417 1418 // Check some invariants. 1419 assert((Hi != Memory || Lo == Memory) && "Invalid memory classification."); 1420 assert((Lo != NoClass || Hi == NoClass) && "Invalid null classification."); 1421 assert((Hi != SSEUp || Lo == SSE) && "Invalid SSEUp classification."); 1422 1423 const llvm::Type *ResType = 0; 1424 switch (Lo) { 1425 case NoClass: 1426 return ABIArgInfo::getIgnore(); 1427 1428 case SSEUp: 1429 case X87Up: 1430 assert(0 && "Invalid classification for lo word."); 1431 1432 // AMD64-ABI 3.2.3p4: Rule 2. Types of class memory are returned via 1433 // hidden argument. 1434 case Memory: 1435 return getIndirectReturnResult(RetTy); 1436 1437 // AMD64-ABI 3.2.3p4: Rule 3. If the class is INTEGER, the next 1438 // available register of the sequence %rax, %rdx is used. 1439 case Integer: 1440 ResType = GetINTEGERTypeAtOffset(CGT.ConvertTypeRecursive(RetTy), 0, 1441 RetTy, 0); 1442 break; 1443 1444 // AMD64-ABI 3.2.3p4: Rule 4. If the class is SSE, the next 1445 // available SSE register of the sequence %xmm0, %xmm1 is used. 1446 case SSE: 1447 ResType = GetSSETypeAtOffset(CGT.ConvertTypeRecursive(RetTy), 0, RetTy, 0); 1448 break; 1449 1450 // AMD64-ABI 3.2.3p4: Rule 6. If the class is X87, the value is 1451 // returned on the X87 stack in %st0 as 80-bit x87 number. 1452 case X87: 1453 ResType = llvm::Type::getX86_FP80Ty(getVMContext()); 1454 break; 1455 1456 // AMD64-ABI 3.2.3p4: Rule 8. If the class is COMPLEX_X87, the real 1457 // part of the value is returned in %st0 and the imaginary part in 1458 // %st1. 1459 case ComplexX87: 1460 assert(Hi == ComplexX87 && "Unexpected ComplexX87 classification."); 1461 ResType = llvm::StructType::get(getVMContext(), 1462 llvm::Type::getX86_FP80Ty(getVMContext()), 1463 llvm::Type::getX86_FP80Ty(getVMContext()), 1464 NULL); 1465 break; 1466 } 1467 1468 switch (Hi) { 1469 // Memory was handled previously and X87 should 1470 // never occur as a hi class. 1471 case Memory: 1472 case X87: 1473 assert(0 && "Invalid classification for hi word."); 1474 1475 case ComplexX87: // Previously handled. 1476 case NoClass: 1477 break; 1478 1479 case Integer: { 1480 const llvm::Type *HiType = 1481 GetINTEGERTypeAtOffset(CGT.ConvertTypeRecursive(RetTy), 8, RetTy, 8); 1482 ResType = llvm::StructType::get(getVMContext(), ResType, HiType, NULL); 1483 break; 1484 } 1485 case SSE: { 1486 const llvm::Type *HiType = 1487 GetSSETypeAtOffset(CGT.ConvertTypeRecursive(RetTy), 8, RetTy, 8); 1488 ResType = llvm::StructType::get(getVMContext(), ResType, HiType,NULL); 1489 break; 1490 } 1491 1492 // AMD64-ABI 3.2.3p4: Rule 5. If the class is SSEUP, the eightbyte 1493 // is passed in the upper half of the last used SSE register. 1494 // 1495 // SSEUP should always be preceeded by SSE, just widen. 1496 case SSEUp: 1497 assert(Lo == SSE && "Unexpected SSEUp classification."); 1498 ResType = Get16ByteVectorType(RetTy); 1499 break; 1500 1501 // AMD64-ABI 3.2.3p4: Rule 7. If the class is X87UP, the value is 1502 // returned together with the previous X87 value in %st0. 1503 case X87Up: 1504 // If X87Up is preceeded by X87, we don't need to do 1505 // anything. However, in some cases with unions it may not be 1506 // preceeded by X87. In such situations we follow gcc and pass the 1507 // extra bits in an SSE reg. 1508 if (Lo != X87) { 1509 const llvm::Type *HiType = 1510 GetSSETypeAtOffset(CGT.ConvertTypeRecursive(RetTy), 8, RetTy, 8); 1511 ResType = llvm::StructType::get(getVMContext(), ResType, HiType, NULL); 1512 } 1513 break; 1514 } 1515 1516 return getCoerceResult(RetTy, ResType); 1517} 1518 1519ABIArgInfo X86_64ABIInfo::classifyArgumentType(QualType Ty, unsigned &neededInt, 1520 unsigned &neededSSE) const { 1521 X86_64ABIInfo::Class Lo, Hi; 1522 classify(Ty, 0, Lo, Hi); 1523 1524 // Check some invariants. 1525 // FIXME: Enforce these by construction. 1526 assert((Hi != Memory || Lo == Memory) && "Invalid memory classification."); 1527 assert((Lo != NoClass || Hi == NoClass) && "Invalid null classification."); 1528 assert((Hi != SSEUp || Lo == SSE) && "Invalid SSEUp classification."); 1529 1530 neededInt = 0; 1531 neededSSE = 0; 1532 const llvm::Type *ResType = 0; 1533 switch (Lo) { 1534 case NoClass: 1535 return ABIArgInfo::getIgnore(); 1536 1537 // AMD64-ABI 3.2.3p3: Rule 1. If the class is MEMORY, pass the argument 1538 // on the stack. 1539 case Memory: 1540 1541 // AMD64-ABI 3.2.3p3: Rule 5. If the class is X87, X87UP or 1542 // COMPLEX_X87, it is passed in memory. 1543 case X87: 1544 case ComplexX87: 1545 return getIndirectResult(Ty); 1546 1547 case SSEUp: 1548 case X87Up: 1549 assert(0 && "Invalid classification for lo word."); 1550 1551 // AMD64-ABI 3.2.3p3: Rule 2. If the class is INTEGER, the next 1552 // available register of the sequence %rdi, %rsi, %rdx, %rcx, %r8 1553 // and %r9 is used. 1554 case Integer: 1555 ++neededInt; 1556 1557 // Pick an 8-byte type based on the preferred type. 1558 ResType = GetINTEGERTypeAtOffset(CGT.ConvertTypeRecursive(Ty), 0, Ty, 0); 1559 break; 1560 1561 // AMD64-ABI 3.2.3p3: Rule 3. If the class is SSE, the next 1562 // available SSE register is used, the registers are taken in the 1563 // order from %xmm0 to %xmm7. 1564 case SSE: 1565 ++neededSSE; 1566 ResType = GetSSETypeAtOffset(CGT.ConvertTypeRecursive(Ty), 0, Ty, 0); 1567 break; 1568 } 1569 1570 switch (Hi) { 1571 // Memory was handled previously, ComplexX87 and X87 should 1572 // never occur as hi classes, and X87Up must be preceed by X87, 1573 // which is passed in memory. 1574 case Memory: 1575 case X87: 1576 case ComplexX87: 1577 assert(0 && "Invalid classification for hi word."); 1578 break; 1579 1580 case NoClass: break; 1581 1582 case Integer: { 1583 ++neededInt; 1584 // Pick an 8-byte type based on the preferred type. 1585 const llvm::Type *HiType = 1586 GetINTEGERTypeAtOffset(CGT.ConvertTypeRecursive(Ty), 8, Ty, 8); 1587 ResType = llvm::StructType::get(getVMContext(), ResType, HiType, NULL); 1588 break; 1589 } 1590 1591 // X87Up generally doesn't occur here (long double is passed in 1592 // memory), except in situations involving unions. 1593 case X87Up: 1594 case SSE: { 1595 const llvm::Type *HiType = 1596 GetSSETypeAtOffset(CGT.ConvertTypeRecursive(Ty), 8, Ty, 8); 1597 ResType = llvm::StructType::get(getVMContext(), ResType, HiType, NULL); 1598 ++neededSSE; 1599 break; 1600 } 1601 1602 // AMD64-ABI 3.2.3p3: Rule 4. If the class is SSEUP, the 1603 // eightbyte is passed in the upper half of the last used SSE 1604 // register. This only happens when 128-bit vectors are passed. 1605 case SSEUp: 1606 assert(Lo == SSE && "Unexpected SSEUp classification"); 1607 ResType = Get16ByteVectorType(Ty); 1608 break; 1609 } 1610 1611 return getCoerceResult(Ty, ResType); 1612} 1613 1614void X86_64ABIInfo::computeInfo(CGFunctionInfo &FI) const { 1615 1616 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 1617 1618 // Keep track of the number of assigned registers. 1619 unsigned freeIntRegs = 6, freeSSERegs = 8; 1620 1621 // If the return value is indirect, then the hidden argument is consuming one 1622 // integer register. 1623 if (FI.getReturnInfo().isIndirect()) 1624 --freeIntRegs; 1625 1626 // AMD64-ABI 3.2.3p3: Once arguments are classified, the registers 1627 // get assigned (in left-to-right order) for passing as follows... 1628 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 1629 it != ie; ++it) { 1630 unsigned neededInt, neededSSE; 1631 it->info = classifyArgumentType(it->type, neededInt, neededSSE); 1632 1633 // AMD64-ABI 3.2.3p3: If there are no registers available for any 1634 // eightbyte of an argument, the whole argument is passed on the 1635 // stack. If registers have already been assigned for some 1636 // eightbytes of such an argument, the assignments get reverted. 1637 if (freeIntRegs >= neededInt && freeSSERegs >= neededSSE) { 1638 freeIntRegs -= neededInt; 1639 freeSSERegs -= neededSSE; 1640 } else { 1641 it->info = getIndirectResult(it->type); 1642 } 1643 } 1644} 1645 1646static llvm::Value *EmitVAArgFromMemory(llvm::Value *VAListAddr, 1647 QualType Ty, 1648 CodeGenFunction &CGF) { 1649 llvm::Value *overflow_arg_area_p = 1650 CGF.Builder.CreateStructGEP(VAListAddr, 2, "overflow_arg_area_p"); 1651 llvm::Value *overflow_arg_area = 1652 CGF.Builder.CreateLoad(overflow_arg_area_p, "overflow_arg_area"); 1653 1654 // AMD64-ABI 3.5.7p5: Step 7. Align l->overflow_arg_area upwards to a 16 1655 // byte boundary if alignment needed by type exceeds 8 byte boundary. 1656 uint64_t Align = CGF.getContext().getTypeAlign(Ty) / 8; 1657 if (Align > 8) { 1658 // Note that we follow the ABI & gcc here, even though the type 1659 // could in theory have an alignment greater than 16. This case 1660 // shouldn't ever matter in practice. 1661 1662 // overflow_arg_area = (overflow_arg_area + 15) & ~15; 1663 llvm::Value *Offset = 1664 llvm::ConstantInt::get(CGF.Int32Ty, 15); 1665 overflow_arg_area = CGF.Builder.CreateGEP(overflow_arg_area, Offset); 1666 llvm::Value *AsInt = CGF.Builder.CreatePtrToInt(overflow_arg_area, 1667 CGF.Int64Ty); 1668 llvm::Value *Mask = llvm::ConstantInt::get(CGF.Int64Ty, ~15LL); 1669 overflow_arg_area = 1670 CGF.Builder.CreateIntToPtr(CGF.Builder.CreateAnd(AsInt, Mask), 1671 overflow_arg_area->getType(), 1672 "overflow_arg_area.align"); 1673 } 1674 1675 // AMD64-ABI 3.5.7p5: Step 8. Fetch type from l->overflow_arg_area. 1676 const llvm::Type *LTy = CGF.ConvertTypeForMem(Ty); 1677 llvm::Value *Res = 1678 CGF.Builder.CreateBitCast(overflow_arg_area, 1679 llvm::PointerType::getUnqual(LTy)); 1680 1681 // AMD64-ABI 3.5.7p5: Step 9. Set l->overflow_arg_area to: 1682 // l->overflow_arg_area + sizeof(type). 1683 // AMD64-ABI 3.5.7p5: Step 10. Align l->overflow_arg_area upwards to 1684 // an 8 byte boundary. 1685 1686 uint64_t SizeInBytes = (CGF.getContext().getTypeSize(Ty) + 7) / 8; 1687 llvm::Value *Offset = 1688 llvm::ConstantInt::get(CGF.Int32Ty, (SizeInBytes + 7) & ~7); 1689 overflow_arg_area = CGF.Builder.CreateGEP(overflow_arg_area, Offset, 1690 "overflow_arg_area.next"); 1691 CGF.Builder.CreateStore(overflow_arg_area, overflow_arg_area_p); 1692 1693 // AMD64-ABI 3.5.7p5: Step 11. Return the fetched type. 1694 return Res; 1695} 1696 1697llvm::Value *X86_64ABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 1698 CodeGenFunction &CGF) const { 1699 llvm::LLVMContext &VMContext = CGF.getLLVMContext(); 1700 1701 // Assume that va_list type is correct; should be pointer to LLVM type: 1702 // struct { 1703 // i32 gp_offset; 1704 // i32 fp_offset; 1705 // i8* overflow_arg_area; 1706 // i8* reg_save_area; 1707 // }; 1708 unsigned neededInt, neededSSE; 1709 1710 Ty = CGF.getContext().getCanonicalType(Ty); 1711 ABIArgInfo AI = classifyArgumentType(Ty, neededInt, neededSSE); 1712 1713 // AMD64-ABI 3.5.7p5: Step 1. Determine whether type may be passed 1714 // in the registers. If not go to step 7. 1715 if (!neededInt && !neededSSE) 1716 return EmitVAArgFromMemory(VAListAddr, Ty, CGF); 1717 1718 // AMD64-ABI 3.5.7p5: Step 2. Compute num_gp to hold the number of 1719 // general purpose registers needed to pass type and num_fp to hold 1720 // the number of floating point registers needed. 1721 1722 // AMD64-ABI 3.5.7p5: Step 3. Verify whether arguments fit into 1723 // registers. In the case: l->gp_offset > 48 - num_gp * 8 or 1724 // l->fp_offset > 304 - num_fp * 16 go to step 7. 1725 // 1726 // NOTE: 304 is a typo, there are (6 * 8 + 8 * 16) = 176 bytes of 1727 // register save space). 1728 1729 llvm::Value *InRegs = 0; 1730 llvm::Value *gp_offset_p = 0, *gp_offset = 0; 1731 llvm::Value *fp_offset_p = 0, *fp_offset = 0; 1732 if (neededInt) { 1733 gp_offset_p = CGF.Builder.CreateStructGEP(VAListAddr, 0, "gp_offset_p"); 1734 gp_offset = CGF.Builder.CreateLoad(gp_offset_p, "gp_offset"); 1735 InRegs = llvm::ConstantInt::get(CGF.Int32Ty, 48 - neededInt * 8); 1736 InRegs = CGF.Builder.CreateICmpULE(gp_offset, InRegs, "fits_in_gp"); 1737 } 1738 1739 if (neededSSE) { 1740 fp_offset_p = CGF.Builder.CreateStructGEP(VAListAddr, 1, "fp_offset_p"); 1741 fp_offset = CGF.Builder.CreateLoad(fp_offset_p, "fp_offset"); 1742 llvm::Value *FitsInFP = 1743 llvm::ConstantInt::get(CGF.Int32Ty, 176 - neededSSE * 16); 1744 FitsInFP = CGF.Builder.CreateICmpULE(fp_offset, FitsInFP, "fits_in_fp"); 1745 InRegs = InRegs ? CGF.Builder.CreateAnd(InRegs, FitsInFP) : FitsInFP; 1746 } 1747 1748 llvm::BasicBlock *InRegBlock = CGF.createBasicBlock("vaarg.in_reg"); 1749 llvm::BasicBlock *InMemBlock = CGF.createBasicBlock("vaarg.in_mem"); 1750 llvm::BasicBlock *ContBlock = CGF.createBasicBlock("vaarg.end"); 1751 CGF.Builder.CreateCondBr(InRegs, InRegBlock, InMemBlock); 1752 1753 // Emit code to load the value if it was passed in registers. 1754 1755 CGF.EmitBlock(InRegBlock); 1756 1757 // AMD64-ABI 3.5.7p5: Step 4. Fetch type from l->reg_save_area with 1758 // an offset of l->gp_offset and/or l->fp_offset. This may require 1759 // copying to a temporary location in case the parameter is passed 1760 // in different register classes or requires an alignment greater 1761 // than 8 for general purpose registers and 16 for XMM registers. 1762 // 1763 // FIXME: This really results in shameful code when we end up needing to 1764 // collect arguments from different places; often what should result in a 1765 // simple assembling of a structure from scattered addresses has many more 1766 // loads than necessary. Can we clean this up? 1767 const llvm::Type *LTy = CGF.ConvertTypeForMem(Ty); 1768 llvm::Value *RegAddr = 1769 CGF.Builder.CreateLoad(CGF.Builder.CreateStructGEP(VAListAddr, 3), 1770 "reg_save_area"); 1771 if (neededInt && neededSSE) { 1772 // FIXME: Cleanup. 1773 assert(AI.isDirect() && "Unexpected ABI info for mixed regs"); 1774 const llvm::StructType *ST = cast<llvm::StructType>(AI.getCoerceToType()); 1775 llvm::Value *Tmp = CGF.CreateTempAlloca(ST); 1776 assert(ST->getNumElements() == 2 && "Unexpected ABI info for mixed regs"); 1777 const llvm::Type *TyLo = ST->getElementType(0); 1778 const llvm::Type *TyHi = ST->getElementType(1); 1779 assert((TyLo->isFloatingPointTy() ^ TyHi->isFloatingPointTy()) && 1780 "Unexpected ABI info for mixed regs"); 1781 const llvm::Type *PTyLo = llvm::PointerType::getUnqual(TyLo); 1782 const llvm::Type *PTyHi = llvm::PointerType::getUnqual(TyHi); 1783 llvm::Value *GPAddr = CGF.Builder.CreateGEP(RegAddr, gp_offset); 1784 llvm::Value *FPAddr = CGF.Builder.CreateGEP(RegAddr, fp_offset); 1785 llvm::Value *RegLoAddr = TyLo->isFloatingPointTy() ? FPAddr : GPAddr; 1786 llvm::Value *RegHiAddr = TyLo->isFloatingPointTy() ? GPAddr : FPAddr; 1787 llvm::Value *V = 1788 CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegLoAddr, PTyLo)); 1789 CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 0)); 1790 V = CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegHiAddr, PTyHi)); 1791 CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 1)); 1792 1793 RegAddr = CGF.Builder.CreateBitCast(Tmp, 1794 llvm::PointerType::getUnqual(LTy)); 1795 } else if (neededInt) { 1796 RegAddr = CGF.Builder.CreateGEP(RegAddr, gp_offset); 1797 RegAddr = CGF.Builder.CreateBitCast(RegAddr, 1798 llvm::PointerType::getUnqual(LTy)); 1799 } else if (neededSSE == 1) { 1800 RegAddr = CGF.Builder.CreateGEP(RegAddr, fp_offset); 1801 RegAddr = CGF.Builder.CreateBitCast(RegAddr, 1802 llvm::PointerType::getUnqual(LTy)); 1803 } else { 1804 assert(neededSSE == 2 && "Invalid number of needed registers!"); 1805 // SSE registers are spaced 16 bytes apart in the register save 1806 // area, we need to collect the two eightbytes together. 1807 llvm::Value *RegAddrLo = CGF.Builder.CreateGEP(RegAddr, fp_offset); 1808 llvm::Value *RegAddrHi = CGF.Builder.CreateConstGEP1_32(RegAddrLo, 16); 1809 const llvm::Type *DoubleTy = llvm::Type::getDoubleTy(VMContext); 1810 const llvm::Type *DblPtrTy = 1811 llvm::PointerType::getUnqual(DoubleTy); 1812 const llvm::StructType *ST = llvm::StructType::get(VMContext, DoubleTy, 1813 DoubleTy, NULL); 1814 llvm::Value *V, *Tmp = CGF.CreateTempAlloca(ST); 1815 V = CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegAddrLo, 1816 DblPtrTy)); 1817 CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 0)); 1818 V = CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegAddrHi, 1819 DblPtrTy)); 1820 CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 1)); 1821 RegAddr = CGF.Builder.CreateBitCast(Tmp, 1822 llvm::PointerType::getUnqual(LTy)); 1823 } 1824 1825 // AMD64-ABI 3.5.7p5: Step 5. Set: 1826 // l->gp_offset = l->gp_offset + num_gp * 8 1827 // l->fp_offset = l->fp_offset + num_fp * 16. 1828 if (neededInt) { 1829 llvm::Value *Offset = llvm::ConstantInt::get(CGF.Int32Ty, neededInt * 8); 1830 CGF.Builder.CreateStore(CGF.Builder.CreateAdd(gp_offset, Offset), 1831 gp_offset_p); 1832 } 1833 if (neededSSE) { 1834 llvm::Value *Offset = llvm::ConstantInt::get(CGF.Int32Ty, neededSSE * 16); 1835 CGF.Builder.CreateStore(CGF.Builder.CreateAdd(fp_offset, Offset), 1836 fp_offset_p); 1837 } 1838 CGF.EmitBranch(ContBlock); 1839 1840 // Emit code to load the value if it was passed in memory. 1841 1842 CGF.EmitBlock(InMemBlock); 1843 llvm::Value *MemAddr = EmitVAArgFromMemory(VAListAddr, Ty, CGF); 1844 1845 // Return the appropriate result. 1846 1847 CGF.EmitBlock(ContBlock); 1848 llvm::PHINode *ResAddr = CGF.Builder.CreatePHI(RegAddr->getType(), 1849 "vaarg.addr"); 1850 ResAddr->reserveOperandSpace(2); 1851 ResAddr->addIncoming(RegAddr, InRegBlock); 1852 ResAddr->addIncoming(MemAddr, InMemBlock); 1853 return ResAddr; 1854} 1855 1856 1857 1858//===----------------------------------------------------------------------===// 1859// PIC16 ABI Implementation 1860//===----------------------------------------------------------------------===// 1861 1862namespace { 1863 1864class PIC16ABIInfo : public ABIInfo { 1865public: 1866 PIC16ABIInfo(CodeGenTypes &CGT) : ABIInfo(CGT) {} 1867 1868 ABIArgInfo classifyReturnType(QualType RetTy) const; 1869 1870 ABIArgInfo classifyArgumentType(QualType RetTy) const; 1871 1872 virtual void computeInfo(CGFunctionInfo &FI) const { 1873 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 1874 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 1875 it != ie; ++it) 1876 it->info = classifyArgumentType(it->type); 1877 } 1878 1879 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 1880 CodeGenFunction &CGF) const; 1881}; 1882 1883class PIC16TargetCodeGenInfo : public TargetCodeGenInfo { 1884public: 1885 PIC16TargetCodeGenInfo(CodeGenTypes &CGT) 1886 : TargetCodeGenInfo(new PIC16ABIInfo(CGT)) {} 1887}; 1888 1889} 1890 1891ABIArgInfo PIC16ABIInfo::classifyReturnType(QualType RetTy) const { 1892 if (RetTy->isVoidType()) { 1893 return ABIArgInfo::getIgnore(); 1894 } else { 1895 return ABIArgInfo::getDirect(); 1896 } 1897} 1898 1899ABIArgInfo PIC16ABIInfo::classifyArgumentType(QualType Ty) const { 1900 return ABIArgInfo::getDirect(); 1901} 1902 1903llvm::Value *PIC16ABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 1904 CodeGenFunction &CGF) const { 1905 const llvm::Type *BP = llvm::Type::getInt8PtrTy(CGF.getLLVMContext()); 1906 const llvm::Type *BPP = llvm::PointerType::getUnqual(BP); 1907 1908 CGBuilderTy &Builder = CGF.Builder; 1909 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP, 1910 "ap"); 1911 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur"); 1912 llvm::Type *PTy = 1913 llvm::PointerType::getUnqual(CGF.ConvertType(Ty)); 1914 llvm::Value *AddrTyped = Builder.CreateBitCast(Addr, PTy); 1915 1916 uint64_t Offset = CGF.getContext().getTypeSize(Ty) / 8; 1917 1918 llvm::Value *NextAddr = 1919 Builder.CreateGEP(Addr, llvm::ConstantInt::get( 1920 llvm::Type::getInt32Ty(CGF.getLLVMContext()), Offset), 1921 "ap.next"); 1922 Builder.CreateStore(NextAddr, VAListAddrAsBPP); 1923 1924 return AddrTyped; 1925} 1926 1927 1928// PowerPC-32 1929 1930namespace { 1931class PPC32TargetCodeGenInfo : public DefaultTargetCodeGenInfo { 1932public: 1933 PPC32TargetCodeGenInfo(CodeGenTypes &CGT) : DefaultTargetCodeGenInfo(CGT) {} 1934 1935 int getDwarfEHStackPointer(CodeGen::CodeGenModule &M) const { 1936 // This is recovered from gcc output. 1937 return 1; // r1 is the dedicated stack pointer 1938 } 1939 1940 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 1941 llvm::Value *Address) const; 1942}; 1943 1944} 1945 1946bool 1947PPC32TargetCodeGenInfo::initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 1948 llvm::Value *Address) const { 1949 // This is calculated from the LLVM and GCC tables and verified 1950 // against gcc output. AFAIK all ABIs use the same encoding. 1951 1952 CodeGen::CGBuilderTy &Builder = CGF.Builder; 1953 llvm::LLVMContext &Context = CGF.getLLVMContext(); 1954 1955 const llvm::IntegerType *i8 = llvm::Type::getInt8Ty(Context); 1956 llvm::Value *Four8 = llvm::ConstantInt::get(i8, 4); 1957 llvm::Value *Eight8 = llvm::ConstantInt::get(i8, 8); 1958 llvm::Value *Sixteen8 = llvm::ConstantInt::get(i8, 16); 1959 1960 // 0-31: r0-31, the 4-byte general-purpose registers 1961 AssignToArrayRange(Builder, Address, Four8, 0, 31); 1962 1963 // 32-63: fp0-31, the 8-byte floating-point registers 1964 AssignToArrayRange(Builder, Address, Eight8, 32, 63); 1965 1966 // 64-76 are various 4-byte special-purpose registers: 1967 // 64: mq 1968 // 65: lr 1969 // 66: ctr 1970 // 67: ap 1971 // 68-75 cr0-7 1972 // 76: xer 1973 AssignToArrayRange(Builder, Address, Four8, 64, 76); 1974 1975 // 77-108: v0-31, the 16-byte vector registers 1976 AssignToArrayRange(Builder, Address, Sixteen8, 77, 108); 1977 1978 // 109: vrsave 1979 // 110: vscr 1980 // 111: spe_acc 1981 // 112: spefscr 1982 // 113: sfp 1983 AssignToArrayRange(Builder, Address, Four8, 109, 113); 1984 1985 return false; 1986} 1987 1988 1989//===----------------------------------------------------------------------===// 1990// ARM ABI Implementation 1991//===----------------------------------------------------------------------===// 1992 1993namespace { 1994 1995class ARMABIInfo : public ABIInfo { 1996public: 1997 enum ABIKind { 1998 APCS = 0, 1999 AAPCS = 1, 2000 AAPCS_VFP 2001 }; 2002 2003private: 2004 ABIKind Kind; 2005 2006public: 2007 ARMABIInfo(CodeGenTypes &CGT, ABIKind _Kind) : ABIInfo(CGT), Kind(_Kind) {} 2008 2009private: 2010 ABIKind getABIKind() const { return Kind; } 2011 2012 ABIArgInfo classifyReturnType(QualType RetTy) const; 2013 ABIArgInfo classifyArgumentType(QualType RetTy) const; 2014 2015 virtual void computeInfo(CGFunctionInfo &FI) const; 2016 2017 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 2018 CodeGenFunction &CGF) const; 2019}; 2020 2021class ARMTargetCodeGenInfo : public TargetCodeGenInfo { 2022public: 2023 ARMTargetCodeGenInfo(CodeGenTypes &CGT, ARMABIInfo::ABIKind K) 2024 :TargetCodeGenInfo(new ARMABIInfo(CGT, K)) {} 2025 2026 int getDwarfEHStackPointer(CodeGen::CodeGenModule &M) const { 2027 return 13; 2028 } 2029}; 2030 2031} 2032 2033void ARMABIInfo::computeInfo(CGFunctionInfo &FI) const { 2034 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 2035 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 2036 it != ie; ++it) 2037 it->info = classifyArgumentType(it->type); 2038 2039 const llvm::Triple &Triple(getContext().Target.getTriple()); 2040 llvm::CallingConv::ID DefaultCC; 2041 if (Triple.getEnvironmentName() == "gnueabi" || 2042 Triple.getEnvironmentName() == "eabi") 2043 DefaultCC = llvm::CallingConv::ARM_AAPCS; 2044 else 2045 DefaultCC = llvm::CallingConv::ARM_APCS; 2046 2047 switch (getABIKind()) { 2048 case APCS: 2049 if (DefaultCC != llvm::CallingConv::ARM_APCS) 2050 FI.setEffectiveCallingConvention(llvm::CallingConv::ARM_APCS); 2051 break; 2052 2053 case AAPCS: 2054 if (DefaultCC != llvm::CallingConv::ARM_AAPCS) 2055 FI.setEffectiveCallingConvention(llvm::CallingConv::ARM_AAPCS); 2056 break; 2057 2058 case AAPCS_VFP: 2059 FI.setEffectiveCallingConvention(llvm::CallingConv::ARM_AAPCS_VFP); 2060 break; 2061 } 2062} 2063 2064ABIArgInfo ARMABIInfo::classifyArgumentType(QualType Ty) const { 2065 if (!CodeGenFunction::hasAggregateLLVMType(Ty)) { 2066 // Treat an enum type as its underlying type. 2067 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 2068 Ty = EnumTy->getDecl()->getIntegerType(); 2069 2070 return (Ty->isPromotableIntegerType() ? 2071 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 2072 } 2073 2074 // Ignore empty records. 2075 if (isEmptyRecord(getContext(), Ty, true)) 2076 return ABIArgInfo::getIgnore(); 2077 2078 // Structures with either a non-trivial destructor or a non-trivial 2079 // copy constructor are always indirect. 2080 if (isRecordWithNonTrivialDestructorOrCopyConstructor(Ty)) 2081 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 2082 2083 // FIXME: This is kind of nasty... but there isn't much choice because the ARM 2084 // backend doesn't support byval. 2085 // FIXME: This doesn't handle alignment > 64 bits. 2086 const llvm::Type* ElemTy; 2087 unsigned SizeRegs; 2088 if (getContext().getTypeAlign(Ty) > 32) { 2089 ElemTy = llvm::Type::getInt64Ty(getVMContext()); 2090 SizeRegs = (getContext().getTypeSize(Ty) + 63) / 64; 2091 } else { 2092 ElemTy = llvm::Type::getInt32Ty(getVMContext()); 2093 SizeRegs = (getContext().getTypeSize(Ty) + 31) / 32; 2094 } 2095 std::vector<const llvm::Type*> LLVMFields; 2096 LLVMFields.push_back(llvm::ArrayType::get(ElemTy, SizeRegs)); 2097 const llvm::Type* STy = llvm::StructType::get(getVMContext(), LLVMFields, 2098 true); 2099 return ABIArgInfo::getDirect(STy); 2100} 2101 2102static bool isIntegerLikeType(QualType Ty, ASTContext &Context, 2103 llvm::LLVMContext &VMContext) { 2104 // APCS, C Language Calling Conventions, Non-Simple Return Values: A structure 2105 // is called integer-like if its size is less than or equal to one word, and 2106 // the offset of each of its addressable sub-fields is zero. 2107 2108 uint64_t Size = Context.getTypeSize(Ty); 2109 2110 // Check that the type fits in a word. 2111 if (Size > 32) 2112 return false; 2113 2114 // FIXME: Handle vector types! 2115 if (Ty->isVectorType()) 2116 return false; 2117 2118 // Float types are never treated as "integer like". 2119 if (Ty->isRealFloatingType()) 2120 return false; 2121 2122 // If this is a builtin or pointer type then it is ok. 2123 if (Ty->getAs<BuiltinType>() || Ty->isPointerType()) 2124 return true; 2125 2126 // Small complex integer types are "integer like". 2127 if (const ComplexType *CT = Ty->getAs<ComplexType>()) 2128 return isIntegerLikeType(CT->getElementType(), Context, VMContext); 2129 2130 // Single element and zero sized arrays should be allowed, by the definition 2131 // above, but they are not. 2132 2133 // Otherwise, it must be a record type. 2134 const RecordType *RT = Ty->getAs<RecordType>(); 2135 if (!RT) return false; 2136 2137 // Ignore records with flexible arrays. 2138 const RecordDecl *RD = RT->getDecl(); 2139 if (RD->hasFlexibleArrayMember()) 2140 return false; 2141 2142 // Check that all sub-fields are at offset 0, and are themselves "integer 2143 // like". 2144 const ASTRecordLayout &Layout = Context.getASTRecordLayout(RD); 2145 2146 bool HadField = false; 2147 unsigned idx = 0; 2148 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 2149 i != e; ++i, ++idx) { 2150 const FieldDecl *FD = *i; 2151 2152 // Bit-fields are not addressable, we only need to verify they are "integer 2153 // like". We still have to disallow a subsequent non-bitfield, for example: 2154 // struct { int : 0; int x } 2155 // is non-integer like according to gcc. 2156 if (FD->isBitField()) { 2157 if (!RD->isUnion()) 2158 HadField = true; 2159 2160 if (!isIntegerLikeType(FD->getType(), Context, VMContext)) 2161 return false; 2162 2163 continue; 2164 } 2165 2166 // Check if this field is at offset 0. 2167 if (Layout.getFieldOffset(idx) != 0) 2168 return false; 2169 2170 if (!isIntegerLikeType(FD->getType(), Context, VMContext)) 2171 return false; 2172 2173 // Only allow at most one field in a structure. This doesn't match the 2174 // wording above, but follows gcc in situations with a field following an 2175 // empty structure. 2176 if (!RD->isUnion()) { 2177 if (HadField) 2178 return false; 2179 2180 HadField = true; 2181 } 2182 } 2183 2184 return true; 2185} 2186 2187ABIArgInfo ARMABIInfo::classifyReturnType(QualType RetTy) const { 2188 if (RetTy->isVoidType()) 2189 return ABIArgInfo::getIgnore(); 2190 2191 if (!CodeGenFunction::hasAggregateLLVMType(RetTy)) { 2192 // Treat an enum type as its underlying type. 2193 if (const EnumType *EnumTy = RetTy->getAs<EnumType>()) 2194 RetTy = EnumTy->getDecl()->getIntegerType(); 2195 2196 return (RetTy->isPromotableIntegerType() ? 2197 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 2198 } 2199 2200 // Structures with either a non-trivial destructor or a non-trivial 2201 // copy constructor are always indirect. 2202 if (isRecordWithNonTrivialDestructorOrCopyConstructor(RetTy)) 2203 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 2204 2205 // Are we following APCS? 2206 if (getABIKind() == APCS) { 2207 if (isEmptyRecord(getContext(), RetTy, false)) 2208 return ABIArgInfo::getIgnore(); 2209 2210 // Complex types are all returned as packed integers. 2211 // 2212 // FIXME: Consider using 2 x vector types if the back end handles them 2213 // correctly. 2214 if (RetTy->isAnyComplexType()) 2215 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(), 2216 getContext().getTypeSize(RetTy))); 2217 2218 // Integer like structures are returned in r0. 2219 if (isIntegerLikeType(RetTy, getContext(), getVMContext())) { 2220 // Return in the smallest viable integer type. 2221 uint64_t Size = getContext().getTypeSize(RetTy); 2222 if (Size <= 8) 2223 return ABIArgInfo::getDirect(llvm::Type::getInt8Ty(getVMContext())); 2224 if (Size <= 16) 2225 return ABIArgInfo::getDirect(llvm::Type::getInt16Ty(getVMContext())); 2226 return ABIArgInfo::getDirect(llvm::Type::getInt32Ty(getVMContext())); 2227 } 2228 2229 // Otherwise return in memory. 2230 return ABIArgInfo::getIndirect(0); 2231 } 2232 2233 // Otherwise this is an AAPCS variant. 2234 2235 if (isEmptyRecord(getContext(), RetTy, true)) 2236 return ABIArgInfo::getIgnore(); 2237 2238 // Aggregates <= 4 bytes are returned in r0; other aggregates 2239 // are returned indirectly. 2240 uint64_t Size = getContext().getTypeSize(RetTy); 2241 if (Size <= 32) { 2242 // Return in the smallest viable integer type. 2243 if (Size <= 8) 2244 return ABIArgInfo::getDirect(llvm::Type::getInt8Ty(getVMContext())); 2245 if (Size <= 16) 2246 return ABIArgInfo::getDirect(llvm::Type::getInt16Ty(getVMContext())); 2247 return ABIArgInfo::getDirect(llvm::Type::getInt32Ty(getVMContext())); 2248 } 2249 2250 return ABIArgInfo::getIndirect(0); 2251} 2252 2253llvm::Value *ARMABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 2254 CodeGenFunction &CGF) const { 2255 // FIXME: Need to handle alignment 2256 const llvm::Type *BP = llvm::Type::getInt8PtrTy(CGF.getLLVMContext()); 2257 const llvm::Type *BPP = llvm::PointerType::getUnqual(BP); 2258 2259 CGBuilderTy &Builder = CGF.Builder; 2260 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP, 2261 "ap"); 2262 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur"); 2263 llvm::Type *PTy = 2264 llvm::PointerType::getUnqual(CGF.ConvertType(Ty)); 2265 llvm::Value *AddrTyped = Builder.CreateBitCast(Addr, PTy); 2266 2267 uint64_t Offset = 2268 llvm::RoundUpToAlignment(CGF.getContext().getTypeSize(Ty) / 8, 4); 2269 llvm::Value *NextAddr = 2270 Builder.CreateGEP(Addr, llvm::ConstantInt::get(CGF.Int32Ty, Offset), 2271 "ap.next"); 2272 Builder.CreateStore(NextAddr, VAListAddrAsBPP); 2273 2274 return AddrTyped; 2275} 2276 2277ABIArgInfo DefaultABIInfo::classifyReturnType(QualType RetTy) const { 2278 if (RetTy->isVoidType()) 2279 return ABIArgInfo::getIgnore(); 2280 2281 if (CodeGenFunction::hasAggregateLLVMType(RetTy)) 2282 return ABIArgInfo::getIndirect(0); 2283 2284 // Treat an enum type as its underlying type. 2285 if (const EnumType *EnumTy = RetTy->getAs<EnumType>()) 2286 RetTy = EnumTy->getDecl()->getIntegerType(); 2287 2288 return (RetTy->isPromotableIntegerType() ? 2289 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 2290} 2291 2292//===----------------------------------------------------------------------===// 2293// SystemZ ABI Implementation 2294//===----------------------------------------------------------------------===// 2295 2296namespace { 2297 2298class SystemZABIInfo : public ABIInfo { 2299public: 2300 SystemZABIInfo(CodeGenTypes &CGT) : ABIInfo(CGT) {} 2301 2302 bool isPromotableIntegerType(QualType Ty) const; 2303 2304 ABIArgInfo classifyReturnType(QualType RetTy) const; 2305 ABIArgInfo classifyArgumentType(QualType RetTy) const; 2306 2307 virtual void computeInfo(CGFunctionInfo &FI) const { 2308 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 2309 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 2310 it != ie; ++it) 2311 it->info = classifyArgumentType(it->type); 2312 } 2313 2314 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 2315 CodeGenFunction &CGF) const; 2316}; 2317 2318class SystemZTargetCodeGenInfo : public TargetCodeGenInfo { 2319public: 2320 SystemZTargetCodeGenInfo(CodeGenTypes &CGT) 2321 : TargetCodeGenInfo(new SystemZABIInfo(CGT)) {} 2322}; 2323 2324} 2325 2326bool SystemZABIInfo::isPromotableIntegerType(QualType Ty) const { 2327 // SystemZ ABI requires all 8, 16 and 32 bit quantities to be extended. 2328 if (const BuiltinType *BT = Ty->getAs<BuiltinType>()) 2329 switch (BT->getKind()) { 2330 case BuiltinType::Bool: 2331 case BuiltinType::Char_S: 2332 case BuiltinType::Char_U: 2333 case BuiltinType::SChar: 2334 case BuiltinType::UChar: 2335 case BuiltinType::Short: 2336 case BuiltinType::UShort: 2337 case BuiltinType::Int: 2338 case BuiltinType::UInt: 2339 return true; 2340 default: 2341 return false; 2342 } 2343 return false; 2344} 2345 2346llvm::Value *SystemZABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 2347 CodeGenFunction &CGF) const { 2348 // FIXME: Implement 2349 return 0; 2350} 2351 2352 2353ABIArgInfo SystemZABIInfo::classifyReturnType(QualType RetTy) const { 2354 if (RetTy->isVoidType()) 2355 return ABIArgInfo::getIgnore(); 2356 if (CodeGenFunction::hasAggregateLLVMType(RetTy)) 2357 return ABIArgInfo::getIndirect(0); 2358 2359 return (isPromotableIntegerType(RetTy) ? 2360 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 2361} 2362 2363ABIArgInfo SystemZABIInfo::classifyArgumentType(QualType Ty) const { 2364 if (CodeGenFunction::hasAggregateLLVMType(Ty)) 2365 return ABIArgInfo::getIndirect(0); 2366 2367 return (isPromotableIntegerType(Ty) ? 2368 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 2369} 2370 2371//===----------------------------------------------------------------------===// 2372// MSP430 ABI Implementation 2373//===----------------------------------------------------------------------===// 2374 2375namespace { 2376 2377class MSP430TargetCodeGenInfo : public TargetCodeGenInfo { 2378public: 2379 MSP430TargetCodeGenInfo(CodeGenTypes &CGT) 2380 : TargetCodeGenInfo(new DefaultABIInfo(CGT)) {} 2381 void SetTargetAttributes(const Decl *D, llvm::GlobalValue *GV, 2382 CodeGen::CodeGenModule &M) const; 2383}; 2384 2385} 2386 2387void MSP430TargetCodeGenInfo::SetTargetAttributes(const Decl *D, 2388 llvm::GlobalValue *GV, 2389 CodeGen::CodeGenModule &M) const { 2390 if (const FunctionDecl *FD = dyn_cast<FunctionDecl>(D)) { 2391 if (const MSP430InterruptAttr *attr = FD->getAttr<MSP430InterruptAttr>()) { 2392 // Handle 'interrupt' attribute: 2393 llvm::Function *F = cast<llvm::Function>(GV); 2394 2395 // Step 1: Set ISR calling convention. 2396 F->setCallingConv(llvm::CallingConv::MSP430_INTR); 2397 2398 // Step 2: Add attributes goodness. 2399 F->addFnAttr(llvm::Attribute::NoInline); 2400 2401 // Step 3: Emit ISR vector alias. 2402 unsigned Num = attr->getNumber() + 0xffe0; 2403 new llvm::GlobalAlias(GV->getType(), llvm::Function::ExternalLinkage, 2404 "vector_" + 2405 llvm::LowercaseString(llvm::utohexstr(Num)), 2406 GV, &M.getModule()); 2407 } 2408 } 2409} 2410 2411//===----------------------------------------------------------------------===// 2412// MIPS ABI Implementation. This works for both little-endian and 2413// big-endian variants. 2414//===----------------------------------------------------------------------===// 2415 2416namespace { 2417class MIPSTargetCodeGenInfo : public TargetCodeGenInfo { 2418public: 2419 MIPSTargetCodeGenInfo(CodeGenTypes &CGT) 2420 : TargetCodeGenInfo(new DefaultABIInfo(CGT)) {} 2421 2422 int getDwarfEHStackPointer(CodeGen::CodeGenModule &CGM) const { 2423 return 29; 2424 } 2425 2426 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 2427 llvm::Value *Address) const; 2428}; 2429} 2430 2431bool 2432MIPSTargetCodeGenInfo::initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 2433 llvm::Value *Address) const { 2434 // This information comes from gcc's implementation, which seems to 2435 // as canonical as it gets. 2436 2437 CodeGen::CGBuilderTy &Builder = CGF.Builder; 2438 llvm::LLVMContext &Context = CGF.getLLVMContext(); 2439 2440 // Everything on MIPS is 4 bytes. Double-precision FP registers 2441 // are aliased to pairs of single-precision FP registers. 2442 const llvm::IntegerType *i8 = llvm::Type::getInt8Ty(Context); 2443 llvm::Value *Four8 = llvm::ConstantInt::get(i8, 4); 2444 2445 // 0-31 are the general purpose registers, $0 - $31. 2446 // 32-63 are the floating-point registers, $f0 - $f31. 2447 // 64 and 65 are the multiply/divide registers, $hi and $lo. 2448 // 66 is the (notional, I think) register for signal-handler return. 2449 AssignToArrayRange(Builder, Address, Four8, 0, 65); 2450 2451 // 67-74 are the floating-point status registers, $fcc0 - $fcc7. 2452 // They are one bit wide and ignored here. 2453 2454 // 80-111 are the coprocessor 0 registers, $c0r0 - $c0r31. 2455 // (coprocessor 1 is the FP unit) 2456 // 112-143 are the coprocessor 2 registers, $c2r0 - $c2r31. 2457 // 144-175 are the coprocessor 3 registers, $c3r0 - $c3r31. 2458 // 176-181 are the DSP accumulator registers. 2459 AssignToArrayRange(Builder, Address, Four8, 80, 181); 2460 2461 return false; 2462} 2463 2464 2465const TargetCodeGenInfo &CodeGenModule::getTargetCodeGenInfo() { 2466 if (TheTargetCodeGenInfo) 2467 return *TheTargetCodeGenInfo; 2468 2469 // For now we just cache the TargetCodeGenInfo in CodeGenModule and don't 2470 // free it. 2471 2472 const llvm::Triple &Triple = getContext().Target.getTriple(); 2473 switch (Triple.getArch()) { 2474 default: 2475 return *(TheTargetCodeGenInfo = new DefaultTargetCodeGenInfo(Types)); 2476 2477 case llvm::Triple::mips: 2478 case llvm::Triple::mipsel: 2479 return *(TheTargetCodeGenInfo = new MIPSTargetCodeGenInfo(Types)); 2480 2481 case llvm::Triple::arm: 2482 case llvm::Triple::thumb: 2483 // FIXME: We want to know the float calling convention as well. 2484 if (strcmp(getContext().Target.getABI(), "apcs-gnu") == 0) 2485 return *(TheTargetCodeGenInfo = 2486 new ARMTargetCodeGenInfo(Types, ARMABIInfo::APCS)); 2487 2488 return *(TheTargetCodeGenInfo = 2489 new ARMTargetCodeGenInfo(Types, ARMABIInfo::AAPCS)); 2490 2491 case llvm::Triple::pic16: 2492 return *(TheTargetCodeGenInfo = new PIC16TargetCodeGenInfo(Types)); 2493 2494 case llvm::Triple::ppc: 2495 return *(TheTargetCodeGenInfo = new PPC32TargetCodeGenInfo(Types)); 2496 2497 case llvm::Triple::systemz: 2498 return *(TheTargetCodeGenInfo = new SystemZTargetCodeGenInfo(Types)); 2499 2500 case llvm::Triple::msp430: 2501 return *(TheTargetCodeGenInfo = new MSP430TargetCodeGenInfo(Types)); 2502 2503 case llvm::Triple::x86: 2504 switch (Triple.getOS()) { 2505 case llvm::Triple::Darwin: 2506 return *(TheTargetCodeGenInfo = 2507 new X86_32TargetCodeGenInfo(Types, true, true)); 2508 case llvm::Triple::Cygwin: 2509 case llvm::Triple::MinGW32: 2510 case llvm::Triple::MinGW64: 2511 case llvm::Triple::AuroraUX: 2512 case llvm::Triple::DragonFly: 2513 case llvm::Triple::FreeBSD: 2514 case llvm::Triple::OpenBSD: 2515 return *(TheTargetCodeGenInfo = 2516 new X86_32TargetCodeGenInfo(Types, false, true)); 2517 2518 default: 2519 return *(TheTargetCodeGenInfo = 2520 new X86_32TargetCodeGenInfo(Types, false, false)); 2521 } 2522 2523 case llvm::Triple::x86_64: 2524 return *(TheTargetCodeGenInfo = new X86_64TargetCodeGenInfo(Types)); 2525 } 2526} 2527