TargetInfo.cpp revision 64aa4b3ec7e62288e2e66c1935487ece995ca94b
1//===---- TargetInfo.cpp - Encapsulate target details -----------*- C++ -*-===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// These classes wrap the information about a call or function 11// definition used to handle ABI compliancy. 12// 13//===----------------------------------------------------------------------===// 14 15#include "TargetInfo.h" 16#include "ABIInfo.h" 17#include "CodeGenFunction.h" 18#include "clang/AST/RecordLayout.h" 19#include "clang/Frontend/CodeGenOptions.h" 20#include "llvm/ADT/Triple.h" 21#include "llvm/IR/DataLayout.h" 22#include "llvm/IR/Type.h" 23#include "llvm/Support/raw_ostream.h" 24using namespace clang; 25using namespace CodeGen; 26 27static void AssignToArrayRange(CodeGen::CGBuilderTy &Builder, 28 llvm::Value *Array, 29 llvm::Value *Value, 30 unsigned FirstIndex, 31 unsigned LastIndex) { 32 // Alternatively, we could emit this as a loop in the source. 33 for (unsigned I = FirstIndex; I <= LastIndex; ++I) { 34 llvm::Value *Cell = Builder.CreateConstInBoundsGEP1_32(Array, I); 35 Builder.CreateStore(Value, Cell); 36 } 37} 38 39static bool isAggregateTypeForABI(QualType T) { 40 return !CodeGenFunction::hasScalarEvaluationKind(T) || 41 T->isMemberFunctionPointerType(); 42} 43 44ABIInfo::~ABIInfo() {} 45 46ASTContext &ABIInfo::getContext() const { 47 return CGT.getContext(); 48} 49 50llvm::LLVMContext &ABIInfo::getVMContext() const { 51 return CGT.getLLVMContext(); 52} 53 54const llvm::DataLayout &ABIInfo::getDataLayout() const { 55 return CGT.getDataLayout(); 56} 57 58const TargetInfo &ABIInfo::getTarget() const { 59 return CGT.getTarget(); 60} 61 62void ABIArgInfo::dump() const { 63 raw_ostream &OS = llvm::errs(); 64 OS << "(ABIArgInfo Kind="; 65 switch (TheKind) { 66 case Direct: 67 OS << "Direct Type="; 68 if (llvm::Type *Ty = getCoerceToType()) 69 Ty->print(OS); 70 else 71 OS << "null"; 72 break; 73 case Extend: 74 OS << "Extend"; 75 break; 76 case Ignore: 77 OS << "Ignore"; 78 break; 79 case Indirect: 80 OS << "Indirect Align=" << getIndirectAlign() 81 << " ByVal=" << getIndirectByVal() 82 << " Realign=" << getIndirectRealign(); 83 break; 84 case Expand: 85 OS << "Expand"; 86 break; 87 } 88 OS << ")\n"; 89} 90 91TargetCodeGenInfo::~TargetCodeGenInfo() { delete Info; } 92 93// If someone can figure out a general rule for this, that would be great. 94// It's probably just doomed to be platform-dependent, though. 95unsigned TargetCodeGenInfo::getSizeOfUnwindException() const { 96 // Verified for: 97 // x86-64 FreeBSD, Linux, Darwin 98 // x86-32 FreeBSD, Linux, Darwin 99 // PowerPC Linux, Darwin 100 // ARM Darwin (*not* EABI) 101 // AArch64 Linux 102 return 32; 103} 104 105bool TargetCodeGenInfo::isNoProtoCallVariadic(const CallArgList &args, 106 const FunctionNoProtoType *fnType) const { 107 // The following conventions are known to require this to be false: 108 // x86_stdcall 109 // MIPS 110 // For everything else, we just prefer false unless we opt out. 111 return false; 112} 113 114static bool isEmptyRecord(ASTContext &Context, QualType T, bool AllowArrays); 115 116/// isEmptyField - Return true iff a the field is "empty", that is it 117/// is an unnamed bit-field or an (array of) empty record(s). 118static bool isEmptyField(ASTContext &Context, const FieldDecl *FD, 119 bool AllowArrays) { 120 if (FD->isUnnamedBitfield()) 121 return true; 122 123 QualType FT = FD->getType(); 124 125 // Constant arrays of empty records count as empty, strip them off. 126 // Constant arrays of zero length always count as empty. 127 if (AllowArrays) 128 while (const ConstantArrayType *AT = Context.getAsConstantArrayType(FT)) { 129 if (AT->getSize() == 0) 130 return true; 131 FT = AT->getElementType(); 132 } 133 134 const RecordType *RT = FT->getAs<RecordType>(); 135 if (!RT) 136 return false; 137 138 // C++ record fields are never empty, at least in the Itanium ABI. 139 // 140 // FIXME: We should use a predicate for whether this behavior is true in the 141 // current ABI. 142 if (isa<CXXRecordDecl>(RT->getDecl())) 143 return false; 144 145 return isEmptyRecord(Context, FT, AllowArrays); 146} 147 148/// isEmptyRecord - Return true iff a structure contains only empty 149/// fields. Note that a structure with a flexible array member is not 150/// considered empty. 151static bool isEmptyRecord(ASTContext &Context, QualType T, bool AllowArrays) { 152 const RecordType *RT = T->getAs<RecordType>(); 153 if (!RT) 154 return 0; 155 const RecordDecl *RD = RT->getDecl(); 156 if (RD->hasFlexibleArrayMember()) 157 return false; 158 159 // If this is a C++ record, check the bases first. 160 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) 161 for (CXXRecordDecl::base_class_const_iterator i = CXXRD->bases_begin(), 162 e = CXXRD->bases_end(); i != e; ++i) 163 if (!isEmptyRecord(Context, i->getType(), true)) 164 return false; 165 166 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 167 i != e; ++i) 168 if (!isEmptyField(Context, *i, AllowArrays)) 169 return false; 170 return true; 171} 172 173/// hasNonTrivialDestructorOrCopyConstructor - Determine if a type has either 174/// a non-trivial destructor or a non-trivial copy constructor. 175static bool hasNonTrivialDestructorOrCopyConstructor(const RecordType *RT) { 176 const CXXRecordDecl *RD = dyn_cast<CXXRecordDecl>(RT->getDecl()); 177 if (!RD) 178 return false; 179 180 return !RD->hasTrivialDestructor() || RD->hasNonTrivialCopyConstructor(); 181} 182 183/// isRecordWithNonTrivialDestructorOrCopyConstructor - Determine if a type is 184/// a record type with either a non-trivial destructor or a non-trivial copy 185/// constructor. 186static bool isRecordWithNonTrivialDestructorOrCopyConstructor(QualType T) { 187 const RecordType *RT = T->getAs<RecordType>(); 188 if (!RT) 189 return false; 190 191 return hasNonTrivialDestructorOrCopyConstructor(RT); 192} 193 194/// isSingleElementStruct - Determine if a structure is a "single 195/// element struct", i.e. it has exactly one non-empty field or 196/// exactly one field which is itself a single element 197/// struct. Structures with flexible array members are never 198/// considered single element structs. 199/// 200/// \return The field declaration for the single non-empty field, if 201/// it exists. 202static const Type *isSingleElementStruct(QualType T, ASTContext &Context) { 203 const RecordType *RT = T->getAsStructureType(); 204 if (!RT) 205 return 0; 206 207 const RecordDecl *RD = RT->getDecl(); 208 if (RD->hasFlexibleArrayMember()) 209 return 0; 210 211 const Type *Found = 0; 212 213 // If this is a C++ record, check the bases first. 214 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) { 215 for (CXXRecordDecl::base_class_const_iterator i = CXXRD->bases_begin(), 216 e = CXXRD->bases_end(); i != e; ++i) { 217 // Ignore empty records. 218 if (isEmptyRecord(Context, i->getType(), true)) 219 continue; 220 221 // If we already found an element then this isn't a single-element struct. 222 if (Found) 223 return 0; 224 225 // If this is non-empty and not a single element struct, the composite 226 // cannot be a single element struct. 227 Found = isSingleElementStruct(i->getType(), Context); 228 if (!Found) 229 return 0; 230 } 231 } 232 233 // Check for single element. 234 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 235 i != e; ++i) { 236 const FieldDecl *FD = *i; 237 QualType FT = FD->getType(); 238 239 // Ignore empty fields. 240 if (isEmptyField(Context, FD, true)) 241 continue; 242 243 // If we already found an element then this isn't a single-element 244 // struct. 245 if (Found) 246 return 0; 247 248 // Treat single element arrays as the element. 249 while (const ConstantArrayType *AT = Context.getAsConstantArrayType(FT)) { 250 if (AT->getSize().getZExtValue() != 1) 251 break; 252 FT = AT->getElementType(); 253 } 254 255 if (!isAggregateTypeForABI(FT)) { 256 Found = FT.getTypePtr(); 257 } else { 258 Found = isSingleElementStruct(FT, Context); 259 if (!Found) 260 return 0; 261 } 262 } 263 264 // We don't consider a struct a single-element struct if it has 265 // padding beyond the element type. 266 if (Found && Context.getTypeSize(Found) != Context.getTypeSize(T)) 267 return 0; 268 269 return Found; 270} 271 272static bool is32Or64BitBasicType(QualType Ty, ASTContext &Context) { 273 // Treat complex types as the element type. 274 if (const ComplexType *CTy = Ty->getAs<ComplexType>()) 275 Ty = CTy->getElementType(); 276 277 // Check for a type which we know has a simple scalar argument-passing 278 // convention without any padding. (We're specifically looking for 32 279 // and 64-bit integer and integer-equivalents, float, and double.) 280 if (!Ty->getAs<BuiltinType>() && !Ty->hasPointerRepresentation() && 281 !Ty->isEnumeralType() && !Ty->isBlockPointerType()) 282 return false; 283 284 uint64_t Size = Context.getTypeSize(Ty); 285 return Size == 32 || Size == 64; 286} 287 288/// canExpandIndirectArgument - Test whether an argument type which is to be 289/// passed indirectly (on the stack) would have the equivalent layout if it was 290/// expanded into separate arguments. If so, we prefer to do the latter to avoid 291/// inhibiting optimizations. 292/// 293// FIXME: This predicate is missing many cases, currently it just follows 294// llvm-gcc (checks that all fields are 32-bit or 64-bit primitive types). We 295// should probably make this smarter, or better yet make the LLVM backend 296// capable of handling it. 297static bool canExpandIndirectArgument(QualType Ty, ASTContext &Context) { 298 // We can only expand structure types. 299 const RecordType *RT = Ty->getAs<RecordType>(); 300 if (!RT) 301 return false; 302 303 // We can only expand (C) structures. 304 // 305 // FIXME: This needs to be generalized to handle classes as well. 306 const RecordDecl *RD = RT->getDecl(); 307 if (!RD->isStruct() || isa<CXXRecordDecl>(RD)) 308 return false; 309 310 uint64_t Size = 0; 311 312 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 313 i != e; ++i) { 314 const FieldDecl *FD = *i; 315 316 if (!is32Or64BitBasicType(FD->getType(), Context)) 317 return false; 318 319 // FIXME: Reject bit-fields wholesale; there are two problems, we don't know 320 // how to expand them yet, and the predicate for telling if a bitfield still 321 // counts as "basic" is more complicated than what we were doing previously. 322 if (FD->isBitField()) 323 return false; 324 325 Size += Context.getTypeSize(FD->getType()); 326 } 327 328 // Make sure there are not any holes in the struct. 329 if (Size != Context.getTypeSize(Ty)) 330 return false; 331 332 return true; 333} 334 335namespace { 336/// DefaultABIInfo - The default implementation for ABI specific 337/// details. This implementation provides information which results in 338/// self-consistent and sensible LLVM IR generation, but does not 339/// conform to any particular ABI. 340class DefaultABIInfo : public ABIInfo { 341public: 342 DefaultABIInfo(CodeGen::CodeGenTypes &CGT) : ABIInfo(CGT) {} 343 344 ABIArgInfo classifyReturnType(QualType RetTy) const; 345 ABIArgInfo classifyArgumentType(QualType RetTy) const; 346 347 virtual void computeInfo(CGFunctionInfo &FI) const { 348 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 349 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 350 it != ie; ++it) 351 it->info = classifyArgumentType(it->type); 352 } 353 354 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 355 CodeGenFunction &CGF) const; 356}; 357 358class DefaultTargetCodeGenInfo : public TargetCodeGenInfo { 359public: 360 DefaultTargetCodeGenInfo(CodeGen::CodeGenTypes &CGT) 361 : TargetCodeGenInfo(new DefaultABIInfo(CGT)) {} 362}; 363 364llvm::Value *DefaultABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 365 CodeGenFunction &CGF) const { 366 return 0; 367} 368 369ABIArgInfo DefaultABIInfo::classifyArgumentType(QualType Ty) const { 370 if (isAggregateTypeForABI(Ty)) { 371 // Records with non trivial destructors/constructors should not be passed 372 // by value. 373 if (isRecordWithNonTrivialDestructorOrCopyConstructor(Ty)) 374 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 375 376 return ABIArgInfo::getIndirect(0); 377 } 378 379 // Treat an enum type as its underlying type. 380 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 381 Ty = EnumTy->getDecl()->getIntegerType(); 382 383 return (Ty->isPromotableIntegerType() ? 384 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 385} 386 387ABIArgInfo DefaultABIInfo::classifyReturnType(QualType RetTy) const { 388 if (RetTy->isVoidType()) 389 return ABIArgInfo::getIgnore(); 390 391 if (isAggregateTypeForABI(RetTy)) 392 return ABIArgInfo::getIndirect(0); 393 394 // Treat an enum type as its underlying type. 395 if (const EnumType *EnumTy = RetTy->getAs<EnumType>()) 396 RetTy = EnumTy->getDecl()->getIntegerType(); 397 398 return (RetTy->isPromotableIntegerType() ? 399 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 400} 401 402//===----------------------------------------------------------------------===// 403// le32/PNaCl bitcode ABI Implementation 404// 405// This is a simplified version of the x86_32 ABI. Arguments and return values 406// are always passed on the stack. 407//===----------------------------------------------------------------------===// 408 409class PNaClABIInfo : public ABIInfo { 410 public: 411 PNaClABIInfo(CodeGen::CodeGenTypes &CGT) : ABIInfo(CGT) {} 412 413 ABIArgInfo classifyReturnType(QualType RetTy) const; 414 ABIArgInfo classifyArgumentType(QualType RetTy) const; 415 416 virtual void computeInfo(CGFunctionInfo &FI) const; 417 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 418 CodeGenFunction &CGF) const; 419}; 420 421class PNaClTargetCodeGenInfo : public TargetCodeGenInfo { 422 public: 423 PNaClTargetCodeGenInfo(CodeGen::CodeGenTypes &CGT) 424 : TargetCodeGenInfo(new PNaClABIInfo(CGT)) {} 425}; 426 427void PNaClABIInfo::computeInfo(CGFunctionInfo &FI) const { 428 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 429 430 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 431 it != ie; ++it) 432 it->info = classifyArgumentType(it->type); 433 } 434 435llvm::Value *PNaClABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 436 CodeGenFunction &CGF) const { 437 return 0; 438} 439 440/// \brief Classify argument of given type \p Ty. 441ABIArgInfo PNaClABIInfo::classifyArgumentType(QualType Ty) const { 442 if (isAggregateTypeForABI(Ty)) { 443 // In the PNaCl ABI we always pass records/structures on the stack. The 444 // byval attribute can be used if the record doesn't have non-trivial 445 // constructors/destructors. 446 if (isRecordWithNonTrivialDestructorOrCopyConstructor(Ty)) 447 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 448 return ABIArgInfo::getIndirect(0); 449 } else if (const EnumType *EnumTy = Ty->getAs<EnumType>()) { 450 // Treat an enum type as its underlying type. 451 Ty = EnumTy->getDecl()->getIntegerType(); 452 } else if (Ty->isFloatingType()) { 453 // Floating-point types don't go inreg. 454 return ABIArgInfo::getDirect(); 455 } 456 457 return (Ty->isPromotableIntegerType() ? 458 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 459} 460 461ABIArgInfo PNaClABIInfo::classifyReturnType(QualType RetTy) const { 462 if (RetTy->isVoidType()) 463 return ABIArgInfo::getIgnore(); 464 465 // In the PNaCl ABI we always return records/structures on the stack. 466 if (isAggregateTypeForABI(RetTy)) 467 return ABIArgInfo::getIndirect(0); 468 469 // Treat an enum type as its underlying type. 470 if (const EnumType *EnumTy = RetTy->getAs<EnumType>()) 471 RetTy = EnumTy->getDecl()->getIntegerType(); 472 473 return (RetTy->isPromotableIntegerType() ? 474 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 475} 476 477/// IsX86_MMXType - Return true if this is an MMX type. 478bool IsX86_MMXType(llvm::Type *IRType) { 479 // Return true if the type is an MMX type <2 x i32>, <4 x i16>, or <8 x i8>. 480 return IRType->isVectorTy() && IRType->getPrimitiveSizeInBits() == 64 && 481 cast<llvm::VectorType>(IRType)->getElementType()->isIntegerTy() && 482 IRType->getScalarSizeInBits() != 64; 483} 484 485static llvm::Type* X86AdjustInlineAsmType(CodeGen::CodeGenFunction &CGF, 486 StringRef Constraint, 487 llvm::Type* Ty) { 488 if ((Constraint == "y" || Constraint == "&y") && Ty->isVectorTy()) 489 return llvm::Type::getX86_MMXTy(CGF.getLLVMContext()); 490 return Ty; 491} 492 493//===----------------------------------------------------------------------===// 494// X86-32 ABI Implementation 495//===----------------------------------------------------------------------===// 496 497/// X86_32ABIInfo - The X86-32 ABI information. 498class X86_32ABIInfo : public ABIInfo { 499 enum Class { 500 Integer, 501 Float 502 }; 503 504 static const unsigned MinABIStackAlignInBytes = 4; 505 506 bool IsDarwinVectorABI; 507 bool IsSmallStructInRegABI; 508 bool IsWin32FloatStructABI; 509 unsigned DefaultNumRegisterParameters; 510 511 static bool isRegisterSize(unsigned Size) { 512 return (Size == 8 || Size == 16 || Size == 32 || Size == 64); 513 } 514 515 static bool shouldReturnTypeInRegister(QualType Ty, ASTContext &Context, 516 unsigned callingConvention); 517 518 /// getIndirectResult - Give a source type \arg Ty, return a suitable result 519 /// such that the argument will be passed in memory. 520 ABIArgInfo getIndirectResult(QualType Ty, bool ByVal, 521 unsigned &FreeRegs) const; 522 523 /// \brief Return the alignment to use for the given type on the stack. 524 unsigned getTypeStackAlignInBytes(QualType Ty, unsigned Align) const; 525 526 Class classify(QualType Ty) const; 527 ABIArgInfo classifyReturnType(QualType RetTy, 528 unsigned callingConvention) const; 529 ABIArgInfo classifyArgumentType(QualType RetTy, unsigned &FreeRegs, 530 bool IsFastCall) const; 531 bool shouldUseInReg(QualType Ty, unsigned &FreeRegs, 532 bool IsFastCall, bool &NeedsPadding) const; 533 534public: 535 536 virtual void computeInfo(CGFunctionInfo &FI) const; 537 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 538 CodeGenFunction &CGF) const; 539 540 X86_32ABIInfo(CodeGen::CodeGenTypes &CGT, bool d, bool p, bool w, 541 unsigned r) 542 : ABIInfo(CGT), IsDarwinVectorABI(d), IsSmallStructInRegABI(p), 543 IsWin32FloatStructABI(w), DefaultNumRegisterParameters(r) {} 544}; 545 546class X86_32TargetCodeGenInfo : public TargetCodeGenInfo { 547public: 548 X86_32TargetCodeGenInfo(CodeGen::CodeGenTypes &CGT, 549 bool d, bool p, bool w, unsigned r) 550 :TargetCodeGenInfo(new X86_32ABIInfo(CGT, d, p, w, r)) {} 551 552 void SetTargetAttributes(const Decl *D, llvm::GlobalValue *GV, 553 CodeGen::CodeGenModule &CGM) const; 554 555 int getDwarfEHStackPointer(CodeGen::CodeGenModule &CGM) const { 556 // Darwin uses different dwarf register numbers for EH. 557 if (CGM.getTarget().getTriple().isOSDarwin()) return 5; 558 return 4; 559 } 560 561 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 562 llvm::Value *Address) const; 563 564 llvm::Type* adjustInlineAsmType(CodeGen::CodeGenFunction &CGF, 565 StringRef Constraint, 566 llvm::Type* Ty) const { 567 return X86AdjustInlineAsmType(CGF, Constraint, Ty); 568 } 569 570}; 571 572} 573 574/// shouldReturnTypeInRegister - Determine if the given type should be 575/// passed in a register (for the Darwin ABI). 576bool X86_32ABIInfo::shouldReturnTypeInRegister(QualType Ty, 577 ASTContext &Context, 578 unsigned callingConvention) { 579 uint64_t Size = Context.getTypeSize(Ty); 580 581 // Type must be register sized. 582 if (!isRegisterSize(Size)) 583 return false; 584 585 if (Ty->isVectorType()) { 586 // 64- and 128- bit vectors inside structures are not returned in 587 // registers. 588 if (Size == 64 || Size == 128) 589 return false; 590 591 return true; 592 } 593 594 // If this is a builtin, pointer, enum, complex type, member pointer, or 595 // member function pointer it is ok. 596 if (Ty->getAs<BuiltinType>() || Ty->hasPointerRepresentation() || 597 Ty->isAnyComplexType() || Ty->isEnumeralType() || 598 Ty->isBlockPointerType() || Ty->isMemberPointerType()) 599 return true; 600 601 // Arrays are treated like records. 602 if (const ConstantArrayType *AT = Context.getAsConstantArrayType(Ty)) 603 return shouldReturnTypeInRegister(AT->getElementType(), Context, 604 callingConvention); 605 606 // Otherwise, it must be a record type. 607 const RecordType *RT = Ty->getAs<RecordType>(); 608 if (!RT) return false; 609 610 // FIXME: Traverse bases here too. 611 612 // For thiscall conventions, structures will never be returned in 613 // a register. This is for compatibility with the MSVC ABI 614 if (callingConvention == llvm::CallingConv::X86_ThisCall && 615 RT->isStructureType()) { 616 return false; 617 } 618 619 // Structure types are passed in register if all fields would be 620 // passed in a register. 621 for (RecordDecl::field_iterator i = RT->getDecl()->field_begin(), 622 e = RT->getDecl()->field_end(); i != e; ++i) { 623 const FieldDecl *FD = *i; 624 625 // Empty fields are ignored. 626 if (isEmptyField(Context, FD, true)) 627 continue; 628 629 // Check fields recursively. 630 if (!shouldReturnTypeInRegister(FD->getType(), Context, 631 callingConvention)) 632 return false; 633 } 634 return true; 635} 636 637ABIArgInfo X86_32ABIInfo::classifyReturnType(QualType RetTy, 638 unsigned callingConvention) const { 639 if (RetTy->isVoidType()) 640 return ABIArgInfo::getIgnore(); 641 642 if (const VectorType *VT = RetTy->getAs<VectorType>()) { 643 // On Darwin, some vectors are returned in registers. 644 if (IsDarwinVectorABI) { 645 uint64_t Size = getContext().getTypeSize(RetTy); 646 647 // 128-bit vectors are a special case; they are returned in 648 // registers and we need to make sure to pick a type the LLVM 649 // backend will like. 650 if (Size == 128) 651 return ABIArgInfo::getDirect(llvm::VectorType::get( 652 llvm::Type::getInt64Ty(getVMContext()), 2)); 653 654 // Always return in register if it fits in a general purpose 655 // register, or if it is 64 bits and has a single element. 656 if ((Size == 8 || Size == 16 || Size == 32) || 657 (Size == 64 && VT->getNumElements() == 1)) 658 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(), 659 Size)); 660 661 return ABIArgInfo::getIndirect(0); 662 } 663 664 return ABIArgInfo::getDirect(); 665 } 666 667 if (isAggregateTypeForABI(RetTy)) { 668 if (const RecordType *RT = RetTy->getAs<RecordType>()) { 669 // Structures with either a non-trivial destructor or a non-trivial 670 // copy constructor are always indirect. 671 if (hasNonTrivialDestructorOrCopyConstructor(RT)) 672 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 673 674 // Structures with flexible arrays are always indirect. 675 if (RT->getDecl()->hasFlexibleArrayMember()) 676 return ABIArgInfo::getIndirect(0); 677 } 678 679 // If specified, structs and unions are always indirect. 680 if (!IsSmallStructInRegABI && !RetTy->isAnyComplexType()) 681 return ABIArgInfo::getIndirect(0); 682 683 // Small structures which are register sized are generally returned 684 // in a register. 685 if (X86_32ABIInfo::shouldReturnTypeInRegister(RetTy, getContext(), 686 callingConvention)) { 687 uint64_t Size = getContext().getTypeSize(RetTy); 688 689 // As a special-case, if the struct is a "single-element" struct, and 690 // the field is of type "float" or "double", return it in a 691 // floating-point register. (MSVC does not apply this special case.) 692 // We apply a similar transformation for pointer types to improve the 693 // quality of the generated IR. 694 if (const Type *SeltTy = isSingleElementStruct(RetTy, getContext())) 695 if ((!IsWin32FloatStructABI && SeltTy->isRealFloatingType()) 696 || SeltTy->hasPointerRepresentation()) 697 return ABIArgInfo::getDirect(CGT.ConvertType(QualType(SeltTy, 0))); 698 699 // FIXME: We should be able to narrow this integer in cases with dead 700 // padding. 701 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(),Size)); 702 } 703 704 return ABIArgInfo::getIndirect(0); 705 } 706 707 // Treat an enum type as its underlying type. 708 if (const EnumType *EnumTy = RetTy->getAs<EnumType>()) 709 RetTy = EnumTy->getDecl()->getIntegerType(); 710 711 return (RetTy->isPromotableIntegerType() ? 712 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 713} 714 715static bool isSSEVectorType(ASTContext &Context, QualType Ty) { 716 return Ty->getAs<VectorType>() && Context.getTypeSize(Ty) == 128; 717} 718 719static bool isRecordWithSSEVectorType(ASTContext &Context, QualType Ty) { 720 const RecordType *RT = Ty->getAs<RecordType>(); 721 if (!RT) 722 return 0; 723 const RecordDecl *RD = RT->getDecl(); 724 725 // If this is a C++ record, check the bases first. 726 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) 727 for (CXXRecordDecl::base_class_const_iterator i = CXXRD->bases_begin(), 728 e = CXXRD->bases_end(); i != e; ++i) 729 if (!isRecordWithSSEVectorType(Context, i->getType())) 730 return false; 731 732 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 733 i != e; ++i) { 734 QualType FT = i->getType(); 735 736 if (isSSEVectorType(Context, FT)) 737 return true; 738 739 if (isRecordWithSSEVectorType(Context, FT)) 740 return true; 741 } 742 743 return false; 744} 745 746unsigned X86_32ABIInfo::getTypeStackAlignInBytes(QualType Ty, 747 unsigned Align) const { 748 // Otherwise, if the alignment is less than or equal to the minimum ABI 749 // alignment, just use the default; the backend will handle this. 750 if (Align <= MinABIStackAlignInBytes) 751 return 0; // Use default alignment. 752 753 // On non-Darwin, the stack type alignment is always 4. 754 if (!IsDarwinVectorABI) { 755 // Set explicit alignment, since we may need to realign the top. 756 return MinABIStackAlignInBytes; 757 } 758 759 // Otherwise, if the type contains an SSE vector type, the alignment is 16. 760 if (Align >= 16 && (isSSEVectorType(getContext(), Ty) || 761 isRecordWithSSEVectorType(getContext(), Ty))) 762 return 16; 763 764 return MinABIStackAlignInBytes; 765} 766 767ABIArgInfo X86_32ABIInfo::getIndirectResult(QualType Ty, bool ByVal, 768 unsigned &FreeRegs) const { 769 if (!ByVal) { 770 if (FreeRegs) { 771 --FreeRegs; // Non byval indirects just use one pointer. 772 return ABIArgInfo::getIndirectInReg(0, false); 773 } 774 return ABIArgInfo::getIndirect(0, false); 775 } 776 777 // Compute the byval alignment. 778 unsigned TypeAlign = getContext().getTypeAlign(Ty) / 8; 779 unsigned StackAlign = getTypeStackAlignInBytes(Ty, TypeAlign); 780 if (StackAlign == 0) 781 return ABIArgInfo::getIndirect(4); 782 783 // If the stack alignment is less than the type alignment, realign the 784 // argument. 785 if (StackAlign < TypeAlign) 786 return ABIArgInfo::getIndirect(StackAlign, /*ByVal=*/true, 787 /*Realign=*/true); 788 789 return ABIArgInfo::getIndirect(StackAlign); 790} 791 792X86_32ABIInfo::Class X86_32ABIInfo::classify(QualType Ty) const { 793 const Type *T = isSingleElementStruct(Ty, getContext()); 794 if (!T) 795 T = Ty.getTypePtr(); 796 797 if (const BuiltinType *BT = T->getAs<BuiltinType>()) { 798 BuiltinType::Kind K = BT->getKind(); 799 if (K == BuiltinType::Float || K == BuiltinType::Double) 800 return Float; 801 } 802 return Integer; 803} 804 805bool X86_32ABIInfo::shouldUseInReg(QualType Ty, unsigned &FreeRegs, 806 bool IsFastCall, bool &NeedsPadding) const { 807 NeedsPadding = false; 808 Class C = classify(Ty); 809 if (C == Float) 810 return false; 811 812 unsigned Size = getContext().getTypeSize(Ty); 813 unsigned SizeInRegs = (Size + 31) / 32; 814 815 if (SizeInRegs == 0) 816 return false; 817 818 if (SizeInRegs > FreeRegs) { 819 FreeRegs = 0; 820 return false; 821 } 822 823 FreeRegs -= SizeInRegs; 824 825 if (IsFastCall) { 826 if (Size > 32) 827 return false; 828 829 if (Ty->isIntegralOrEnumerationType()) 830 return true; 831 832 if (Ty->isPointerType()) 833 return true; 834 835 if (Ty->isReferenceType()) 836 return true; 837 838 if (FreeRegs) 839 NeedsPadding = true; 840 841 return false; 842 } 843 844 return true; 845} 846 847ABIArgInfo X86_32ABIInfo::classifyArgumentType(QualType Ty, 848 unsigned &FreeRegs, 849 bool IsFastCall) const { 850 // FIXME: Set alignment on indirect arguments. 851 if (isAggregateTypeForABI(Ty)) { 852 // Structures with flexible arrays are always indirect. 853 if (const RecordType *RT = Ty->getAs<RecordType>()) { 854 // Structures with either a non-trivial destructor or a non-trivial 855 // copy constructor are always indirect. 856 if (hasNonTrivialDestructorOrCopyConstructor(RT)) 857 return getIndirectResult(Ty, false, FreeRegs); 858 859 if (RT->getDecl()->hasFlexibleArrayMember()) 860 return getIndirectResult(Ty, true, FreeRegs); 861 } 862 863 // Ignore empty structs/unions. 864 if (isEmptyRecord(getContext(), Ty, true)) 865 return ABIArgInfo::getIgnore(); 866 867 llvm::LLVMContext &LLVMContext = getVMContext(); 868 llvm::IntegerType *Int32 = llvm::Type::getInt32Ty(LLVMContext); 869 bool NeedsPadding; 870 if (shouldUseInReg(Ty, FreeRegs, IsFastCall, NeedsPadding)) { 871 unsigned SizeInRegs = (getContext().getTypeSize(Ty) + 31) / 32; 872 SmallVector<llvm::Type*, 3> Elements; 873 for (unsigned I = 0; I < SizeInRegs; ++I) 874 Elements.push_back(Int32); 875 llvm::Type *Result = llvm::StructType::get(LLVMContext, Elements); 876 return ABIArgInfo::getDirectInReg(Result); 877 } 878 llvm::IntegerType *PaddingType = NeedsPadding ? Int32 : 0; 879 880 // Expand small (<= 128-bit) record types when we know that the stack layout 881 // of those arguments will match the struct. This is important because the 882 // LLVM backend isn't smart enough to remove byval, which inhibits many 883 // optimizations. 884 if (getContext().getTypeSize(Ty) <= 4*32 && 885 canExpandIndirectArgument(Ty, getContext())) 886 return ABIArgInfo::getExpandWithPadding(IsFastCall, PaddingType); 887 888 return getIndirectResult(Ty, true, FreeRegs); 889 } 890 891 if (const VectorType *VT = Ty->getAs<VectorType>()) { 892 // On Darwin, some vectors are passed in memory, we handle this by passing 893 // it as an i8/i16/i32/i64. 894 if (IsDarwinVectorABI) { 895 uint64_t Size = getContext().getTypeSize(Ty); 896 if ((Size == 8 || Size == 16 || Size == 32) || 897 (Size == 64 && VT->getNumElements() == 1)) 898 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(), 899 Size)); 900 } 901 902 if (IsX86_MMXType(CGT.ConvertType(Ty))) 903 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(), 64)); 904 905 return ABIArgInfo::getDirect(); 906 } 907 908 909 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 910 Ty = EnumTy->getDecl()->getIntegerType(); 911 912 bool NeedsPadding; 913 bool InReg = shouldUseInReg(Ty, FreeRegs, IsFastCall, NeedsPadding); 914 915 if (Ty->isPromotableIntegerType()) { 916 if (InReg) 917 return ABIArgInfo::getExtendInReg(); 918 return ABIArgInfo::getExtend(); 919 } 920 if (InReg) 921 return ABIArgInfo::getDirectInReg(); 922 return ABIArgInfo::getDirect(); 923} 924 925void X86_32ABIInfo::computeInfo(CGFunctionInfo &FI) const { 926 FI.getReturnInfo() = classifyReturnType(FI.getReturnType(), 927 FI.getCallingConvention()); 928 929 unsigned CC = FI.getCallingConvention(); 930 bool IsFastCall = CC == llvm::CallingConv::X86_FastCall; 931 unsigned FreeRegs; 932 if (IsFastCall) 933 FreeRegs = 2; 934 else if (FI.getHasRegParm()) 935 FreeRegs = FI.getRegParm(); 936 else 937 FreeRegs = DefaultNumRegisterParameters; 938 939 // If the return value is indirect, then the hidden argument is consuming one 940 // integer register. 941 if (FI.getReturnInfo().isIndirect() && FreeRegs) { 942 --FreeRegs; 943 ABIArgInfo &Old = FI.getReturnInfo(); 944 Old = ABIArgInfo::getIndirectInReg(Old.getIndirectAlign(), 945 Old.getIndirectByVal(), 946 Old.getIndirectRealign()); 947 } 948 949 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 950 it != ie; ++it) 951 it->info = classifyArgumentType(it->type, FreeRegs, IsFastCall); 952} 953 954llvm::Value *X86_32ABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 955 CodeGenFunction &CGF) const { 956 llvm::Type *BPP = CGF.Int8PtrPtrTy; 957 958 CGBuilderTy &Builder = CGF.Builder; 959 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP, 960 "ap"); 961 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur"); 962 963 // Compute if the address needs to be aligned 964 unsigned Align = CGF.getContext().getTypeAlignInChars(Ty).getQuantity(); 965 Align = getTypeStackAlignInBytes(Ty, Align); 966 Align = std::max(Align, 4U); 967 if (Align > 4) { 968 // addr = (addr + align - 1) & -align; 969 llvm::Value *Offset = 970 llvm::ConstantInt::get(CGF.Int32Ty, Align - 1); 971 Addr = CGF.Builder.CreateGEP(Addr, Offset); 972 llvm::Value *AsInt = CGF.Builder.CreatePtrToInt(Addr, 973 CGF.Int32Ty); 974 llvm::Value *Mask = llvm::ConstantInt::get(CGF.Int32Ty, -Align); 975 Addr = CGF.Builder.CreateIntToPtr(CGF.Builder.CreateAnd(AsInt, Mask), 976 Addr->getType(), 977 "ap.cur.aligned"); 978 } 979 980 llvm::Type *PTy = 981 llvm::PointerType::getUnqual(CGF.ConvertType(Ty)); 982 llvm::Value *AddrTyped = Builder.CreateBitCast(Addr, PTy); 983 984 uint64_t Offset = 985 llvm::RoundUpToAlignment(CGF.getContext().getTypeSize(Ty) / 8, Align); 986 llvm::Value *NextAddr = 987 Builder.CreateGEP(Addr, llvm::ConstantInt::get(CGF.Int32Ty, Offset), 988 "ap.next"); 989 Builder.CreateStore(NextAddr, VAListAddrAsBPP); 990 991 return AddrTyped; 992} 993 994void X86_32TargetCodeGenInfo::SetTargetAttributes(const Decl *D, 995 llvm::GlobalValue *GV, 996 CodeGen::CodeGenModule &CGM) const { 997 if (const FunctionDecl *FD = dyn_cast<FunctionDecl>(D)) { 998 if (FD->hasAttr<X86ForceAlignArgPointerAttr>()) { 999 // Get the LLVM function. 1000 llvm::Function *Fn = cast<llvm::Function>(GV); 1001 1002 // Now add the 'alignstack' attribute with a value of 16. 1003 llvm::AttrBuilder B; 1004 B.addStackAlignmentAttr(16); 1005 Fn->addAttributes(llvm::AttributeSet::FunctionIndex, 1006 llvm::AttributeSet::get(CGM.getLLVMContext(), 1007 llvm::AttributeSet::FunctionIndex, 1008 B)); 1009 } 1010 } 1011} 1012 1013bool X86_32TargetCodeGenInfo::initDwarfEHRegSizeTable( 1014 CodeGen::CodeGenFunction &CGF, 1015 llvm::Value *Address) const { 1016 CodeGen::CGBuilderTy &Builder = CGF.Builder; 1017 1018 llvm::Value *Four8 = llvm::ConstantInt::get(CGF.Int8Ty, 4); 1019 1020 // 0-7 are the eight integer registers; the order is different 1021 // on Darwin (for EH), but the range is the same. 1022 // 8 is %eip. 1023 AssignToArrayRange(Builder, Address, Four8, 0, 8); 1024 1025 if (CGF.CGM.getTarget().getTriple().isOSDarwin()) { 1026 // 12-16 are st(0..4). Not sure why we stop at 4. 1027 // These have size 16, which is sizeof(long double) on 1028 // platforms with 8-byte alignment for that type. 1029 llvm::Value *Sixteen8 = llvm::ConstantInt::get(CGF.Int8Ty, 16); 1030 AssignToArrayRange(Builder, Address, Sixteen8, 12, 16); 1031 1032 } else { 1033 // 9 is %eflags, which doesn't get a size on Darwin for some 1034 // reason. 1035 Builder.CreateStore(Four8, Builder.CreateConstInBoundsGEP1_32(Address, 9)); 1036 1037 // 11-16 are st(0..5). Not sure why we stop at 5. 1038 // These have size 12, which is sizeof(long double) on 1039 // platforms with 4-byte alignment for that type. 1040 llvm::Value *Twelve8 = llvm::ConstantInt::get(CGF.Int8Ty, 12); 1041 AssignToArrayRange(Builder, Address, Twelve8, 11, 16); 1042 } 1043 1044 return false; 1045} 1046 1047//===----------------------------------------------------------------------===// 1048// X86-64 ABI Implementation 1049//===----------------------------------------------------------------------===// 1050 1051 1052namespace { 1053/// X86_64ABIInfo - The X86_64 ABI information. 1054class X86_64ABIInfo : public ABIInfo { 1055 enum Class { 1056 Integer = 0, 1057 SSE, 1058 SSEUp, 1059 X87, 1060 X87Up, 1061 ComplexX87, 1062 NoClass, 1063 Memory 1064 }; 1065 1066 /// merge - Implement the X86_64 ABI merging algorithm. 1067 /// 1068 /// Merge an accumulating classification \arg Accum with a field 1069 /// classification \arg Field. 1070 /// 1071 /// \param Accum - The accumulating classification. This should 1072 /// always be either NoClass or the result of a previous merge 1073 /// call. In addition, this should never be Memory (the caller 1074 /// should just return Memory for the aggregate). 1075 static Class merge(Class Accum, Class Field); 1076 1077 /// postMerge - Implement the X86_64 ABI post merging algorithm. 1078 /// 1079 /// Post merger cleanup, reduces a malformed Hi and Lo pair to 1080 /// final MEMORY or SSE classes when necessary. 1081 /// 1082 /// \param AggregateSize - The size of the current aggregate in 1083 /// the classification process. 1084 /// 1085 /// \param Lo - The classification for the parts of the type 1086 /// residing in the low word of the containing object. 1087 /// 1088 /// \param Hi - The classification for the parts of the type 1089 /// residing in the higher words of the containing object. 1090 /// 1091 void postMerge(unsigned AggregateSize, Class &Lo, Class &Hi) const; 1092 1093 /// classify - Determine the x86_64 register classes in which the 1094 /// given type T should be passed. 1095 /// 1096 /// \param Lo - The classification for the parts of the type 1097 /// residing in the low word of the containing object. 1098 /// 1099 /// \param Hi - The classification for the parts of the type 1100 /// residing in the high word of the containing object. 1101 /// 1102 /// \param OffsetBase - The bit offset of this type in the 1103 /// containing object. Some parameters are classified different 1104 /// depending on whether they straddle an eightbyte boundary. 1105 /// 1106 /// If a word is unused its result will be NoClass; if a type should 1107 /// be passed in Memory then at least the classification of \arg Lo 1108 /// will be Memory. 1109 /// 1110 /// The \arg Lo class will be NoClass iff the argument is ignored. 1111 /// 1112 /// If the \arg Lo class is ComplexX87, then the \arg Hi class will 1113 /// also be ComplexX87. 1114 void classify(QualType T, uint64_t OffsetBase, Class &Lo, Class &Hi) const; 1115 1116 llvm::Type *GetByteVectorType(QualType Ty) const; 1117 llvm::Type *GetSSETypeAtOffset(llvm::Type *IRType, 1118 unsigned IROffset, QualType SourceTy, 1119 unsigned SourceOffset) const; 1120 llvm::Type *GetINTEGERTypeAtOffset(llvm::Type *IRType, 1121 unsigned IROffset, QualType SourceTy, 1122 unsigned SourceOffset) const; 1123 1124 /// getIndirectResult - Give a source type \arg Ty, return a suitable result 1125 /// such that the argument will be returned in memory. 1126 ABIArgInfo getIndirectReturnResult(QualType Ty) const; 1127 1128 /// getIndirectResult - Give a source type \arg Ty, return a suitable result 1129 /// such that the argument will be passed in memory. 1130 /// 1131 /// \param freeIntRegs - The number of free integer registers remaining 1132 /// available. 1133 ABIArgInfo getIndirectResult(QualType Ty, unsigned freeIntRegs) const; 1134 1135 ABIArgInfo classifyReturnType(QualType RetTy) const; 1136 1137 ABIArgInfo classifyArgumentType(QualType Ty, 1138 unsigned freeIntRegs, 1139 unsigned &neededInt, 1140 unsigned &neededSSE) const; 1141 1142 bool IsIllegalVectorType(QualType Ty) const; 1143 1144 /// The 0.98 ABI revision clarified a lot of ambiguities, 1145 /// unfortunately in ways that were not always consistent with 1146 /// certain previous compilers. In particular, platforms which 1147 /// required strict binary compatibility with older versions of GCC 1148 /// may need to exempt themselves. 1149 bool honorsRevision0_98() const { 1150 return !getTarget().getTriple().isOSDarwin(); 1151 } 1152 1153 bool HasAVX; 1154 // Some ABIs (e.g. X32 ABI and Native Client OS) use 32 bit pointers on 1155 // 64-bit hardware. 1156 bool Has64BitPointers; 1157 1158public: 1159 X86_64ABIInfo(CodeGen::CodeGenTypes &CGT, bool hasavx) : 1160 ABIInfo(CGT), HasAVX(hasavx), 1161 Has64BitPointers(CGT.getDataLayout().getPointerSize(0) == 8) { 1162 } 1163 1164 bool isPassedUsingAVXType(QualType type) const { 1165 unsigned neededInt, neededSSE; 1166 // The freeIntRegs argument doesn't matter here. 1167 ABIArgInfo info = classifyArgumentType(type, 0, neededInt, neededSSE); 1168 if (info.isDirect()) { 1169 llvm::Type *ty = info.getCoerceToType(); 1170 if (llvm::VectorType *vectorTy = dyn_cast_or_null<llvm::VectorType>(ty)) 1171 return (vectorTy->getBitWidth() > 128); 1172 } 1173 return false; 1174 } 1175 1176 virtual void computeInfo(CGFunctionInfo &FI) const; 1177 1178 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 1179 CodeGenFunction &CGF) const; 1180}; 1181 1182/// WinX86_64ABIInfo - The Windows X86_64 ABI information. 1183class WinX86_64ABIInfo : public ABIInfo { 1184 1185 ABIArgInfo classify(QualType Ty) const; 1186 1187public: 1188 WinX86_64ABIInfo(CodeGen::CodeGenTypes &CGT) : ABIInfo(CGT) {} 1189 1190 virtual void computeInfo(CGFunctionInfo &FI) const; 1191 1192 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 1193 CodeGenFunction &CGF) const; 1194}; 1195 1196class X86_64TargetCodeGenInfo : public TargetCodeGenInfo { 1197public: 1198 X86_64TargetCodeGenInfo(CodeGen::CodeGenTypes &CGT, bool HasAVX) 1199 : TargetCodeGenInfo(new X86_64ABIInfo(CGT, HasAVX)) {} 1200 1201 const X86_64ABIInfo &getABIInfo() const { 1202 return static_cast<const X86_64ABIInfo&>(TargetCodeGenInfo::getABIInfo()); 1203 } 1204 1205 int getDwarfEHStackPointer(CodeGen::CodeGenModule &CGM) const { 1206 return 7; 1207 } 1208 1209 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 1210 llvm::Value *Address) const { 1211 llvm::Value *Eight8 = llvm::ConstantInt::get(CGF.Int8Ty, 8); 1212 1213 // 0-15 are the 16 integer registers. 1214 // 16 is %rip. 1215 AssignToArrayRange(CGF.Builder, Address, Eight8, 0, 16); 1216 return false; 1217 } 1218 1219 llvm::Type* adjustInlineAsmType(CodeGen::CodeGenFunction &CGF, 1220 StringRef Constraint, 1221 llvm::Type* Ty) const { 1222 return X86AdjustInlineAsmType(CGF, Constraint, Ty); 1223 } 1224 1225 bool isNoProtoCallVariadic(const CallArgList &args, 1226 const FunctionNoProtoType *fnType) const { 1227 // The default CC on x86-64 sets %al to the number of SSA 1228 // registers used, and GCC sets this when calling an unprototyped 1229 // function, so we override the default behavior. However, don't do 1230 // that when AVX types are involved: the ABI explicitly states it is 1231 // undefined, and it doesn't work in practice because of how the ABI 1232 // defines varargs anyway. 1233 if (fnType->getCallConv() == CC_Default || fnType->getCallConv() == CC_C) { 1234 bool HasAVXType = false; 1235 for (CallArgList::const_iterator 1236 it = args.begin(), ie = args.end(); it != ie; ++it) { 1237 if (getABIInfo().isPassedUsingAVXType(it->Ty)) { 1238 HasAVXType = true; 1239 break; 1240 } 1241 } 1242 1243 if (!HasAVXType) 1244 return true; 1245 } 1246 1247 return TargetCodeGenInfo::isNoProtoCallVariadic(args, fnType); 1248 } 1249 1250}; 1251 1252class WinX86_64TargetCodeGenInfo : public TargetCodeGenInfo { 1253public: 1254 WinX86_64TargetCodeGenInfo(CodeGen::CodeGenTypes &CGT) 1255 : TargetCodeGenInfo(new WinX86_64ABIInfo(CGT)) {} 1256 1257 int getDwarfEHStackPointer(CodeGen::CodeGenModule &CGM) const { 1258 return 7; 1259 } 1260 1261 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 1262 llvm::Value *Address) const { 1263 llvm::Value *Eight8 = llvm::ConstantInt::get(CGF.Int8Ty, 8); 1264 1265 // 0-15 are the 16 integer registers. 1266 // 16 is %rip. 1267 AssignToArrayRange(CGF.Builder, Address, Eight8, 0, 16); 1268 return false; 1269 } 1270}; 1271 1272} 1273 1274void X86_64ABIInfo::postMerge(unsigned AggregateSize, Class &Lo, 1275 Class &Hi) const { 1276 // AMD64-ABI 3.2.3p2: Rule 5. Then a post merger cleanup is done: 1277 // 1278 // (a) If one of the classes is Memory, the whole argument is passed in 1279 // memory. 1280 // 1281 // (b) If X87UP is not preceded by X87, the whole argument is passed in 1282 // memory. 1283 // 1284 // (c) If the size of the aggregate exceeds two eightbytes and the first 1285 // eightbyte isn't SSE or any other eightbyte isn't SSEUP, the whole 1286 // argument is passed in memory. NOTE: This is necessary to keep the 1287 // ABI working for processors that don't support the __m256 type. 1288 // 1289 // (d) If SSEUP is not preceded by SSE or SSEUP, it is converted to SSE. 1290 // 1291 // Some of these are enforced by the merging logic. Others can arise 1292 // only with unions; for example: 1293 // union { _Complex double; unsigned; } 1294 // 1295 // Note that clauses (b) and (c) were added in 0.98. 1296 // 1297 if (Hi == Memory) 1298 Lo = Memory; 1299 if (Hi == X87Up && Lo != X87 && honorsRevision0_98()) 1300 Lo = Memory; 1301 if (AggregateSize > 128 && (Lo != SSE || Hi != SSEUp)) 1302 Lo = Memory; 1303 if (Hi == SSEUp && Lo != SSE) 1304 Hi = SSE; 1305} 1306 1307X86_64ABIInfo::Class X86_64ABIInfo::merge(Class Accum, Class Field) { 1308 // AMD64-ABI 3.2.3p2: Rule 4. Each field of an object is 1309 // classified recursively so that always two fields are 1310 // considered. The resulting class is calculated according to 1311 // the classes of the fields in the eightbyte: 1312 // 1313 // (a) If both classes are equal, this is the resulting class. 1314 // 1315 // (b) If one of the classes is NO_CLASS, the resulting class is 1316 // the other class. 1317 // 1318 // (c) If one of the classes is MEMORY, the result is the MEMORY 1319 // class. 1320 // 1321 // (d) If one of the classes is INTEGER, the result is the 1322 // INTEGER. 1323 // 1324 // (e) If one of the classes is X87, X87UP, COMPLEX_X87 class, 1325 // MEMORY is used as class. 1326 // 1327 // (f) Otherwise class SSE is used. 1328 1329 // Accum should never be memory (we should have returned) or 1330 // ComplexX87 (because this cannot be passed in a structure). 1331 assert((Accum != Memory && Accum != ComplexX87) && 1332 "Invalid accumulated classification during merge."); 1333 if (Accum == Field || Field == NoClass) 1334 return Accum; 1335 if (Field == Memory) 1336 return Memory; 1337 if (Accum == NoClass) 1338 return Field; 1339 if (Accum == Integer || Field == Integer) 1340 return Integer; 1341 if (Field == X87 || Field == X87Up || Field == ComplexX87 || 1342 Accum == X87 || Accum == X87Up) 1343 return Memory; 1344 return SSE; 1345} 1346 1347void X86_64ABIInfo::classify(QualType Ty, uint64_t OffsetBase, 1348 Class &Lo, Class &Hi) const { 1349 // FIXME: This code can be simplified by introducing a simple value class for 1350 // Class pairs with appropriate constructor methods for the various 1351 // situations. 1352 1353 // FIXME: Some of the split computations are wrong; unaligned vectors 1354 // shouldn't be passed in registers for example, so there is no chance they 1355 // can straddle an eightbyte. Verify & simplify. 1356 1357 Lo = Hi = NoClass; 1358 1359 Class &Current = OffsetBase < 64 ? Lo : Hi; 1360 Current = Memory; 1361 1362 if (const BuiltinType *BT = Ty->getAs<BuiltinType>()) { 1363 BuiltinType::Kind k = BT->getKind(); 1364 1365 if (k == BuiltinType::Void) { 1366 Current = NoClass; 1367 } else if (k == BuiltinType::Int128 || k == BuiltinType::UInt128) { 1368 Lo = Integer; 1369 Hi = Integer; 1370 } else if (k >= BuiltinType::Bool && k <= BuiltinType::LongLong) { 1371 Current = Integer; 1372 } else if ((k == BuiltinType::Float || k == BuiltinType::Double) || 1373 (k == BuiltinType::LongDouble && 1374 getTarget().getTriple().getOS() == llvm::Triple::NaCl)) { 1375 Current = SSE; 1376 } else if (k == BuiltinType::LongDouble) { 1377 Lo = X87; 1378 Hi = X87Up; 1379 } 1380 // FIXME: _Decimal32 and _Decimal64 are SSE. 1381 // FIXME: _float128 and _Decimal128 are (SSE, SSEUp). 1382 return; 1383 } 1384 1385 if (const EnumType *ET = Ty->getAs<EnumType>()) { 1386 // Classify the underlying integer type. 1387 classify(ET->getDecl()->getIntegerType(), OffsetBase, Lo, Hi); 1388 return; 1389 } 1390 1391 if (Ty->hasPointerRepresentation()) { 1392 Current = Integer; 1393 return; 1394 } 1395 1396 if (Ty->isMemberPointerType()) { 1397 if (Ty->isMemberFunctionPointerType() && Has64BitPointers) 1398 Lo = Hi = Integer; 1399 else 1400 Current = Integer; 1401 return; 1402 } 1403 1404 if (const VectorType *VT = Ty->getAs<VectorType>()) { 1405 uint64_t Size = getContext().getTypeSize(VT); 1406 if (Size == 32) { 1407 // gcc passes all <4 x char>, <2 x short>, <1 x int>, <1 x 1408 // float> as integer. 1409 Current = Integer; 1410 1411 // If this type crosses an eightbyte boundary, it should be 1412 // split. 1413 uint64_t EB_Real = (OffsetBase) / 64; 1414 uint64_t EB_Imag = (OffsetBase + Size - 1) / 64; 1415 if (EB_Real != EB_Imag) 1416 Hi = Lo; 1417 } else if (Size == 64) { 1418 // gcc passes <1 x double> in memory. :( 1419 if (VT->getElementType()->isSpecificBuiltinType(BuiltinType::Double)) 1420 return; 1421 1422 // gcc passes <1 x long long> as INTEGER. 1423 if (VT->getElementType()->isSpecificBuiltinType(BuiltinType::LongLong) || 1424 VT->getElementType()->isSpecificBuiltinType(BuiltinType::ULongLong) || 1425 VT->getElementType()->isSpecificBuiltinType(BuiltinType::Long) || 1426 VT->getElementType()->isSpecificBuiltinType(BuiltinType::ULong)) 1427 Current = Integer; 1428 else 1429 Current = SSE; 1430 1431 // If this type crosses an eightbyte boundary, it should be 1432 // split. 1433 if (OffsetBase && OffsetBase != 64) 1434 Hi = Lo; 1435 } else if (Size == 128 || (HasAVX && Size == 256)) { 1436 // Arguments of 256-bits are split into four eightbyte chunks. The 1437 // least significant one belongs to class SSE and all the others to class 1438 // SSEUP. The original Lo and Hi design considers that types can't be 1439 // greater than 128-bits, so a 64-bit split in Hi and Lo makes sense. 1440 // This design isn't correct for 256-bits, but since there're no cases 1441 // where the upper parts would need to be inspected, avoid adding 1442 // complexity and just consider Hi to match the 64-256 part. 1443 Lo = SSE; 1444 Hi = SSEUp; 1445 } 1446 return; 1447 } 1448 1449 if (const ComplexType *CT = Ty->getAs<ComplexType>()) { 1450 QualType ET = getContext().getCanonicalType(CT->getElementType()); 1451 1452 uint64_t Size = getContext().getTypeSize(Ty); 1453 if (ET->isIntegralOrEnumerationType()) { 1454 if (Size <= 64) 1455 Current = Integer; 1456 else if (Size <= 128) 1457 Lo = Hi = Integer; 1458 } else if (ET == getContext().FloatTy) 1459 Current = SSE; 1460 else if (ET == getContext().DoubleTy || 1461 (ET == getContext().LongDoubleTy && 1462 getTarget().getTriple().getOS() == llvm::Triple::NaCl)) 1463 Lo = Hi = SSE; 1464 else if (ET == getContext().LongDoubleTy) 1465 Current = ComplexX87; 1466 1467 // If this complex type crosses an eightbyte boundary then it 1468 // should be split. 1469 uint64_t EB_Real = (OffsetBase) / 64; 1470 uint64_t EB_Imag = (OffsetBase + getContext().getTypeSize(ET)) / 64; 1471 if (Hi == NoClass && EB_Real != EB_Imag) 1472 Hi = Lo; 1473 1474 return; 1475 } 1476 1477 if (const ConstantArrayType *AT = getContext().getAsConstantArrayType(Ty)) { 1478 // Arrays are treated like structures. 1479 1480 uint64_t Size = getContext().getTypeSize(Ty); 1481 1482 // AMD64-ABI 3.2.3p2: Rule 1. If the size of an object is larger 1483 // than four eightbytes, ..., it has class MEMORY. 1484 if (Size > 256) 1485 return; 1486 1487 // AMD64-ABI 3.2.3p2: Rule 1. If ..., or it contains unaligned 1488 // fields, it has class MEMORY. 1489 // 1490 // Only need to check alignment of array base. 1491 if (OffsetBase % getContext().getTypeAlign(AT->getElementType())) 1492 return; 1493 1494 // Otherwise implement simplified merge. We could be smarter about 1495 // this, but it isn't worth it and would be harder to verify. 1496 Current = NoClass; 1497 uint64_t EltSize = getContext().getTypeSize(AT->getElementType()); 1498 uint64_t ArraySize = AT->getSize().getZExtValue(); 1499 1500 // The only case a 256-bit wide vector could be used is when the array 1501 // contains a single 256-bit element. Since Lo and Hi logic isn't extended 1502 // to work for sizes wider than 128, early check and fallback to memory. 1503 if (Size > 128 && EltSize != 256) 1504 return; 1505 1506 for (uint64_t i=0, Offset=OffsetBase; i<ArraySize; ++i, Offset += EltSize) { 1507 Class FieldLo, FieldHi; 1508 classify(AT->getElementType(), Offset, FieldLo, FieldHi); 1509 Lo = merge(Lo, FieldLo); 1510 Hi = merge(Hi, FieldHi); 1511 if (Lo == Memory || Hi == Memory) 1512 break; 1513 } 1514 1515 postMerge(Size, Lo, Hi); 1516 assert((Hi != SSEUp || Lo == SSE) && "Invalid SSEUp array classification."); 1517 return; 1518 } 1519 1520 if (const RecordType *RT = Ty->getAs<RecordType>()) { 1521 uint64_t Size = getContext().getTypeSize(Ty); 1522 1523 // AMD64-ABI 3.2.3p2: Rule 1. If the size of an object is larger 1524 // than four eightbytes, ..., it has class MEMORY. 1525 if (Size > 256) 1526 return; 1527 1528 // AMD64-ABI 3.2.3p2: Rule 2. If a C++ object has either a non-trivial 1529 // copy constructor or a non-trivial destructor, it is passed by invisible 1530 // reference. 1531 if (hasNonTrivialDestructorOrCopyConstructor(RT)) 1532 return; 1533 1534 const RecordDecl *RD = RT->getDecl(); 1535 1536 // Assume variable sized types are passed in memory. 1537 if (RD->hasFlexibleArrayMember()) 1538 return; 1539 1540 const ASTRecordLayout &Layout = getContext().getASTRecordLayout(RD); 1541 1542 // Reset Lo class, this will be recomputed. 1543 Current = NoClass; 1544 1545 // If this is a C++ record, classify the bases first. 1546 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) { 1547 for (CXXRecordDecl::base_class_const_iterator i = CXXRD->bases_begin(), 1548 e = CXXRD->bases_end(); i != e; ++i) { 1549 assert(!i->isVirtual() && !i->getType()->isDependentType() && 1550 "Unexpected base class!"); 1551 const CXXRecordDecl *Base = 1552 cast<CXXRecordDecl>(i->getType()->getAs<RecordType>()->getDecl()); 1553 1554 // Classify this field. 1555 // 1556 // AMD64-ABI 3.2.3p2: Rule 3. If the size of the aggregate exceeds a 1557 // single eightbyte, each is classified separately. Each eightbyte gets 1558 // initialized to class NO_CLASS. 1559 Class FieldLo, FieldHi; 1560 uint64_t Offset = 1561 OffsetBase + getContext().toBits(Layout.getBaseClassOffset(Base)); 1562 classify(i->getType(), Offset, FieldLo, FieldHi); 1563 Lo = merge(Lo, FieldLo); 1564 Hi = merge(Hi, FieldHi); 1565 if (Lo == Memory || Hi == Memory) 1566 break; 1567 } 1568 } 1569 1570 // Classify the fields one at a time, merging the results. 1571 unsigned idx = 0; 1572 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 1573 i != e; ++i, ++idx) { 1574 uint64_t Offset = OffsetBase + Layout.getFieldOffset(idx); 1575 bool BitField = i->isBitField(); 1576 1577 // AMD64-ABI 3.2.3p2: Rule 1. If the size of an object is larger than 1578 // four eightbytes, or it contains unaligned fields, it has class MEMORY. 1579 // 1580 // The only case a 256-bit wide vector could be used is when the struct 1581 // contains a single 256-bit element. Since Lo and Hi logic isn't extended 1582 // to work for sizes wider than 128, early check and fallback to memory. 1583 // 1584 if (Size > 128 && getContext().getTypeSize(i->getType()) != 256) { 1585 Lo = Memory; 1586 return; 1587 } 1588 // Note, skip this test for bit-fields, see below. 1589 if (!BitField && Offset % getContext().getTypeAlign(i->getType())) { 1590 Lo = Memory; 1591 return; 1592 } 1593 1594 // Classify this field. 1595 // 1596 // AMD64-ABI 3.2.3p2: Rule 3. If the size of the aggregate 1597 // exceeds a single eightbyte, each is classified 1598 // separately. Each eightbyte gets initialized to class 1599 // NO_CLASS. 1600 Class FieldLo, FieldHi; 1601 1602 // Bit-fields require special handling, they do not force the 1603 // structure to be passed in memory even if unaligned, and 1604 // therefore they can straddle an eightbyte. 1605 if (BitField) { 1606 // Ignore padding bit-fields. 1607 if (i->isUnnamedBitfield()) 1608 continue; 1609 1610 uint64_t Offset = OffsetBase + Layout.getFieldOffset(idx); 1611 uint64_t Size = i->getBitWidthValue(getContext()); 1612 1613 uint64_t EB_Lo = Offset / 64; 1614 uint64_t EB_Hi = (Offset + Size - 1) / 64; 1615 FieldLo = FieldHi = NoClass; 1616 if (EB_Lo) { 1617 assert(EB_Hi == EB_Lo && "Invalid classification, type > 16 bytes."); 1618 FieldLo = NoClass; 1619 FieldHi = Integer; 1620 } else { 1621 FieldLo = Integer; 1622 FieldHi = EB_Hi ? Integer : NoClass; 1623 } 1624 } else 1625 classify(i->getType(), Offset, FieldLo, FieldHi); 1626 Lo = merge(Lo, FieldLo); 1627 Hi = merge(Hi, FieldHi); 1628 if (Lo == Memory || Hi == Memory) 1629 break; 1630 } 1631 1632 postMerge(Size, Lo, Hi); 1633 } 1634} 1635 1636ABIArgInfo X86_64ABIInfo::getIndirectReturnResult(QualType Ty) const { 1637 // If this is a scalar LLVM value then assume LLVM will pass it in the right 1638 // place naturally. 1639 if (!isAggregateTypeForABI(Ty)) { 1640 // Treat an enum type as its underlying type. 1641 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 1642 Ty = EnumTy->getDecl()->getIntegerType(); 1643 1644 return (Ty->isPromotableIntegerType() ? 1645 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 1646 } 1647 1648 return ABIArgInfo::getIndirect(0); 1649} 1650 1651bool X86_64ABIInfo::IsIllegalVectorType(QualType Ty) const { 1652 if (const VectorType *VecTy = Ty->getAs<VectorType>()) { 1653 uint64_t Size = getContext().getTypeSize(VecTy); 1654 unsigned LargestVector = HasAVX ? 256 : 128; 1655 if (Size <= 64 || Size > LargestVector) 1656 return true; 1657 } 1658 1659 return false; 1660} 1661 1662ABIArgInfo X86_64ABIInfo::getIndirectResult(QualType Ty, 1663 unsigned freeIntRegs) const { 1664 // If this is a scalar LLVM value then assume LLVM will pass it in the right 1665 // place naturally. 1666 // 1667 // This assumption is optimistic, as there could be free registers available 1668 // when we need to pass this argument in memory, and LLVM could try to pass 1669 // the argument in the free register. This does not seem to happen currently, 1670 // but this code would be much safer if we could mark the argument with 1671 // 'onstack'. See PR12193. 1672 if (!isAggregateTypeForABI(Ty) && !IsIllegalVectorType(Ty)) { 1673 // Treat an enum type as its underlying type. 1674 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 1675 Ty = EnumTy->getDecl()->getIntegerType(); 1676 1677 return (Ty->isPromotableIntegerType() ? 1678 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 1679 } 1680 1681 if (isRecordWithNonTrivialDestructorOrCopyConstructor(Ty)) 1682 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 1683 1684 // Compute the byval alignment. We specify the alignment of the byval in all 1685 // cases so that the mid-level optimizer knows the alignment of the byval. 1686 unsigned Align = std::max(getContext().getTypeAlign(Ty) / 8, 8U); 1687 1688 // Attempt to avoid passing indirect results using byval when possible. This 1689 // is important for good codegen. 1690 // 1691 // We do this by coercing the value into a scalar type which the backend can 1692 // handle naturally (i.e., without using byval). 1693 // 1694 // For simplicity, we currently only do this when we have exhausted all of the 1695 // free integer registers. Doing this when there are free integer registers 1696 // would require more care, as we would have to ensure that the coerced value 1697 // did not claim the unused register. That would require either reording the 1698 // arguments to the function (so that any subsequent inreg values came first), 1699 // or only doing this optimization when there were no following arguments that 1700 // might be inreg. 1701 // 1702 // We currently expect it to be rare (particularly in well written code) for 1703 // arguments to be passed on the stack when there are still free integer 1704 // registers available (this would typically imply large structs being passed 1705 // by value), so this seems like a fair tradeoff for now. 1706 // 1707 // We can revisit this if the backend grows support for 'onstack' parameter 1708 // attributes. See PR12193. 1709 if (freeIntRegs == 0) { 1710 uint64_t Size = getContext().getTypeSize(Ty); 1711 1712 // If this type fits in an eightbyte, coerce it into the matching integral 1713 // type, which will end up on the stack (with alignment 8). 1714 if (Align == 8 && Size <= 64) 1715 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(), 1716 Size)); 1717 } 1718 1719 return ABIArgInfo::getIndirect(Align); 1720} 1721 1722/// GetByteVectorType - The ABI specifies that a value should be passed in an 1723/// full vector XMM/YMM register. Pick an LLVM IR type that will be passed as a 1724/// vector register. 1725llvm::Type *X86_64ABIInfo::GetByteVectorType(QualType Ty) const { 1726 llvm::Type *IRType = CGT.ConvertType(Ty); 1727 1728 // Wrapper structs that just contain vectors are passed just like vectors, 1729 // strip them off if present. 1730 llvm::StructType *STy = dyn_cast<llvm::StructType>(IRType); 1731 while (STy && STy->getNumElements() == 1) { 1732 IRType = STy->getElementType(0); 1733 STy = dyn_cast<llvm::StructType>(IRType); 1734 } 1735 1736 // If the preferred type is a 16-byte vector, prefer to pass it. 1737 if (llvm::VectorType *VT = dyn_cast<llvm::VectorType>(IRType)){ 1738 llvm::Type *EltTy = VT->getElementType(); 1739 unsigned BitWidth = VT->getBitWidth(); 1740 if ((BitWidth >= 128 && BitWidth <= 256) && 1741 (EltTy->isFloatTy() || EltTy->isDoubleTy() || 1742 EltTy->isIntegerTy(8) || EltTy->isIntegerTy(16) || 1743 EltTy->isIntegerTy(32) || EltTy->isIntegerTy(64) || 1744 EltTy->isIntegerTy(128))) 1745 return VT; 1746 } 1747 1748 return llvm::VectorType::get(llvm::Type::getDoubleTy(getVMContext()), 2); 1749} 1750 1751/// BitsContainNoUserData - Return true if the specified [start,end) bit range 1752/// is known to either be off the end of the specified type or being in 1753/// alignment padding. The user type specified is known to be at most 128 bits 1754/// in size, and have passed through X86_64ABIInfo::classify with a successful 1755/// classification that put one of the two halves in the INTEGER class. 1756/// 1757/// It is conservatively correct to return false. 1758static bool BitsContainNoUserData(QualType Ty, unsigned StartBit, 1759 unsigned EndBit, ASTContext &Context) { 1760 // If the bytes being queried are off the end of the type, there is no user 1761 // data hiding here. This handles analysis of builtins, vectors and other 1762 // types that don't contain interesting padding. 1763 unsigned TySize = (unsigned)Context.getTypeSize(Ty); 1764 if (TySize <= StartBit) 1765 return true; 1766 1767 if (const ConstantArrayType *AT = Context.getAsConstantArrayType(Ty)) { 1768 unsigned EltSize = (unsigned)Context.getTypeSize(AT->getElementType()); 1769 unsigned NumElts = (unsigned)AT->getSize().getZExtValue(); 1770 1771 // Check each element to see if the element overlaps with the queried range. 1772 for (unsigned i = 0; i != NumElts; ++i) { 1773 // If the element is after the span we care about, then we're done.. 1774 unsigned EltOffset = i*EltSize; 1775 if (EltOffset >= EndBit) break; 1776 1777 unsigned EltStart = EltOffset < StartBit ? StartBit-EltOffset :0; 1778 if (!BitsContainNoUserData(AT->getElementType(), EltStart, 1779 EndBit-EltOffset, Context)) 1780 return false; 1781 } 1782 // If it overlaps no elements, then it is safe to process as padding. 1783 return true; 1784 } 1785 1786 if (const RecordType *RT = Ty->getAs<RecordType>()) { 1787 const RecordDecl *RD = RT->getDecl(); 1788 const ASTRecordLayout &Layout = Context.getASTRecordLayout(RD); 1789 1790 // If this is a C++ record, check the bases first. 1791 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) { 1792 for (CXXRecordDecl::base_class_const_iterator i = CXXRD->bases_begin(), 1793 e = CXXRD->bases_end(); i != e; ++i) { 1794 assert(!i->isVirtual() && !i->getType()->isDependentType() && 1795 "Unexpected base class!"); 1796 const CXXRecordDecl *Base = 1797 cast<CXXRecordDecl>(i->getType()->getAs<RecordType>()->getDecl()); 1798 1799 // If the base is after the span we care about, ignore it. 1800 unsigned BaseOffset = Context.toBits(Layout.getBaseClassOffset(Base)); 1801 if (BaseOffset >= EndBit) continue; 1802 1803 unsigned BaseStart = BaseOffset < StartBit ? StartBit-BaseOffset :0; 1804 if (!BitsContainNoUserData(i->getType(), BaseStart, 1805 EndBit-BaseOffset, Context)) 1806 return false; 1807 } 1808 } 1809 1810 // Verify that no field has data that overlaps the region of interest. Yes 1811 // this could be sped up a lot by being smarter about queried fields, 1812 // however we're only looking at structs up to 16 bytes, so we don't care 1813 // much. 1814 unsigned idx = 0; 1815 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 1816 i != e; ++i, ++idx) { 1817 unsigned FieldOffset = (unsigned)Layout.getFieldOffset(idx); 1818 1819 // If we found a field after the region we care about, then we're done. 1820 if (FieldOffset >= EndBit) break; 1821 1822 unsigned FieldStart = FieldOffset < StartBit ? StartBit-FieldOffset :0; 1823 if (!BitsContainNoUserData(i->getType(), FieldStart, EndBit-FieldOffset, 1824 Context)) 1825 return false; 1826 } 1827 1828 // If nothing in this record overlapped the area of interest, then we're 1829 // clean. 1830 return true; 1831 } 1832 1833 return false; 1834} 1835 1836/// ContainsFloatAtOffset - Return true if the specified LLVM IR type has a 1837/// float member at the specified offset. For example, {int,{float}} has a 1838/// float at offset 4. It is conservatively correct for this routine to return 1839/// false. 1840static bool ContainsFloatAtOffset(llvm::Type *IRType, unsigned IROffset, 1841 const llvm::DataLayout &TD) { 1842 // Base case if we find a float. 1843 if (IROffset == 0 && IRType->isFloatTy()) 1844 return true; 1845 1846 // If this is a struct, recurse into the field at the specified offset. 1847 if (llvm::StructType *STy = dyn_cast<llvm::StructType>(IRType)) { 1848 const llvm::StructLayout *SL = TD.getStructLayout(STy); 1849 unsigned Elt = SL->getElementContainingOffset(IROffset); 1850 IROffset -= SL->getElementOffset(Elt); 1851 return ContainsFloatAtOffset(STy->getElementType(Elt), IROffset, TD); 1852 } 1853 1854 // If this is an array, recurse into the field at the specified offset. 1855 if (llvm::ArrayType *ATy = dyn_cast<llvm::ArrayType>(IRType)) { 1856 llvm::Type *EltTy = ATy->getElementType(); 1857 unsigned EltSize = TD.getTypeAllocSize(EltTy); 1858 IROffset -= IROffset/EltSize*EltSize; 1859 return ContainsFloatAtOffset(EltTy, IROffset, TD); 1860 } 1861 1862 return false; 1863} 1864 1865 1866/// GetSSETypeAtOffset - Return a type that will be passed by the backend in the 1867/// low 8 bytes of an XMM register, corresponding to the SSE class. 1868llvm::Type *X86_64ABIInfo:: 1869GetSSETypeAtOffset(llvm::Type *IRType, unsigned IROffset, 1870 QualType SourceTy, unsigned SourceOffset) const { 1871 // The only three choices we have are either double, <2 x float>, or float. We 1872 // pass as float if the last 4 bytes is just padding. This happens for 1873 // structs that contain 3 floats. 1874 if (BitsContainNoUserData(SourceTy, SourceOffset*8+32, 1875 SourceOffset*8+64, getContext())) 1876 return llvm::Type::getFloatTy(getVMContext()); 1877 1878 // We want to pass as <2 x float> if the LLVM IR type contains a float at 1879 // offset+0 and offset+4. Walk the LLVM IR type to find out if this is the 1880 // case. 1881 if (ContainsFloatAtOffset(IRType, IROffset, getDataLayout()) && 1882 ContainsFloatAtOffset(IRType, IROffset+4, getDataLayout())) 1883 return llvm::VectorType::get(llvm::Type::getFloatTy(getVMContext()), 2); 1884 1885 return llvm::Type::getDoubleTy(getVMContext()); 1886} 1887 1888 1889/// GetINTEGERTypeAtOffset - The ABI specifies that a value should be passed in 1890/// an 8-byte GPR. This means that we either have a scalar or we are talking 1891/// about the high or low part of an up-to-16-byte struct. This routine picks 1892/// the best LLVM IR type to represent this, which may be i64 or may be anything 1893/// else that the backend will pass in a GPR that works better (e.g. i8, %foo*, 1894/// etc). 1895/// 1896/// PrefType is an LLVM IR type that corresponds to (part of) the IR type for 1897/// the source type. IROffset is an offset in bytes into the LLVM IR type that 1898/// the 8-byte value references. PrefType may be null. 1899/// 1900/// SourceTy is the source level type for the entire argument. SourceOffset is 1901/// an offset into this that we're processing (which is always either 0 or 8). 1902/// 1903llvm::Type *X86_64ABIInfo:: 1904GetINTEGERTypeAtOffset(llvm::Type *IRType, unsigned IROffset, 1905 QualType SourceTy, unsigned SourceOffset) const { 1906 // If we're dealing with an un-offset LLVM IR type, then it means that we're 1907 // returning an 8-byte unit starting with it. See if we can safely use it. 1908 if (IROffset == 0) { 1909 // Pointers and int64's always fill the 8-byte unit. 1910 if ((isa<llvm::PointerType>(IRType) && Has64BitPointers) || 1911 IRType->isIntegerTy(64)) 1912 return IRType; 1913 1914 // If we have a 1/2/4-byte integer, we can use it only if the rest of the 1915 // goodness in the source type is just tail padding. This is allowed to 1916 // kick in for struct {double,int} on the int, but not on 1917 // struct{double,int,int} because we wouldn't return the second int. We 1918 // have to do this analysis on the source type because we can't depend on 1919 // unions being lowered a specific way etc. 1920 if (IRType->isIntegerTy(8) || IRType->isIntegerTy(16) || 1921 IRType->isIntegerTy(32) || 1922 (isa<llvm::PointerType>(IRType) && !Has64BitPointers)) { 1923 unsigned BitWidth = isa<llvm::PointerType>(IRType) ? 32 : 1924 cast<llvm::IntegerType>(IRType)->getBitWidth(); 1925 1926 if (BitsContainNoUserData(SourceTy, SourceOffset*8+BitWidth, 1927 SourceOffset*8+64, getContext())) 1928 return IRType; 1929 } 1930 } 1931 1932 if (llvm::StructType *STy = dyn_cast<llvm::StructType>(IRType)) { 1933 // If this is a struct, recurse into the field at the specified offset. 1934 const llvm::StructLayout *SL = getDataLayout().getStructLayout(STy); 1935 if (IROffset < SL->getSizeInBytes()) { 1936 unsigned FieldIdx = SL->getElementContainingOffset(IROffset); 1937 IROffset -= SL->getElementOffset(FieldIdx); 1938 1939 return GetINTEGERTypeAtOffset(STy->getElementType(FieldIdx), IROffset, 1940 SourceTy, SourceOffset); 1941 } 1942 } 1943 1944 if (llvm::ArrayType *ATy = dyn_cast<llvm::ArrayType>(IRType)) { 1945 llvm::Type *EltTy = ATy->getElementType(); 1946 unsigned EltSize = getDataLayout().getTypeAllocSize(EltTy); 1947 unsigned EltOffset = IROffset/EltSize*EltSize; 1948 return GetINTEGERTypeAtOffset(EltTy, IROffset-EltOffset, SourceTy, 1949 SourceOffset); 1950 } 1951 1952 // Okay, we don't have any better idea of what to pass, so we pass this in an 1953 // integer register that isn't too big to fit the rest of the struct. 1954 unsigned TySizeInBytes = 1955 (unsigned)getContext().getTypeSizeInChars(SourceTy).getQuantity(); 1956 1957 assert(TySizeInBytes != SourceOffset && "Empty field?"); 1958 1959 // It is always safe to classify this as an integer type up to i64 that 1960 // isn't larger than the structure. 1961 return llvm::IntegerType::get(getVMContext(), 1962 std::min(TySizeInBytes-SourceOffset, 8U)*8); 1963} 1964 1965 1966/// GetX86_64ByValArgumentPair - Given a high and low type that can ideally 1967/// be used as elements of a two register pair to pass or return, return a 1968/// first class aggregate to represent them. For example, if the low part of 1969/// a by-value argument should be passed as i32* and the high part as float, 1970/// return {i32*, float}. 1971static llvm::Type * 1972GetX86_64ByValArgumentPair(llvm::Type *Lo, llvm::Type *Hi, 1973 const llvm::DataLayout &TD) { 1974 // In order to correctly satisfy the ABI, we need to the high part to start 1975 // at offset 8. If the high and low parts we inferred are both 4-byte types 1976 // (e.g. i32 and i32) then the resultant struct type ({i32,i32}) won't have 1977 // the second element at offset 8. Check for this: 1978 unsigned LoSize = (unsigned)TD.getTypeAllocSize(Lo); 1979 unsigned HiAlign = TD.getABITypeAlignment(Hi); 1980 unsigned HiStart = llvm::DataLayout::RoundUpAlignment(LoSize, HiAlign); 1981 assert(HiStart != 0 && HiStart <= 8 && "Invalid x86-64 argument pair!"); 1982 1983 // To handle this, we have to increase the size of the low part so that the 1984 // second element will start at an 8 byte offset. We can't increase the size 1985 // of the second element because it might make us access off the end of the 1986 // struct. 1987 if (HiStart != 8) { 1988 // There are only two sorts of types the ABI generation code can produce for 1989 // the low part of a pair that aren't 8 bytes in size: float or i8/i16/i32. 1990 // Promote these to a larger type. 1991 if (Lo->isFloatTy()) 1992 Lo = llvm::Type::getDoubleTy(Lo->getContext()); 1993 else { 1994 assert(Lo->isIntegerTy() && "Invalid/unknown lo type"); 1995 Lo = llvm::Type::getInt64Ty(Lo->getContext()); 1996 } 1997 } 1998 1999 llvm::StructType *Result = llvm::StructType::get(Lo, Hi, NULL); 2000 2001 2002 // Verify that the second element is at an 8-byte offset. 2003 assert(TD.getStructLayout(Result)->getElementOffset(1) == 8 && 2004 "Invalid x86-64 argument pair!"); 2005 return Result; 2006} 2007 2008ABIArgInfo X86_64ABIInfo:: 2009classifyReturnType(QualType RetTy) const { 2010 // AMD64-ABI 3.2.3p4: Rule 1. Classify the return type with the 2011 // classification algorithm. 2012 X86_64ABIInfo::Class Lo, Hi; 2013 classify(RetTy, 0, Lo, Hi); 2014 2015 // Check some invariants. 2016 assert((Hi != Memory || Lo == Memory) && "Invalid memory classification."); 2017 assert((Hi != SSEUp || Lo == SSE) && "Invalid SSEUp classification."); 2018 2019 llvm::Type *ResType = 0; 2020 switch (Lo) { 2021 case NoClass: 2022 if (Hi == NoClass) 2023 return ABIArgInfo::getIgnore(); 2024 // If the low part is just padding, it takes no register, leave ResType 2025 // null. 2026 assert((Hi == SSE || Hi == Integer || Hi == X87Up) && 2027 "Unknown missing lo part"); 2028 break; 2029 2030 case SSEUp: 2031 case X87Up: 2032 llvm_unreachable("Invalid classification for lo word."); 2033 2034 // AMD64-ABI 3.2.3p4: Rule 2. Types of class memory are returned via 2035 // hidden argument. 2036 case Memory: 2037 return getIndirectReturnResult(RetTy); 2038 2039 // AMD64-ABI 3.2.3p4: Rule 3. If the class is INTEGER, the next 2040 // available register of the sequence %rax, %rdx is used. 2041 case Integer: 2042 ResType = GetINTEGERTypeAtOffset(CGT.ConvertType(RetTy), 0, RetTy, 0); 2043 2044 // If we have a sign or zero extended integer, make sure to return Extend 2045 // so that the parameter gets the right LLVM IR attributes. 2046 if (Hi == NoClass && isa<llvm::IntegerType>(ResType)) { 2047 // Treat an enum type as its underlying type. 2048 if (const EnumType *EnumTy = RetTy->getAs<EnumType>()) 2049 RetTy = EnumTy->getDecl()->getIntegerType(); 2050 2051 if (RetTy->isIntegralOrEnumerationType() && 2052 RetTy->isPromotableIntegerType()) 2053 return ABIArgInfo::getExtend(); 2054 } 2055 break; 2056 2057 // AMD64-ABI 3.2.3p4: Rule 4. If the class is SSE, the next 2058 // available SSE register of the sequence %xmm0, %xmm1 is used. 2059 case SSE: 2060 ResType = GetSSETypeAtOffset(CGT.ConvertType(RetTy), 0, RetTy, 0); 2061 break; 2062 2063 // AMD64-ABI 3.2.3p4: Rule 6. If the class is X87, the value is 2064 // returned on the X87 stack in %st0 as 80-bit x87 number. 2065 case X87: 2066 ResType = llvm::Type::getX86_FP80Ty(getVMContext()); 2067 break; 2068 2069 // AMD64-ABI 3.2.3p4: Rule 8. If the class is COMPLEX_X87, the real 2070 // part of the value is returned in %st0 and the imaginary part in 2071 // %st1. 2072 case ComplexX87: 2073 assert(Hi == ComplexX87 && "Unexpected ComplexX87 classification."); 2074 ResType = llvm::StructType::get(llvm::Type::getX86_FP80Ty(getVMContext()), 2075 llvm::Type::getX86_FP80Ty(getVMContext()), 2076 NULL); 2077 break; 2078 } 2079 2080 llvm::Type *HighPart = 0; 2081 switch (Hi) { 2082 // Memory was handled previously and X87 should 2083 // never occur as a hi class. 2084 case Memory: 2085 case X87: 2086 llvm_unreachable("Invalid classification for hi word."); 2087 2088 case ComplexX87: // Previously handled. 2089 case NoClass: 2090 break; 2091 2092 case Integer: 2093 HighPart = GetINTEGERTypeAtOffset(CGT.ConvertType(RetTy), 8, RetTy, 8); 2094 if (Lo == NoClass) // Return HighPart at offset 8 in memory. 2095 return ABIArgInfo::getDirect(HighPart, 8); 2096 break; 2097 case SSE: 2098 HighPart = GetSSETypeAtOffset(CGT.ConvertType(RetTy), 8, RetTy, 8); 2099 if (Lo == NoClass) // Return HighPart at offset 8 in memory. 2100 return ABIArgInfo::getDirect(HighPart, 8); 2101 break; 2102 2103 // AMD64-ABI 3.2.3p4: Rule 5. If the class is SSEUP, the eightbyte 2104 // is passed in the next available eightbyte chunk if the last used 2105 // vector register. 2106 // 2107 // SSEUP should always be preceded by SSE, just widen. 2108 case SSEUp: 2109 assert(Lo == SSE && "Unexpected SSEUp classification."); 2110 ResType = GetByteVectorType(RetTy); 2111 break; 2112 2113 // AMD64-ABI 3.2.3p4: Rule 7. If the class is X87UP, the value is 2114 // returned together with the previous X87 value in %st0. 2115 case X87Up: 2116 // If X87Up is preceded by X87, we don't need to do 2117 // anything. However, in some cases with unions it may not be 2118 // preceded by X87. In such situations we follow gcc and pass the 2119 // extra bits in an SSE reg. 2120 if (Lo != X87) { 2121 HighPart = GetSSETypeAtOffset(CGT.ConvertType(RetTy), 8, RetTy, 8); 2122 if (Lo == NoClass) // Return HighPart at offset 8 in memory. 2123 return ABIArgInfo::getDirect(HighPart, 8); 2124 } 2125 break; 2126 } 2127 2128 // If a high part was specified, merge it together with the low part. It is 2129 // known to pass in the high eightbyte of the result. We do this by forming a 2130 // first class struct aggregate with the high and low part: {low, high} 2131 if (HighPart) 2132 ResType = GetX86_64ByValArgumentPair(ResType, HighPart, getDataLayout()); 2133 2134 return ABIArgInfo::getDirect(ResType); 2135} 2136 2137ABIArgInfo X86_64ABIInfo::classifyArgumentType( 2138 QualType Ty, unsigned freeIntRegs, unsigned &neededInt, unsigned &neededSSE) 2139 const 2140{ 2141 X86_64ABIInfo::Class Lo, Hi; 2142 classify(Ty, 0, Lo, Hi); 2143 2144 // Check some invariants. 2145 // FIXME: Enforce these by construction. 2146 assert((Hi != Memory || Lo == Memory) && "Invalid memory classification."); 2147 assert((Hi != SSEUp || Lo == SSE) && "Invalid SSEUp classification."); 2148 2149 neededInt = 0; 2150 neededSSE = 0; 2151 llvm::Type *ResType = 0; 2152 switch (Lo) { 2153 case NoClass: 2154 if (Hi == NoClass) 2155 return ABIArgInfo::getIgnore(); 2156 // If the low part is just padding, it takes no register, leave ResType 2157 // null. 2158 assert((Hi == SSE || Hi == Integer || Hi == X87Up) && 2159 "Unknown missing lo part"); 2160 break; 2161 2162 // AMD64-ABI 3.2.3p3: Rule 1. If the class is MEMORY, pass the argument 2163 // on the stack. 2164 case Memory: 2165 2166 // AMD64-ABI 3.2.3p3: Rule 5. If the class is X87, X87UP or 2167 // COMPLEX_X87, it is passed in memory. 2168 case X87: 2169 case ComplexX87: 2170 if (isRecordWithNonTrivialDestructorOrCopyConstructor(Ty)) 2171 ++neededInt; 2172 return getIndirectResult(Ty, freeIntRegs); 2173 2174 case SSEUp: 2175 case X87Up: 2176 llvm_unreachable("Invalid classification for lo word."); 2177 2178 // AMD64-ABI 3.2.3p3: Rule 2. If the class is INTEGER, the next 2179 // available register of the sequence %rdi, %rsi, %rdx, %rcx, %r8 2180 // and %r9 is used. 2181 case Integer: 2182 ++neededInt; 2183 2184 // Pick an 8-byte type based on the preferred type. 2185 ResType = GetINTEGERTypeAtOffset(CGT.ConvertType(Ty), 0, Ty, 0); 2186 2187 // If we have a sign or zero extended integer, make sure to return Extend 2188 // so that the parameter gets the right LLVM IR attributes. 2189 if (Hi == NoClass && isa<llvm::IntegerType>(ResType)) { 2190 // Treat an enum type as its underlying type. 2191 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 2192 Ty = EnumTy->getDecl()->getIntegerType(); 2193 2194 if (Ty->isIntegralOrEnumerationType() && 2195 Ty->isPromotableIntegerType()) 2196 return ABIArgInfo::getExtend(); 2197 } 2198 2199 break; 2200 2201 // AMD64-ABI 3.2.3p3: Rule 3. If the class is SSE, the next 2202 // available SSE register is used, the registers are taken in the 2203 // order from %xmm0 to %xmm7. 2204 case SSE: { 2205 llvm::Type *IRType = CGT.ConvertType(Ty); 2206 ResType = GetSSETypeAtOffset(IRType, 0, Ty, 0); 2207 ++neededSSE; 2208 break; 2209 } 2210 } 2211 2212 llvm::Type *HighPart = 0; 2213 switch (Hi) { 2214 // Memory was handled previously, ComplexX87 and X87 should 2215 // never occur as hi classes, and X87Up must be preceded by X87, 2216 // which is passed in memory. 2217 case Memory: 2218 case X87: 2219 case ComplexX87: 2220 llvm_unreachable("Invalid classification for hi word."); 2221 2222 case NoClass: break; 2223 2224 case Integer: 2225 ++neededInt; 2226 // Pick an 8-byte type based on the preferred type. 2227 HighPart = GetINTEGERTypeAtOffset(CGT.ConvertType(Ty), 8, Ty, 8); 2228 2229 if (Lo == NoClass) // Pass HighPart at offset 8 in memory. 2230 return ABIArgInfo::getDirect(HighPart, 8); 2231 break; 2232 2233 // X87Up generally doesn't occur here (long double is passed in 2234 // memory), except in situations involving unions. 2235 case X87Up: 2236 case SSE: 2237 HighPart = GetSSETypeAtOffset(CGT.ConvertType(Ty), 8, Ty, 8); 2238 2239 if (Lo == NoClass) // Pass HighPart at offset 8 in memory. 2240 return ABIArgInfo::getDirect(HighPart, 8); 2241 2242 ++neededSSE; 2243 break; 2244 2245 // AMD64-ABI 3.2.3p3: Rule 4. If the class is SSEUP, the 2246 // eightbyte is passed in the upper half of the last used SSE 2247 // register. This only happens when 128-bit vectors are passed. 2248 case SSEUp: 2249 assert(Lo == SSE && "Unexpected SSEUp classification"); 2250 ResType = GetByteVectorType(Ty); 2251 break; 2252 } 2253 2254 // If a high part was specified, merge it together with the low part. It is 2255 // known to pass in the high eightbyte of the result. We do this by forming a 2256 // first class struct aggregate with the high and low part: {low, high} 2257 if (HighPart) 2258 ResType = GetX86_64ByValArgumentPair(ResType, HighPart, getDataLayout()); 2259 2260 return ABIArgInfo::getDirect(ResType); 2261} 2262 2263void X86_64ABIInfo::computeInfo(CGFunctionInfo &FI) const { 2264 2265 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 2266 2267 // Keep track of the number of assigned registers. 2268 unsigned freeIntRegs = 6, freeSSERegs = 8; 2269 2270 // If the return value is indirect, then the hidden argument is consuming one 2271 // integer register. 2272 if (FI.getReturnInfo().isIndirect()) 2273 --freeIntRegs; 2274 2275 // AMD64-ABI 3.2.3p3: Once arguments are classified, the registers 2276 // get assigned (in left-to-right order) for passing as follows... 2277 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 2278 it != ie; ++it) { 2279 unsigned neededInt, neededSSE; 2280 it->info = classifyArgumentType(it->type, freeIntRegs, neededInt, 2281 neededSSE); 2282 2283 // AMD64-ABI 3.2.3p3: If there are no registers available for any 2284 // eightbyte of an argument, the whole argument is passed on the 2285 // stack. If registers have already been assigned for some 2286 // eightbytes of such an argument, the assignments get reverted. 2287 if (freeIntRegs >= neededInt && freeSSERegs >= neededSSE) { 2288 freeIntRegs -= neededInt; 2289 freeSSERegs -= neededSSE; 2290 } else { 2291 it->info = getIndirectResult(it->type, freeIntRegs); 2292 } 2293 } 2294} 2295 2296static llvm::Value *EmitVAArgFromMemory(llvm::Value *VAListAddr, 2297 QualType Ty, 2298 CodeGenFunction &CGF) { 2299 llvm::Value *overflow_arg_area_p = 2300 CGF.Builder.CreateStructGEP(VAListAddr, 2, "overflow_arg_area_p"); 2301 llvm::Value *overflow_arg_area = 2302 CGF.Builder.CreateLoad(overflow_arg_area_p, "overflow_arg_area"); 2303 2304 // AMD64-ABI 3.5.7p5: Step 7. Align l->overflow_arg_area upwards to a 16 2305 // byte boundary if alignment needed by type exceeds 8 byte boundary. 2306 // It isn't stated explicitly in the standard, but in practice we use 2307 // alignment greater than 16 where necessary. 2308 uint64_t Align = CGF.getContext().getTypeAlign(Ty) / 8; 2309 if (Align > 8) { 2310 // overflow_arg_area = (overflow_arg_area + align - 1) & -align; 2311 llvm::Value *Offset = 2312 llvm::ConstantInt::get(CGF.Int64Ty, Align - 1); 2313 overflow_arg_area = CGF.Builder.CreateGEP(overflow_arg_area, Offset); 2314 llvm::Value *AsInt = CGF.Builder.CreatePtrToInt(overflow_arg_area, 2315 CGF.Int64Ty); 2316 llvm::Value *Mask = llvm::ConstantInt::get(CGF.Int64Ty, -(uint64_t)Align); 2317 overflow_arg_area = 2318 CGF.Builder.CreateIntToPtr(CGF.Builder.CreateAnd(AsInt, Mask), 2319 overflow_arg_area->getType(), 2320 "overflow_arg_area.align"); 2321 } 2322 2323 // AMD64-ABI 3.5.7p5: Step 8. Fetch type from l->overflow_arg_area. 2324 llvm::Type *LTy = CGF.ConvertTypeForMem(Ty); 2325 llvm::Value *Res = 2326 CGF.Builder.CreateBitCast(overflow_arg_area, 2327 llvm::PointerType::getUnqual(LTy)); 2328 2329 // AMD64-ABI 3.5.7p5: Step 9. Set l->overflow_arg_area to: 2330 // l->overflow_arg_area + sizeof(type). 2331 // AMD64-ABI 3.5.7p5: Step 10. Align l->overflow_arg_area upwards to 2332 // an 8 byte boundary. 2333 2334 uint64_t SizeInBytes = (CGF.getContext().getTypeSize(Ty) + 7) / 8; 2335 llvm::Value *Offset = 2336 llvm::ConstantInt::get(CGF.Int32Ty, (SizeInBytes + 7) & ~7); 2337 overflow_arg_area = CGF.Builder.CreateGEP(overflow_arg_area, Offset, 2338 "overflow_arg_area.next"); 2339 CGF.Builder.CreateStore(overflow_arg_area, overflow_arg_area_p); 2340 2341 // AMD64-ABI 3.5.7p5: Step 11. Return the fetched type. 2342 return Res; 2343} 2344 2345llvm::Value *X86_64ABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 2346 CodeGenFunction &CGF) const { 2347 // Assume that va_list type is correct; should be pointer to LLVM type: 2348 // struct { 2349 // i32 gp_offset; 2350 // i32 fp_offset; 2351 // i8* overflow_arg_area; 2352 // i8* reg_save_area; 2353 // }; 2354 unsigned neededInt, neededSSE; 2355 2356 Ty = CGF.getContext().getCanonicalType(Ty); 2357 ABIArgInfo AI = classifyArgumentType(Ty, 0, neededInt, neededSSE); 2358 2359 // AMD64-ABI 3.5.7p5: Step 1. Determine whether type may be passed 2360 // in the registers. If not go to step 7. 2361 if (!neededInt && !neededSSE) 2362 return EmitVAArgFromMemory(VAListAddr, Ty, CGF); 2363 2364 // AMD64-ABI 3.5.7p5: Step 2. Compute num_gp to hold the number of 2365 // general purpose registers needed to pass type and num_fp to hold 2366 // the number of floating point registers needed. 2367 2368 // AMD64-ABI 3.5.7p5: Step 3. Verify whether arguments fit into 2369 // registers. In the case: l->gp_offset > 48 - num_gp * 8 or 2370 // l->fp_offset > 304 - num_fp * 16 go to step 7. 2371 // 2372 // NOTE: 304 is a typo, there are (6 * 8 + 8 * 16) = 176 bytes of 2373 // register save space). 2374 2375 llvm::Value *InRegs = 0; 2376 llvm::Value *gp_offset_p = 0, *gp_offset = 0; 2377 llvm::Value *fp_offset_p = 0, *fp_offset = 0; 2378 if (neededInt) { 2379 gp_offset_p = CGF.Builder.CreateStructGEP(VAListAddr, 0, "gp_offset_p"); 2380 gp_offset = CGF.Builder.CreateLoad(gp_offset_p, "gp_offset"); 2381 InRegs = llvm::ConstantInt::get(CGF.Int32Ty, 48 - neededInt * 8); 2382 InRegs = CGF.Builder.CreateICmpULE(gp_offset, InRegs, "fits_in_gp"); 2383 } 2384 2385 if (neededSSE) { 2386 fp_offset_p = CGF.Builder.CreateStructGEP(VAListAddr, 1, "fp_offset_p"); 2387 fp_offset = CGF.Builder.CreateLoad(fp_offset_p, "fp_offset"); 2388 llvm::Value *FitsInFP = 2389 llvm::ConstantInt::get(CGF.Int32Ty, 176 - neededSSE * 16); 2390 FitsInFP = CGF.Builder.CreateICmpULE(fp_offset, FitsInFP, "fits_in_fp"); 2391 InRegs = InRegs ? CGF.Builder.CreateAnd(InRegs, FitsInFP) : FitsInFP; 2392 } 2393 2394 llvm::BasicBlock *InRegBlock = CGF.createBasicBlock("vaarg.in_reg"); 2395 llvm::BasicBlock *InMemBlock = CGF.createBasicBlock("vaarg.in_mem"); 2396 llvm::BasicBlock *ContBlock = CGF.createBasicBlock("vaarg.end"); 2397 CGF.Builder.CreateCondBr(InRegs, InRegBlock, InMemBlock); 2398 2399 // Emit code to load the value if it was passed in registers. 2400 2401 CGF.EmitBlock(InRegBlock); 2402 2403 // AMD64-ABI 3.5.7p5: Step 4. Fetch type from l->reg_save_area with 2404 // an offset of l->gp_offset and/or l->fp_offset. This may require 2405 // copying to a temporary location in case the parameter is passed 2406 // in different register classes or requires an alignment greater 2407 // than 8 for general purpose registers and 16 for XMM registers. 2408 // 2409 // FIXME: This really results in shameful code when we end up needing to 2410 // collect arguments from different places; often what should result in a 2411 // simple assembling of a structure from scattered addresses has many more 2412 // loads than necessary. Can we clean this up? 2413 llvm::Type *LTy = CGF.ConvertTypeForMem(Ty); 2414 llvm::Value *RegAddr = 2415 CGF.Builder.CreateLoad(CGF.Builder.CreateStructGEP(VAListAddr, 3), 2416 "reg_save_area"); 2417 if (neededInt && neededSSE) { 2418 // FIXME: Cleanup. 2419 assert(AI.isDirect() && "Unexpected ABI info for mixed regs"); 2420 llvm::StructType *ST = cast<llvm::StructType>(AI.getCoerceToType()); 2421 llvm::Value *Tmp = CGF.CreateTempAlloca(ST); 2422 assert(ST->getNumElements() == 2 && "Unexpected ABI info for mixed regs"); 2423 llvm::Type *TyLo = ST->getElementType(0); 2424 llvm::Type *TyHi = ST->getElementType(1); 2425 assert((TyLo->isFPOrFPVectorTy() ^ TyHi->isFPOrFPVectorTy()) && 2426 "Unexpected ABI info for mixed regs"); 2427 llvm::Type *PTyLo = llvm::PointerType::getUnqual(TyLo); 2428 llvm::Type *PTyHi = llvm::PointerType::getUnqual(TyHi); 2429 llvm::Value *GPAddr = CGF.Builder.CreateGEP(RegAddr, gp_offset); 2430 llvm::Value *FPAddr = CGF.Builder.CreateGEP(RegAddr, fp_offset); 2431 llvm::Value *RegLoAddr = TyLo->isFloatingPointTy() ? FPAddr : GPAddr; 2432 llvm::Value *RegHiAddr = TyLo->isFloatingPointTy() ? GPAddr : FPAddr; 2433 llvm::Value *V = 2434 CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegLoAddr, PTyLo)); 2435 CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 0)); 2436 V = CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegHiAddr, PTyHi)); 2437 CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 1)); 2438 2439 RegAddr = CGF.Builder.CreateBitCast(Tmp, 2440 llvm::PointerType::getUnqual(LTy)); 2441 } else if (neededInt) { 2442 RegAddr = CGF.Builder.CreateGEP(RegAddr, gp_offset); 2443 RegAddr = CGF.Builder.CreateBitCast(RegAddr, 2444 llvm::PointerType::getUnqual(LTy)); 2445 } else if (neededSSE == 1) { 2446 RegAddr = CGF.Builder.CreateGEP(RegAddr, fp_offset); 2447 RegAddr = CGF.Builder.CreateBitCast(RegAddr, 2448 llvm::PointerType::getUnqual(LTy)); 2449 } else { 2450 assert(neededSSE == 2 && "Invalid number of needed registers!"); 2451 // SSE registers are spaced 16 bytes apart in the register save 2452 // area, we need to collect the two eightbytes together. 2453 llvm::Value *RegAddrLo = CGF.Builder.CreateGEP(RegAddr, fp_offset); 2454 llvm::Value *RegAddrHi = CGF.Builder.CreateConstGEP1_32(RegAddrLo, 16); 2455 llvm::Type *DoubleTy = CGF.DoubleTy; 2456 llvm::Type *DblPtrTy = 2457 llvm::PointerType::getUnqual(DoubleTy); 2458 llvm::StructType *ST = llvm::StructType::get(DoubleTy, 2459 DoubleTy, NULL); 2460 llvm::Value *V, *Tmp = CGF.CreateTempAlloca(ST); 2461 V = CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegAddrLo, 2462 DblPtrTy)); 2463 CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 0)); 2464 V = CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegAddrHi, 2465 DblPtrTy)); 2466 CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 1)); 2467 RegAddr = CGF.Builder.CreateBitCast(Tmp, 2468 llvm::PointerType::getUnqual(LTy)); 2469 } 2470 2471 // AMD64-ABI 3.5.7p5: Step 5. Set: 2472 // l->gp_offset = l->gp_offset + num_gp * 8 2473 // l->fp_offset = l->fp_offset + num_fp * 16. 2474 if (neededInt) { 2475 llvm::Value *Offset = llvm::ConstantInt::get(CGF.Int32Ty, neededInt * 8); 2476 CGF.Builder.CreateStore(CGF.Builder.CreateAdd(gp_offset, Offset), 2477 gp_offset_p); 2478 } 2479 if (neededSSE) { 2480 llvm::Value *Offset = llvm::ConstantInt::get(CGF.Int32Ty, neededSSE * 16); 2481 CGF.Builder.CreateStore(CGF.Builder.CreateAdd(fp_offset, Offset), 2482 fp_offset_p); 2483 } 2484 CGF.EmitBranch(ContBlock); 2485 2486 // Emit code to load the value if it was passed in memory. 2487 2488 CGF.EmitBlock(InMemBlock); 2489 llvm::Value *MemAddr = EmitVAArgFromMemory(VAListAddr, Ty, CGF); 2490 2491 // Return the appropriate result. 2492 2493 CGF.EmitBlock(ContBlock); 2494 llvm::PHINode *ResAddr = CGF.Builder.CreatePHI(RegAddr->getType(), 2, 2495 "vaarg.addr"); 2496 ResAddr->addIncoming(RegAddr, InRegBlock); 2497 ResAddr->addIncoming(MemAddr, InMemBlock); 2498 return ResAddr; 2499} 2500 2501ABIArgInfo WinX86_64ABIInfo::classify(QualType Ty) const { 2502 2503 if (Ty->isVoidType()) 2504 return ABIArgInfo::getIgnore(); 2505 2506 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 2507 Ty = EnumTy->getDecl()->getIntegerType(); 2508 2509 uint64_t Size = getContext().getTypeSize(Ty); 2510 2511 if (const RecordType *RT = Ty->getAs<RecordType>()) { 2512 if (hasNonTrivialDestructorOrCopyConstructor(RT) || 2513 RT->getDecl()->hasFlexibleArrayMember()) 2514 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 2515 2516 // FIXME: mingw-w64-gcc emits 128-bit struct as i128 2517 if (Size == 128 && getTarget().getTriple().getOS() == llvm::Triple::MinGW32) 2518 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(), 2519 Size)); 2520 2521 // MS x64 ABI requirement: "Any argument that doesn't fit in 8 bytes, or is 2522 // not 1, 2, 4, or 8 bytes, must be passed by reference." 2523 if (Size <= 64 && 2524 (Size & (Size - 1)) == 0) 2525 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(), 2526 Size)); 2527 2528 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 2529 } 2530 2531 if (Ty->isPromotableIntegerType()) 2532 return ABIArgInfo::getExtend(); 2533 2534 return ABIArgInfo::getDirect(); 2535} 2536 2537void WinX86_64ABIInfo::computeInfo(CGFunctionInfo &FI) const { 2538 2539 QualType RetTy = FI.getReturnType(); 2540 FI.getReturnInfo() = classify(RetTy); 2541 2542 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 2543 it != ie; ++it) 2544 it->info = classify(it->type); 2545} 2546 2547llvm::Value *WinX86_64ABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 2548 CodeGenFunction &CGF) const { 2549 llvm::Type *BPP = CGF.Int8PtrPtrTy; 2550 2551 CGBuilderTy &Builder = CGF.Builder; 2552 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP, 2553 "ap"); 2554 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur"); 2555 llvm::Type *PTy = 2556 llvm::PointerType::getUnqual(CGF.ConvertType(Ty)); 2557 llvm::Value *AddrTyped = Builder.CreateBitCast(Addr, PTy); 2558 2559 uint64_t Offset = 2560 llvm::RoundUpToAlignment(CGF.getContext().getTypeSize(Ty) / 8, 8); 2561 llvm::Value *NextAddr = 2562 Builder.CreateGEP(Addr, llvm::ConstantInt::get(CGF.Int32Ty, Offset), 2563 "ap.next"); 2564 Builder.CreateStore(NextAddr, VAListAddrAsBPP); 2565 2566 return AddrTyped; 2567} 2568 2569namespace { 2570 2571class NaClX86_64ABIInfo : public ABIInfo { 2572 public: 2573 NaClX86_64ABIInfo(CodeGen::CodeGenTypes &CGT, bool HasAVX) 2574 : ABIInfo(CGT), PInfo(CGT), NInfo(CGT, HasAVX) {} 2575 virtual void computeInfo(CGFunctionInfo &FI) const; 2576 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 2577 CodeGenFunction &CGF) const; 2578 private: 2579 PNaClABIInfo PInfo; // Used for generating calls with pnaclcall callingconv. 2580 X86_64ABIInfo NInfo; // Used for everything else. 2581}; 2582 2583class NaClX86_64TargetCodeGenInfo : public TargetCodeGenInfo { 2584 public: 2585 NaClX86_64TargetCodeGenInfo(CodeGen::CodeGenTypes &CGT, bool HasAVX) 2586 : TargetCodeGenInfo(new NaClX86_64ABIInfo(CGT, HasAVX)) {} 2587}; 2588 2589} 2590 2591void NaClX86_64ABIInfo::computeInfo(CGFunctionInfo &FI) const { 2592 if (FI.getASTCallingConvention() == CC_PnaclCall) 2593 PInfo.computeInfo(FI); 2594 else 2595 NInfo.computeInfo(FI); 2596} 2597 2598llvm::Value *NaClX86_64ABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 2599 CodeGenFunction &CGF) const { 2600 // Always use the native convention; calling pnacl-style varargs functions 2601 // is unuspported. 2602 return NInfo.EmitVAArg(VAListAddr, Ty, CGF); 2603} 2604 2605 2606// PowerPC-32 2607 2608namespace { 2609class PPC32TargetCodeGenInfo : public DefaultTargetCodeGenInfo { 2610public: 2611 PPC32TargetCodeGenInfo(CodeGenTypes &CGT) : DefaultTargetCodeGenInfo(CGT) {} 2612 2613 int getDwarfEHStackPointer(CodeGen::CodeGenModule &M) const { 2614 // This is recovered from gcc output. 2615 return 1; // r1 is the dedicated stack pointer 2616 } 2617 2618 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 2619 llvm::Value *Address) const; 2620}; 2621 2622} 2623 2624bool 2625PPC32TargetCodeGenInfo::initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 2626 llvm::Value *Address) const { 2627 // This is calculated from the LLVM and GCC tables and verified 2628 // against gcc output. AFAIK all ABIs use the same encoding. 2629 2630 CodeGen::CGBuilderTy &Builder = CGF.Builder; 2631 2632 llvm::IntegerType *i8 = CGF.Int8Ty; 2633 llvm::Value *Four8 = llvm::ConstantInt::get(i8, 4); 2634 llvm::Value *Eight8 = llvm::ConstantInt::get(i8, 8); 2635 llvm::Value *Sixteen8 = llvm::ConstantInt::get(i8, 16); 2636 2637 // 0-31: r0-31, the 4-byte general-purpose registers 2638 AssignToArrayRange(Builder, Address, Four8, 0, 31); 2639 2640 // 32-63: fp0-31, the 8-byte floating-point registers 2641 AssignToArrayRange(Builder, Address, Eight8, 32, 63); 2642 2643 // 64-76 are various 4-byte special-purpose registers: 2644 // 64: mq 2645 // 65: lr 2646 // 66: ctr 2647 // 67: ap 2648 // 68-75 cr0-7 2649 // 76: xer 2650 AssignToArrayRange(Builder, Address, Four8, 64, 76); 2651 2652 // 77-108: v0-31, the 16-byte vector registers 2653 AssignToArrayRange(Builder, Address, Sixteen8, 77, 108); 2654 2655 // 109: vrsave 2656 // 110: vscr 2657 // 111: spe_acc 2658 // 112: spefscr 2659 // 113: sfp 2660 AssignToArrayRange(Builder, Address, Four8, 109, 113); 2661 2662 return false; 2663} 2664 2665// PowerPC-64 2666 2667namespace { 2668/// PPC64_SVR4_ABIInfo - The 64-bit PowerPC ELF (SVR4) ABI information. 2669class PPC64_SVR4_ABIInfo : public DefaultABIInfo { 2670 2671public: 2672 PPC64_SVR4_ABIInfo(CodeGen::CodeGenTypes &CGT) : DefaultABIInfo(CGT) {} 2673 2674 bool isPromotableTypeForABI(QualType Ty) const; 2675 2676 ABIArgInfo classifyReturnType(QualType RetTy) const; 2677 ABIArgInfo classifyArgumentType(QualType Ty) const; 2678 2679 // TODO: We can add more logic to computeInfo to improve performance. 2680 // Example: For aggregate arguments that fit in a register, we could 2681 // use getDirectInReg (as is done below for structs containing a single 2682 // floating-point value) to avoid pushing them to memory on function 2683 // entry. This would require changing the logic in PPCISelLowering 2684 // when lowering the parameters in the caller and args in the callee. 2685 virtual void computeInfo(CGFunctionInfo &FI) const { 2686 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 2687 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 2688 it != ie; ++it) { 2689 // We rely on the default argument classification for the most part. 2690 // One exception: An aggregate containing a single floating-point 2691 // item must be passed in a register if one is available. 2692 const Type *T = isSingleElementStruct(it->type, getContext()); 2693 if (T) { 2694 const BuiltinType *BT = T->getAs<BuiltinType>(); 2695 if (BT && BT->isFloatingPoint()) { 2696 QualType QT(T, 0); 2697 it->info = ABIArgInfo::getDirectInReg(CGT.ConvertType(QT)); 2698 continue; 2699 } 2700 } 2701 it->info = classifyArgumentType(it->type); 2702 } 2703 } 2704 2705 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, 2706 QualType Ty, 2707 CodeGenFunction &CGF) const; 2708}; 2709 2710class PPC64_SVR4_TargetCodeGenInfo : public TargetCodeGenInfo { 2711public: 2712 PPC64_SVR4_TargetCodeGenInfo(CodeGenTypes &CGT) 2713 : TargetCodeGenInfo(new PPC64_SVR4_ABIInfo(CGT)) {} 2714 2715 int getDwarfEHStackPointer(CodeGen::CodeGenModule &M) const { 2716 // This is recovered from gcc output. 2717 return 1; // r1 is the dedicated stack pointer 2718 } 2719 2720 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 2721 llvm::Value *Address) const; 2722}; 2723 2724class PPC64TargetCodeGenInfo : public DefaultTargetCodeGenInfo { 2725public: 2726 PPC64TargetCodeGenInfo(CodeGenTypes &CGT) : DefaultTargetCodeGenInfo(CGT) {} 2727 2728 int getDwarfEHStackPointer(CodeGen::CodeGenModule &M) const { 2729 // This is recovered from gcc output. 2730 return 1; // r1 is the dedicated stack pointer 2731 } 2732 2733 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 2734 llvm::Value *Address) const; 2735}; 2736 2737} 2738 2739// Return true if the ABI requires Ty to be passed sign- or zero- 2740// extended to 64 bits. 2741bool 2742PPC64_SVR4_ABIInfo::isPromotableTypeForABI(QualType Ty) const { 2743 // Treat an enum type as its underlying type. 2744 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 2745 Ty = EnumTy->getDecl()->getIntegerType(); 2746 2747 // Promotable integer types are required to be promoted by the ABI. 2748 if (Ty->isPromotableIntegerType()) 2749 return true; 2750 2751 // In addition to the usual promotable integer types, we also need to 2752 // extend all 32-bit types, since the ABI requires promotion to 64 bits. 2753 if (const BuiltinType *BT = Ty->getAs<BuiltinType>()) 2754 switch (BT->getKind()) { 2755 case BuiltinType::Int: 2756 case BuiltinType::UInt: 2757 return true; 2758 default: 2759 break; 2760 } 2761 2762 return false; 2763} 2764 2765ABIArgInfo 2766PPC64_SVR4_ABIInfo::classifyArgumentType(QualType Ty) const { 2767 if (Ty->isAnyComplexType()) 2768 return ABIArgInfo::getDirect(); 2769 2770 if (isAggregateTypeForABI(Ty)) { 2771 // Records with non trivial destructors/constructors should not be passed 2772 // by value. 2773 if (isRecordWithNonTrivialDestructorOrCopyConstructor(Ty)) 2774 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 2775 2776 return ABIArgInfo::getIndirect(0); 2777 } 2778 2779 return (isPromotableTypeForABI(Ty) ? 2780 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 2781} 2782 2783ABIArgInfo 2784PPC64_SVR4_ABIInfo::classifyReturnType(QualType RetTy) const { 2785 if (RetTy->isVoidType()) 2786 return ABIArgInfo::getIgnore(); 2787 2788 if (RetTy->isAnyComplexType()) 2789 return ABIArgInfo::getDirect(); 2790 2791 if (isAggregateTypeForABI(RetTy)) 2792 return ABIArgInfo::getIndirect(0); 2793 2794 return (isPromotableTypeForABI(RetTy) ? 2795 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 2796} 2797 2798// Based on ARMABIInfo::EmitVAArg, adjusted for 64-bit machine. 2799llvm::Value *PPC64_SVR4_ABIInfo::EmitVAArg(llvm::Value *VAListAddr, 2800 QualType Ty, 2801 CodeGenFunction &CGF) const { 2802 llvm::Type *BP = CGF.Int8PtrTy; 2803 llvm::Type *BPP = CGF.Int8PtrPtrTy; 2804 2805 CGBuilderTy &Builder = CGF.Builder; 2806 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP, "ap"); 2807 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur"); 2808 2809 // Update the va_list pointer. The pointer should be bumped by the 2810 // size of the object. We can trust getTypeSize() except for a complex 2811 // type whose base type is smaller than a doubleword. For these, the 2812 // size of the object is 16 bytes; see below for further explanation. 2813 unsigned SizeInBytes = CGF.getContext().getTypeSize(Ty) / 8; 2814 QualType BaseTy; 2815 unsigned CplxBaseSize = 0; 2816 2817 if (const ComplexType *CTy = Ty->getAs<ComplexType>()) { 2818 BaseTy = CTy->getElementType(); 2819 CplxBaseSize = CGF.getContext().getTypeSize(BaseTy) / 8; 2820 if (CplxBaseSize < 8) 2821 SizeInBytes = 16; 2822 } 2823 2824 unsigned Offset = llvm::RoundUpToAlignment(SizeInBytes, 8); 2825 llvm::Value *NextAddr = 2826 Builder.CreateGEP(Addr, llvm::ConstantInt::get(CGF.Int64Ty, Offset), 2827 "ap.next"); 2828 Builder.CreateStore(NextAddr, VAListAddrAsBPP); 2829 2830 // If we have a complex type and the base type is smaller than 8 bytes, 2831 // the ABI calls for the real and imaginary parts to be right-adjusted 2832 // in separate doublewords. However, Clang expects us to produce a 2833 // pointer to a structure with the two parts packed tightly. So generate 2834 // loads of the real and imaginary parts relative to the va_list pointer, 2835 // and store them to a temporary structure. 2836 if (CplxBaseSize && CplxBaseSize < 8) { 2837 llvm::Value *RealAddr = Builder.CreatePtrToInt(Addr, CGF.Int64Ty); 2838 llvm::Value *ImagAddr = RealAddr; 2839 RealAddr = Builder.CreateAdd(RealAddr, Builder.getInt64(8 - CplxBaseSize)); 2840 ImagAddr = Builder.CreateAdd(ImagAddr, Builder.getInt64(16 - CplxBaseSize)); 2841 llvm::Type *PBaseTy = llvm::PointerType::getUnqual(CGF.ConvertType(BaseTy)); 2842 RealAddr = Builder.CreateIntToPtr(RealAddr, PBaseTy); 2843 ImagAddr = Builder.CreateIntToPtr(ImagAddr, PBaseTy); 2844 llvm::Value *Real = Builder.CreateLoad(RealAddr, false, ".vareal"); 2845 llvm::Value *Imag = Builder.CreateLoad(ImagAddr, false, ".vaimag"); 2846 llvm::Value *Ptr = CGF.CreateTempAlloca(CGT.ConvertTypeForMem(Ty), 2847 "vacplx"); 2848 llvm::Value *RealPtr = Builder.CreateStructGEP(Ptr, 0, ".real"); 2849 llvm::Value *ImagPtr = Builder.CreateStructGEP(Ptr, 1, ".imag"); 2850 Builder.CreateStore(Real, RealPtr, false); 2851 Builder.CreateStore(Imag, ImagPtr, false); 2852 return Ptr; 2853 } 2854 2855 // If the argument is smaller than 8 bytes, it is right-adjusted in 2856 // its doubleword slot. Adjust the pointer to pick it up from the 2857 // correct offset. 2858 if (SizeInBytes < 8) { 2859 llvm::Value *AddrAsInt = Builder.CreatePtrToInt(Addr, CGF.Int64Ty); 2860 AddrAsInt = Builder.CreateAdd(AddrAsInt, Builder.getInt64(8 - SizeInBytes)); 2861 Addr = Builder.CreateIntToPtr(AddrAsInt, BP); 2862 } 2863 2864 llvm::Type *PTy = llvm::PointerType::getUnqual(CGF.ConvertType(Ty)); 2865 return Builder.CreateBitCast(Addr, PTy); 2866} 2867 2868static bool 2869PPC64_initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 2870 llvm::Value *Address) { 2871 // This is calculated from the LLVM and GCC tables and verified 2872 // against gcc output. AFAIK all ABIs use the same encoding. 2873 2874 CodeGen::CGBuilderTy &Builder = CGF.Builder; 2875 2876 llvm::IntegerType *i8 = CGF.Int8Ty; 2877 llvm::Value *Four8 = llvm::ConstantInt::get(i8, 4); 2878 llvm::Value *Eight8 = llvm::ConstantInt::get(i8, 8); 2879 llvm::Value *Sixteen8 = llvm::ConstantInt::get(i8, 16); 2880 2881 // 0-31: r0-31, the 8-byte general-purpose registers 2882 AssignToArrayRange(Builder, Address, Eight8, 0, 31); 2883 2884 // 32-63: fp0-31, the 8-byte floating-point registers 2885 AssignToArrayRange(Builder, Address, Eight8, 32, 63); 2886 2887 // 64-76 are various 4-byte special-purpose registers: 2888 // 64: mq 2889 // 65: lr 2890 // 66: ctr 2891 // 67: ap 2892 // 68-75 cr0-7 2893 // 76: xer 2894 AssignToArrayRange(Builder, Address, Four8, 64, 76); 2895 2896 // 77-108: v0-31, the 16-byte vector registers 2897 AssignToArrayRange(Builder, Address, Sixteen8, 77, 108); 2898 2899 // 109: vrsave 2900 // 110: vscr 2901 // 111: spe_acc 2902 // 112: spefscr 2903 // 113: sfp 2904 AssignToArrayRange(Builder, Address, Four8, 109, 113); 2905 2906 return false; 2907} 2908 2909bool 2910PPC64_SVR4_TargetCodeGenInfo::initDwarfEHRegSizeTable( 2911 CodeGen::CodeGenFunction &CGF, 2912 llvm::Value *Address) const { 2913 2914 return PPC64_initDwarfEHRegSizeTable(CGF, Address); 2915} 2916 2917bool 2918PPC64TargetCodeGenInfo::initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 2919 llvm::Value *Address) const { 2920 2921 return PPC64_initDwarfEHRegSizeTable(CGF, Address); 2922} 2923 2924//===----------------------------------------------------------------------===// 2925// ARM ABI Implementation 2926//===----------------------------------------------------------------------===// 2927 2928namespace { 2929 2930class ARMABIInfo : public ABIInfo { 2931public: 2932 enum ABIKind { 2933 APCS = 0, 2934 AAPCS = 1, 2935 AAPCS_VFP 2936 }; 2937 2938private: 2939 ABIKind Kind; 2940 2941public: 2942 ARMABIInfo(CodeGenTypes &CGT, ABIKind _Kind) : ABIInfo(CGT), Kind(_Kind) { 2943 setRuntimeCC(); 2944 } 2945 2946 bool isEABI() const { 2947 StringRef Env = getTarget().getTriple().getEnvironmentName(); 2948 return (Env == "gnueabi" || Env == "eabi" || 2949 Env == "android" || Env == "androideabi"); 2950 } 2951 2952private: 2953 ABIKind getABIKind() const { return Kind; } 2954 2955 ABIArgInfo classifyReturnType(QualType RetTy) const; 2956 ABIArgInfo classifyArgumentType(QualType RetTy, int *VFPRegs, 2957 unsigned &AllocatedVFP, 2958 bool &IsHA) const; 2959 bool isIllegalVectorType(QualType Ty) const; 2960 2961 virtual void computeInfo(CGFunctionInfo &FI) const; 2962 2963 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 2964 CodeGenFunction &CGF) const; 2965 2966 llvm::CallingConv::ID getLLVMDefaultCC() const; 2967 llvm::CallingConv::ID getABIDefaultCC() const; 2968 void setRuntimeCC(); 2969}; 2970 2971class ARMTargetCodeGenInfo : public TargetCodeGenInfo { 2972public: 2973 ARMTargetCodeGenInfo(CodeGenTypes &CGT, ARMABIInfo::ABIKind K) 2974 :TargetCodeGenInfo(new ARMABIInfo(CGT, K)) {} 2975 2976 const ARMABIInfo &getABIInfo() const { 2977 return static_cast<const ARMABIInfo&>(TargetCodeGenInfo::getABIInfo()); 2978 } 2979 2980 int getDwarfEHStackPointer(CodeGen::CodeGenModule &M) const { 2981 return 13; 2982 } 2983 2984 StringRef getARCRetainAutoreleasedReturnValueMarker() const { 2985 return "mov\tr7, r7\t\t@ marker for objc_retainAutoreleaseReturnValue"; 2986 } 2987 2988 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 2989 llvm::Value *Address) const { 2990 llvm::Value *Four8 = llvm::ConstantInt::get(CGF.Int8Ty, 4); 2991 2992 // 0-15 are the 16 integer registers. 2993 AssignToArrayRange(CGF.Builder, Address, Four8, 0, 15); 2994 return false; 2995 } 2996 2997 unsigned getSizeOfUnwindException() const { 2998 if (getABIInfo().isEABI()) return 88; 2999 return TargetCodeGenInfo::getSizeOfUnwindException(); 3000 } 3001}; 3002 3003} 3004 3005void ARMABIInfo::computeInfo(CGFunctionInfo &FI) const { 3006 // To correctly handle Homogeneous Aggregate, we need to keep track of the 3007 // VFP registers allocated so far. 3008 // C.1.vfp If the argument is a VFP CPRC and there are sufficient consecutive 3009 // VFP registers of the appropriate type unallocated then the argument is 3010 // allocated to the lowest-numbered sequence of such registers. 3011 // C.2.vfp If the argument is a VFP CPRC then any VFP registers that are 3012 // unallocated are marked as unavailable. 3013 unsigned AllocatedVFP = 0; 3014 int VFPRegs[16] = { 0 }; 3015 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 3016 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 3017 it != ie; ++it) { 3018 unsigned PreAllocation = AllocatedVFP; 3019 bool IsHA = false; 3020 // 6.1.2.3 There is one VFP co-processor register class using registers 3021 // s0-s15 (d0-d7) for passing arguments. 3022 const unsigned NumVFPs = 16; 3023 it->info = classifyArgumentType(it->type, VFPRegs, AllocatedVFP, IsHA); 3024 // If we do not have enough VFP registers for the HA, any VFP registers 3025 // that are unallocated are marked as unavailable. To achieve this, we add 3026 // padding of (NumVFPs - PreAllocation) floats. 3027 if (IsHA && AllocatedVFP > NumVFPs && PreAllocation < NumVFPs) { 3028 llvm::Type *PaddingTy = llvm::ArrayType::get( 3029 llvm::Type::getFloatTy(getVMContext()), NumVFPs - PreAllocation); 3030 it->info = ABIArgInfo::getExpandWithPadding(false, PaddingTy); 3031 } 3032 } 3033 3034 // Always honor user-specified calling convention. 3035 if (FI.getCallingConvention() != llvm::CallingConv::C) 3036 return; 3037 3038 llvm::CallingConv::ID cc = getRuntimeCC(); 3039 if (cc != llvm::CallingConv::C) 3040 FI.setEffectiveCallingConvention(cc); 3041} 3042 3043/// Return the default calling convention that LLVM will use. 3044llvm::CallingConv::ID ARMABIInfo::getLLVMDefaultCC() const { 3045 // The default calling convention that LLVM will infer. 3046 if (getTarget().getTriple().getEnvironmentName()=="gnueabihf") 3047 return llvm::CallingConv::ARM_AAPCS_VFP; 3048 else if (isEABI()) 3049 return llvm::CallingConv::ARM_AAPCS; 3050 else 3051 return llvm::CallingConv::ARM_APCS; 3052} 3053 3054/// Return the calling convention that our ABI would like us to use 3055/// as the C calling convention. 3056llvm::CallingConv::ID ARMABIInfo::getABIDefaultCC() const { 3057 switch (getABIKind()) { 3058 case APCS: return llvm::CallingConv::ARM_APCS; 3059 case AAPCS: return llvm::CallingConv::ARM_AAPCS; 3060 case AAPCS_VFP: return llvm::CallingConv::ARM_AAPCS_VFP; 3061 } 3062 llvm_unreachable("bad ABI kind"); 3063} 3064 3065void ARMABIInfo::setRuntimeCC() { 3066 assert(getRuntimeCC() == llvm::CallingConv::C); 3067 3068 // Don't muddy up the IR with a ton of explicit annotations if 3069 // they'd just match what LLVM will infer from the triple. 3070 llvm::CallingConv::ID abiCC = getABIDefaultCC(); 3071 if (abiCC != getLLVMDefaultCC()) 3072 RuntimeCC = abiCC; 3073} 3074 3075/// isHomogeneousAggregate - Return true if a type is an AAPCS-VFP homogeneous 3076/// aggregate. If HAMembers is non-null, the number of base elements 3077/// contained in the type is returned through it; this is used for the 3078/// recursive calls that check aggregate component types. 3079static bool isHomogeneousAggregate(QualType Ty, const Type *&Base, 3080 ASTContext &Context, 3081 uint64_t *HAMembers = 0) { 3082 uint64_t Members = 0; 3083 if (const ConstantArrayType *AT = Context.getAsConstantArrayType(Ty)) { 3084 if (!isHomogeneousAggregate(AT->getElementType(), Base, Context, &Members)) 3085 return false; 3086 Members *= AT->getSize().getZExtValue(); 3087 } else if (const RecordType *RT = Ty->getAs<RecordType>()) { 3088 const RecordDecl *RD = RT->getDecl(); 3089 if (RD->hasFlexibleArrayMember()) 3090 return false; 3091 3092 Members = 0; 3093 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 3094 i != e; ++i) { 3095 const FieldDecl *FD = *i; 3096 uint64_t FldMembers; 3097 if (!isHomogeneousAggregate(FD->getType(), Base, Context, &FldMembers)) 3098 return false; 3099 3100 Members = (RD->isUnion() ? 3101 std::max(Members, FldMembers) : Members + FldMembers); 3102 } 3103 } else { 3104 Members = 1; 3105 if (const ComplexType *CT = Ty->getAs<ComplexType>()) { 3106 Members = 2; 3107 Ty = CT->getElementType(); 3108 } 3109 3110 // Homogeneous aggregates for AAPCS-VFP must have base types of float, 3111 // double, or 64-bit or 128-bit vectors. 3112 if (const BuiltinType *BT = Ty->getAs<BuiltinType>()) { 3113 if (BT->getKind() != BuiltinType::Float && 3114 BT->getKind() != BuiltinType::Double && 3115 BT->getKind() != BuiltinType::LongDouble) 3116 return false; 3117 } else if (const VectorType *VT = Ty->getAs<VectorType>()) { 3118 unsigned VecSize = Context.getTypeSize(VT); 3119 if (VecSize != 64 && VecSize != 128) 3120 return false; 3121 } else { 3122 return false; 3123 } 3124 3125 // The base type must be the same for all members. Vector types of the 3126 // same total size are treated as being equivalent here. 3127 const Type *TyPtr = Ty.getTypePtr(); 3128 if (!Base) 3129 Base = TyPtr; 3130 if (Base != TyPtr && 3131 (!Base->isVectorType() || !TyPtr->isVectorType() || 3132 Context.getTypeSize(Base) != Context.getTypeSize(TyPtr))) 3133 return false; 3134 } 3135 3136 // Homogeneous Aggregates can have at most 4 members of the base type. 3137 if (HAMembers) 3138 *HAMembers = Members; 3139 3140 return (Members > 0 && Members <= 4); 3141} 3142 3143/// markAllocatedVFPs - update VFPRegs according to the alignment and 3144/// number of VFP registers (unit is S register) requested. 3145static void markAllocatedVFPs(int *VFPRegs, unsigned &AllocatedVFP, 3146 unsigned Alignment, 3147 unsigned NumRequired) { 3148 // Early Exit. 3149 if (AllocatedVFP >= 16) 3150 return; 3151 // C.1.vfp If the argument is a VFP CPRC and there are sufficient consecutive 3152 // VFP registers of the appropriate type unallocated then the argument is 3153 // allocated to the lowest-numbered sequence of such registers. 3154 for (unsigned I = 0; I < 16; I += Alignment) { 3155 bool FoundSlot = true; 3156 for (unsigned J = I, JEnd = I + NumRequired; J < JEnd; J++) 3157 if (J >= 16 || VFPRegs[J]) { 3158 FoundSlot = false; 3159 break; 3160 } 3161 if (FoundSlot) { 3162 for (unsigned J = I, JEnd = I + NumRequired; J < JEnd; J++) 3163 VFPRegs[J] = 1; 3164 AllocatedVFP += NumRequired; 3165 return; 3166 } 3167 } 3168 // C.2.vfp If the argument is a VFP CPRC then any VFP registers that are 3169 // unallocated are marked as unavailable. 3170 for (unsigned I = 0; I < 16; I++) 3171 VFPRegs[I] = 1; 3172 AllocatedVFP = 17; // We do not have enough VFP registers. 3173} 3174 3175ABIArgInfo ARMABIInfo::classifyArgumentType(QualType Ty, int *VFPRegs, 3176 unsigned &AllocatedVFP, 3177 bool &IsHA) const { 3178 // We update number of allocated VFPs according to 3179 // 6.1.2.1 The following argument types are VFP CPRCs: 3180 // A single-precision floating-point type (including promoted 3181 // half-precision types); A double-precision floating-point type; 3182 // A 64-bit or 128-bit containerized vector type; Homogeneous Aggregate 3183 // with a Base Type of a single- or double-precision floating-point type, 3184 // 64-bit containerized vectors or 128-bit containerized vectors with one 3185 // to four Elements. 3186 3187 // Handle illegal vector types here. 3188 if (isIllegalVectorType(Ty)) { 3189 uint64_t Size = getContext().getTypeSize(Ty); 3190 if (Size <= 32) { 3191 llvm::Type *ResType = 3192 llvm::Type::getInt32Ty(getVMContext()); 3193 return ABIArgInfo::getDirect(ResType); 3194 } 3195 if (Size == 64) { 3196 llvm::Type *ResType = llvm::VectorType::get( 3197 llvm::Type::getInt32Ty(getVMContext()), 2); 3198 markAllocatedVFPs(VFPRegs, AllocatedVFP, 2, 2); 3199 return ABIArgInfo::getDirect(ResType); 3200 } 3201 if (Size == 128) { 3202 llvm::Type *ResType = llvm::VectorType::get( 3203 llvm::Type::getInt32Ty(getVMContext()), 4); 3204 markAllocatedVFPs(VFPRegs, AllocatedVFP, 4, 4); 3205 return ABIArgInfo::getDirect(ResType); 3206 } 3207 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 3208 } 3209 // Update VFPRegs for legal vector types. 3210 if (const VectorType *VT = Ty->getAs<VectorType>()) { 3211 uint64_t Size = getContext().getTypeSize(VT); 3212 // Size of a legal vector should be power of 2 and above 64. 3213 markAllocatedVFPs(VFPRegs, AllocatedVFP, Size >= 128 ? 4 : 2, Size / 32); 3214 } 3215 // Update VFPRegs for floating point types. 3216 if (const BuiltinType *BT = Ty->getAs<BuiltinType>()) { 3217 if (BT->getKind() == BuiltinType::Half || 3218 BT->getKind() == BuiltinType::Float) 3219 markAllocatedVFPs(VFPRegs, AllocatedVFP, 1, 1); 3220 if (BT->getKind() == BuiltinType::Double || 3221 BT->getKind() == BuiltinType::LongDouble) 3222 markAllocatedVFPs(VFPRegs, AllocatedVFP, 2, 2); 3223 } 3224 3225 if (!isAggregateTypeForABI(Ty)) { 3226 // Treat an enum type as its underlying type. 3227 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 3228 Ty = EnumTy->getDecl()->getIntegerType(); 3229 3230 return (Ty->isPromotableIntegerType() ? 3231 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 3232 } 3233 3234 // Ignore empty records. 3235 if (isEmptyRecord(getContext(), Ty, true)) 3236 return ABIArgInfo::getIgnore(); 3237 3238 // Structures with either a non-trivial destructor or a non-trivial 3239 // copy constructor are always indirect. 3240 if (isRecordWithNonTrivialDestructorOrCopyConstructor(Ty)) 3241 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 3242 3243 if (getABIKind() == ARMABIInfo::AAPCS_VFP) { 3244 // Homogeneous Aggregates need to be expanded when we can fit the aggregate 3245 // into VFP registers. 3246 const Type *Base = 0; 3247 uint64_t Members = 0; 3248 if (isHomogeneousAggregate(Ty, Base, getContext(), &Members)) { 3249 assert(Base && "Base class should be set for homogeneous aggregate"); 3250 // Base can be a floating-point or a vector. 3251 if (Base->isVectorType()) { 3252 // ElementSize is in number of floats. 3253 unsigned ElementSize = getContext().getTypeSize(Base) == 64 ? 2 : 4; 3254 markAllocatedVFPs(VFPRegs, AllocatedVFP, ElementSize, 3255 Members * ElementSize); 3256 } else if (Base->isSpecificBuiltinType(BuiltinType::Float)) 3257 markAllocatedVFPs(VFPRegs, AllocatedVFP, 1, Members); 3258 else { 3259 assert(Base->isSpecificBuiltinType(BuiltinType::Double) || 3260 Base->isSpecificBuiltinType(BuiltinType::LongDouble)); 3261 markAllocatedVFPs(VFPRegs, AllocatedVFP, 2, Members * 2); 3262 } 3263 IsHA = true; 3264 return ABIArgInfo::getExpand(); 3265 } 3266 } 3267 3268 // Support byval for ARM. 3269 // The ABI alignment for APCS is 4-byte and for AAPCS at least 4-byte and at 3270 // most 8-byte. We realign the indirect argument if type alignment is bigger 3271 // than ABI alignment. 3272 uint64_t ABIAlign = 4; 3273 uint64_t TyAlign = getContext().getTypeAlign(Ty) / 8; 3274 if (getABIKind() == ARMABIInfo::AAPCS_VFP || 3275 getABIKind() == ARMABIInfo::AAPCS) 3276 ABIAlign = std::min(std::max(TyAlign, (uint64_t)4), (uint64_t)8); 3277 if (getContext().getTypeSizeInChars(Ty) > CharUnits::fromQuantity(64)) { 3278 return ABIArgInfo::getIndirect(0, /*ByVal=*/true, 3279 /*Realign=*/TyAlign > ABIAlign); 3280 } 3281 3282 // Otherwise, pass by coercing to a structure of the appropriate size. 3283 llvm::Type* ElemTy; 3284 unsigned SizeRegs; 3285 // FIXME: Try to match the types of the arguments more accurately where 3286 // we can. 3287 if (getContext().getTypeAlign(Ty) <= 32) { 3288 ElemTy = llvm::Type::getInt32Ty(getVMContext()); 3289 SizeRegs = (getContext().getTypeSize(Ty) + 31) / 32; 3290 } else { 3291 ElemTy = llvm::Type::getInt64Ty(getVMContext()); 3292 SizeRegs = (getContext().getTypeSize(Ty) + 63) / 64; 3293 } 3294 3295 llvm::Type *STy = 3296 llvm::StructType::get(llvm::ArrayType::get(ElemTy, SizeRegs), NULL); 3297 return ABIArgInfo::getDirect(STy); 3298} 3299 3300static bool isIntegerLikeType(QualType Ty, ASTContext &Context, 3301 llvm::LLVMContext &VMContext) { 3302 // APCS, C Language Calling Conventions, Non-Simple Return Values: A structure 3303 // is called integer-like if its size is less than or equal to one word, and 3304 // the offset of each of its addressable sub-fields is zero. 3305 3306 uint64_t Size = Context.getTypeSize(Ty); 3307 3308 // Check that the type fits in a word. 3309 if (Size > 32) 3310 return false; 3311 3312 // FIXME: Handle vector types! 3313 if (Ty->isVectorType()) 3314 return false; 3315 3316 // Float types are never treated as "integer like". 3317 if (Ty->isRealFloatingType()) 3318 return false; 3319 3320 // If this is a builtin or pointer type then it is ok. 3321 if (Ty->getAs<BuiltinType>() || Ty->isPointerType()) 3322 return true; 3323 3324 // Small complex integer types are "integer like". 3325 if (const ComplexType *CT = Ty->getAs<ComplexType>()) 3326 return isIntegerLikeType(CT->getElementType(), Context, VMContext); 3327 3328 // Single element and zero sized arrays should be allowed, by the definition 3329 // above, but they are not. 3330 3331 // Otherwise, it must be a record type. 3332 const RecordType *RT = Ty->getAs<RecordType>(); 3333 if (!RT) return false; 3334 3335 // Ignore records with flexible arrays. 3336 const RecordDecl *RD = RT->getDecl(); 3337 if (RD->hasFlexibleArrayMember()) 3338 return false; 3339 3340 // Check that all sub-fields are at offset 0, and are themselves "integer 3341 // like". 3342 const ASTRecordLayout &Layout = Context.getASTRecordLayout(RD); 3343 3344 bool HadField = false; 3345 unsigned idx = 0; 3346 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 3347 i != e; ++i, ++idx) { 3348 const FieldDecl *FD = *i; 3349 3350 // Bit-fields are not addressable, we only need to verify they are "integer 3351 // like". We still have to disallow a subsequent non-bitfield, for example: 3352 // struct { int : 0; int x } 3353 // is non-integer like according to gcc. 3354 if (FD->isBitField()) { 3355 if (!RD->isUnion()) 3356 HadField = true; 3357 3358 if (!isIntegerLikeType(FD->getType(), Context, VMContext)) 3359 return false; 3360 3361 continue; 3362 } 3363 3364 // Check if this field is at offset 0. 3365 if (Layout.getFieldOffset(idx) != 0) 3366 return false; 3367 3368 if (!isIntegerLikeType(FD->getType(), Context, VMContext)) 3369 return false; 3370 3371 // Only allow at most one field in a structure. This doesn't match the 3372 // wording above, but follows gcc in situations with a field following an 3373 // empty structure. 3374 if (!RD->isUnion()) { 3375 if (HadField) 3376 return false; 3377 3378 HadField = true; 3379 } 3380 } 3381 3382 return true; 3383} 3384 3385ABIArgInfo ARMABIInfo::classifyReturnType(QualType RetTy) const { 3386 if (RetTy->isVoidType()) 3387 return ABIArgInfo::getIgnore(); 3388 3389 // Large vector types should be returned via memory. 3390 if (RetTy->isVectorType() && getContext().getTypeSize(RetTy) > 128) 3391 return ABIArgInfo::getIndirect(0); 3392 3393 if (!isAggregateTypeForABI(RetTy)) { 3394 // Treat an enum type as its underlying type. 3395 if (const EnumType *EnumTy = RetTy->getAs<EnumType>()) 3396 RetTy = EnumTy->getDecl()->getIntegerType(); 3397 3398 return (RetTy->isPromotableIntegerType() ? 3399 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 3400 } 3401 3402 // Structures with either a non-trivial destructor or a non-trivial 3403 // copy constructor are always indirect. 3404 if (isRecordWithNonTrivialDestructorOrCopyConstructor(RetTy)) 3405 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 3406 3407 // Are we following APCS? 3408 if (getABIKind() == APCS) { 3409 if (isEmptyRecord(getContext(), RetTy, false)) 3410 return ABIArgInfo::getIgnore(); 3411 3412 // Complex types are all returned as packed integers. 3413 // 3414 // FIXME: Consider using 2 x vector types if the back end handles them 3415 // correctly. 3416 if (RetTy->isAnyComplexType()) 3417 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(), 3418 getContext().getTypeSize(RetTy))); 3419 3420 // Integer like structures are returned in r0. 3421 if (isIntegerLikeType(RetTy, getContext(), getVMContext())) { 3422 // Return in the smallest viable integer type. 3423 uint64_t Size = getContext().getTypeSize(RetTy); 3424 if (Size <= 8) 3425 return ABIArgInfo::getDirect(llvm::Type::getInt8Ty(getVMContext())); 3426 if (Size <= 16) 3427 return ABIArgInfo::getDirect(llvm::Type::getInt16Ty(getVMContext())); 3428 return ABIArgInfo::getDirect(llvm::Type::getInt32Ty(getVMContext())); 3429 } 3430 3431 // Otherwise return in memory. 3432 return ABIArgInfo::getIndirect(0); 3433 } 3434 3435 // Otherwise this is an AAPCS variant. 3436 3437 if (isEmptyRecord(getContext(), RetTy, true)) 3438 return ABIArgInfo::getIgnore(); 3439 3440 // Check for homogeneous aggregates with AAPCS-VFP. 3441 if (getABIKind() == AAPCS_VFP) { 3442 const Type *Base = 0; 3443 if (isHomogeneousAggregate(RetTy, Base, getContext())) { 3444 assert(Base && "Base class should be set for homogeneous aggregate"); 3445 // Homogeneous Aggregates are returned directly. 3446 return ABIArgInfo::getDirect(); 3447 } 3448 } 3449 3450 // Aggregates <= 4 bytes are returned in r0; other aggregates 3451 // are returned indirectly. 3452 uint64_t Size = getContext().getTypeSize(RetTy); 3453 if (Size <= 32) { 3454 // Return in the smallest viable integer type. 3455 if (Size <= 8) 3456 return ABIArgInfo::getDirect(llvm::Type::getInt8Ty(getVMContext())); 3457 if (Size <= 16) 3458 return ABIArgInfo::getDirect(llvm::Type::getInt16Ty(getVMContext())); 3459 return ABIArgInfo::getDirect(llvm::Type::getInt32Ty(getVMContext())); 3460 } 3461 3462 return ABIArgInfo::getIndirect(0); 3463} 3464 3465/// isIllegalVector - check whether Ty is an illegal vector type. 3466bool ARMABIInfo::isIllegalVectorType(QualType Ty) const { 3467 if (const VectorType *VT = Ty->getAs<VectorType>()) { 3468 // Check whether VT is legal. 3469 unsigned NumElements = VT->getNumElements(); 3470 uint64_t Size = getContext().getTypeSize(VT); 3471 // NumElements should be power of 2. 3472 if ((NumElements & (NumElements - 1)) != 0) 3473 return true; 3474 // Size should be greater than 32 bits. 3475 return Size <= 32; 3476 } 3477 return false; 3478} 3479 3480llvm::Value *ARMABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 3481 CodeGenFunction &CGF) const { 3482 llvm::Type *BP = CGF.Int8PtrTy; 3483 llvm::Type *BPP = CGF.Int8PtrPtrTy; 3484 3485 CGBuilderTy &Builder = CGF.Builder; 3486 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP, "ap"); 3487 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur"); 3488 3489 uint64_t Size = CGF.getContext().getTypeSize(Ty) / 8; 3490 uint64_t TyAlign = CGF.getContext().getTypeAlign(Ty) / 8; 3491 bool IsIndirect = false; 3492 3493 // The ABI alignment for 64-bit or 128-bit vectors is 8 for AAPCS and 4 for 3494 // APCS. For AAPCS, the ABI alignment is at least 4-byte and at most 8-byte. 3495 if (getABIKind() == ARMABIInfo::AAPCS_VFP || 3496 getABIKind() == ARMABIInfo::AAPCS) 3497 TyAlign = std::min(std::max(TyAlign, (uint64_t)4), (uint64_t)8); 3498 else 3499 TyAlign = 4; 3500 // Use indirect if size of the illegal vector is bigger than 16 bytes. 3501 if (isIllegalVectorType(Ty) && Size > 16) { 3502 IsIndirect = true; 3503 Size = 4; 3504 TyAlign = 4; 3505 } 3506 3507 // Handle address alignment for ABI alignment > 4 bytes. 3508 if (TyAlign > 4) { 3509 assert((TyAlign & (TyAlign - 1)) == 0 && 3510 "Alignment is not power of 2!"); 3511 llvm::Value *AddrAsInt = Builder.CreatePtrToInt(Addr, CGF.Int32Ty); 3512 AddrAsInt = Builder.CreateAdd(AddrAsInt, Builder.getInt32(TyAlign - 1)); 3513 AddrAsInt = Builder.CreateAnd(AddrAsInt, Builder.getInt32(~(TyAlign - 1))); 3514 Addr = Builder.CreateIntToPtr(AddrAsInt, BP, "ap.align"); 3515 } 3516 3517 uint64_t Offset = 3518 llvm::RoundUpToAlignment(Size, 4); 3519 llvm::Value *NextAddr = 3520 Builder.CreateGEP(Addr, llvm::ConstantInt::get(CGF.Int32Ty, Offset), 3521 "ap.next"); 3522 Builder.CreateStore(NextAddr, VAListAddrAsBPP); 3523 3524 if (IsIndirect) 3525 Addr = Builder.CreateLoad(Builder.CreateBitCast(Addr, BPP)); 3526 else if (TyAlign < CGF.getContext().getTypeAlign(Ty) / 8) { 3527 // We can't directly cast ap.cur to pointer to a vector type, since ap.cur 3528 // may not be correctly aligned for the vector type. We create an aligned 3529 // temporary space and copy the content over from ap.cur to the temporary 3530 // space. This is necessary if the natural alignment of the type is greater 3531 // than the ABI alignment. 3532 llvm::Type *I8PtrTy = Builder.getInt8PtrTy(); 3533 CharUnits CharSize = getContext().getTypeSizeInChars(Ty); 3534 llvm::Value *AlignedTemp = CGF.CreateTempAlloca(CGF.ConvertType(Ty), 3535 "var.align"); 3536 llvm::Value *Dst = Builder.CreateBitCast(AlignedTemp, I8PtrTy); 3537 llvm::Value *Src = Builder.CreateBitCast(Addr, I8PtrTy); 3538 Builder.CreateMemCpy(Dst, Src, 3539 llvm::ConstantInt::get(CGF.IntPtrTy, CharSize.getQuantity()), 3540 TyAlign, false); 3541 Addr = AlignedTemp; //The content is in aligned location. 3542 } 3543 llvm::Type *PTy = 3544 llvm::PointerType::getUnqual(CGF.ConvertType(Ty)); 3545 llvm::Value *AddrTyped = Builder.CreateBitCast(Addr, PTy); 3546 3547 return AddrTyped; 3548} 3549 3550namespace { 3551 3552class NaClARMABIInfo : public ABIInfo { 3553 public: 3554 NaClARMABIInfo(CodeGen::CodeGenTypes &CGT, ARMABIInfo::ABIKind Kind) 3555 : ABIInfo(CGT), PInfo(CGT), NInfo(CGT, Kind) {} 3556 virtual void computeInfo(CGFunctionInfo &FI) const; 3557 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 3558 CodeGenFunction &CGF) const; 3559 private: 3560 PNaClABIInfo PInfo; // Used for generating calls with pnaclcall callingconv. 3561 ARMABIInfo NInfo; // Used for everything else. 3562}; 3563 3564class NaClARMTargetCodeGenInfo : public TargetCodeGenInfo { 3565 public: 3566 NaClARMTargetCodeGenInfo(CodeGen::CodeGenTypes &CGT, ARMABIInfo::ABIKind Kind) 3567 : TargetCodeGenInfo(new NaClARMABIInfo(CGT, Kind)) {} 3568}; 3569 3570} 3571 3572void NaClARMABIInfo::computeInfo(CGFunctionInfo &FI) const { 3573 if (FI.getASTCallingConvention() == CC_PnaclCall) 3574 PInfo.computeInfo(FI); 3575 else 3576 static_cast<const ABIInfo&>(NInfo).computeInfo(FI); 3577} 3578 3579llvm::Value *NaClARMABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 3580 CodeGenFunction &CGF) const { 3581 // Always use the native convention; calling pnacl-style varargs functions 3582 // is unsupported. 3583 return static_cast<const ABIInfo&>(NInfo).EmitVAArg(VAListAddr, Ty, CGF); 3584} 3585 3586//===----------------------------------------------------------------------===// 3587// AArch64 ABI Implementation 3588//===----------------------------------------------------------------------===// 3589 3590namespace { 3591 3592class AArch64ABIInfo : public ABIInfo { 3593public: 3594 AArch64ABIInfo(CodeGenTypes &CGT) : ABIInfo(CGT) {} 3595 3596private: 3597 // The AArch64 PCS is explicit about return types and argument types being 3598 // handled identically, so we don't need to draw a distinction between 3599 // Argument and Return classification. 3600 ABIArgInfo classifyGenericType(QualType Ty, int &FreeIntRegs, 3601 int &FreeVFPRegs) const; 3602 3603 ABIArgInfo tryUseRegs(QualType Ty, int &FreeRegs, int RegsNeeded, bool IsInt, 3604 llvm::Type *DirectTy = 0) const; 3605 3606 virtual void computeInfo(CGFunctionInfo &FI) const; 3607 3608 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 3609 CodeGenFunction &CGF) const; 3610}; 3611 3612class AArch64TargetCodeGenInfo : public TargetCodeGenInfo { 3613public: 3614 AArch64TargetCodeGenInfo(CodeGenTypes &CGT) 3615 :TargetCodeGenInfo(new AArch64ABIInfo(CGT)) {} 3616 3617 const AArch64ABIInfo &getABIInfo() const { 3618 return static_cast<const AArch64ABIInfo&>(TargetCodeGenInfo::getABIInfo()); 3619 } 3620 3621 int getDwarfEHStackPointer(CodeGen::CodeGenModule &M) const { 3622 return 31; 3623 } 3624 3625 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 3626 llvm::Value *Address) const { 3627 // 0-31 are x0-x30 and sp: 8 bytes each 3628 llvm::Value *Eight8 = llvm::ConstantInt::get(CGF.Int8Ty, 8); 3629 AssignToArrayRange(CGF.Builder, Address, Eight8, 0, 31); 3630 3631 // 64-95 are v0-v31: 16 bytes each 3632 llvm::Value *Sixteen8 = llvm::ConstantInt::get(CGF.Int8Ty, 16); 3633 AssignToArrayRange(CGF.Builder, Address, Sixteen8, 64, 95); 3634 3635 return false; 3636 } 3637 3638}; 3639 3640} 3641 3642void AArch64ABIInfo::computeInfo(CGFunctionInfo &FI) const { 3643 int FreeIntRegs = 8, FreeVFPRegs = 8; 3644 3645 FI.getReturnInfo() = classifyGenericType(FI.getReturnType(), 3646 FreeIntRegs, FreeVFPRegs); 3647 3648 FreeIntRegs = FreeVFPRegs = 8; 3649 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 3650 it != ie; ++it) { 3651 it->info = classifyGenericType(it->type, FreeIntRegs, FreeVFPRegs); 3652 3653 } 3654} 3655 3656ABIArgInfo 3657AArch64ABIInfo::tryUseRegs(QualType Ty, int &FreeRegs, int RegsNeeded, 3658 bool IsInt, llvm::Type *DirectTy) const { 3659 if (FreeRegs >= RegsNeeded) { 3660 FreeRegs -= RegsNeeded; 3661 return ABIArgInfo::getDirect(DirectTy); 3662 } 3663 3664 llvm::Type *Padding = 0; 3665 3666 // We need padding so that later arguments don't get filled in anyway. That 3667 // wouldn't happen if only ByVal arguments followed in the same category, but 3668 // a large structure will simply seem to be a pointer as far as LLVM is 3669 // concerned. 3670 if (FreeRegs > 0) { 3671 if (IsInt) 3672 Padding = llvm::Type::getInt64Ty(getVMContext()); 3673 else 3674 Padding = llvm::Type::getFloatTy(getVMContext()); 3675 3676 // Either [N x i64] or [N x float]. 3677 Padding = llvm::ArrayType::get(Padding, FreeRegs); 3678 FreeRegs = 0; 3679 } 3680 3681 return ABIArgInfo::getIndirect(getContext().getTypeAlign(Ty) / 8, 3682 /*IsByVal=*/ true, /*Realign=*/ false, 3683 Padding); 3684} 3685 3686 3687ABIArgInfo AArch64ABIInfo::classifyGenericType(QualType Ty, 3688 int &FreeIntRegs, 3689 int &FreeVFPRegs) const { 3690 // Can only occurs for return, but harmless otherwise. 3691 if (Ty->isVoidType()) 3692 return ABIArgInfo::getIgnore(); 3693 3694 // Large vector types should be returned via memory. There's no such concept 3695 // in the ABI, but they'd be over 16 bytes anyway so no matter how they're 3696 // classified they'd go into memory (see B.3). 3697 if (Ty->isVectorType() && getContext().getTypeSize(Ty) > 128) { 3698 if (FreeIntRegs > 0) 3699 --FreeIntRegs; 3700 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 3701 } 3702 3703 // All non-aggregate LLVM types have a concrete ABI representation so they can 3704 // be passed directly. After this block we're guaranteed to be in a 3705 // complicated case. 3706 if (!isAggregateTypeForABI(Ty)) { 3707 // Treat an enum type as its underlying type. 3708 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 3709 Ty = EnumTy->getDecl()->getIntegerType(); 3710 3711 if (Ty->isFloatingType() || Ty->isVectorType()) 3712 return tryUseRegs(Ty, FreeVFPRegs, /*RegsNeeded=*/ 1, /*IsInt=*/ false); 3713 3714 assert(getContext().getTypeSize(Ty) <= 128 && 3715 "unexpectedly large scalar type"); 3716 3717 int RegsNeeded = getContext().getTypeSize(Ty) > 64 ? 2 : 1; 3718 3719 // If the type may need padding registers to ensure "alignment", we must be 3720 // careful when this is accounted for. Increasing the effective size covers 3721 // all cases. 3722 if (getContext().getTypeAlign(Ty) == 128) 3723 RegsNeeded += FreeIntRegs % 2 != 0; 3724 3725 return tryUseRegs(Ty, FreeIntRegs, RegsNeeded, /*IsInt=*/ true); 3726 } 3727 3728 // Structures with either a non-trivial destructor or a non-trivial 3729 // copy constructor are always indirect. 3730 if (isRecordWithNonTrivialDestructorOrCopyConstructor(Ty)) { 3731 if (FreeIntRegs > 0) 3732 --FreeIntRegs; 3733 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 3734 } 3735 3736 if (isEmptyRecord(getContext(), Ty, true)) { 3737 if (!getContext().getLangOpts().CPlusPlus) { 3738 // Empty structs outside C++ mode are a GNU extension, so no ABI can 3739 // possibly tell us what to do. It turns out (I believe) that GCC ignores 3740 // the object for parameter-passsing purposes. 3741 return ABIArgInfo::getIgnore(); 3742 } 3743 3744 // The combination of C++98 9p5 (sizeof(struct) != 0) and the pseudocode 3745 // description of va_arg in the PCS require that an empty struct does 3746 // actually occupy space for parameter-passing. I'm hoping for a 3747 // clarification giving an explicit paragraph to point to in future. 3748 return tryUseRegs(Ty, FreeIntRegs, /*RegsNeeded=*/ 1, /*IsInt=*/ true, 3749 llvm::Type::getInt8Ty(getVMContext())); 3750 } 3751 3752 // Homogeneous vector aggregates get passed in registers or on the stack. 3753 const Type *Base = 0; 3754 uint64_t NumMembers = 0; 3755 if (isHomogeneousAggregate(Ty, Base, getContext(), &NumMembers)) { 3756 assert(Base && "Base class should be set for homogeneous aggregate"); 3757 // Homogeneous aggregates are passed and returned directly. 3758 return tryUseRegs(Ty, FreeVFPRegs, /*RegsNeeded=*/ NumMembers, 3759 /*IsInt=*/ false); 3760 } 3761 3762 uint64_t Size = getContext().getTypeSize(Ty); 3763 if (Size <= 128) { 3764 // Small structs can use the same direct type whether they're in registers 3765 // or on the stack. 3766 llvm::Type *BaseTy; 3767 unsigned NumBases; 3768 int SizeInRegs = (Size + 63) / 64; 3769 3770 if (getContext().getTypeAlign(Ty) == 128) { 3771 BaseTy = llvm::Type::getIntNTy(getVMContext(), 128); 3772 NumBases = 1; 3773 3774 // If the type may need padding registers to ensure "alignment", we must 3775 // be careful when this is accounted for. Increasing the effective size 3776 // covers all cases. 3777 SizeInRegs += FreeIntRegs % 2 != 0; 3778 } else { 3779 BaseTy = llvm::Type::getInt64Ty(getVMContext()); 3780 NumBases = SizeInRegs; 3781 } 3782 llvm::Type *DirectTy = llvm::ArrayType::get(BaseTy, NumBases); 3783 3784 return tryUseRegs(Ty, FreeIntRegs, /*RegsNeeded=*/ SizeInRegs, 3785 /*IsInt=*/ true, DirectTy); 3786 } 3787 3788 // If the aggregate is > 16 bytes, it's passed and returned indirectly. In 3789 // LLVM terms the return uses an "sret" pointer, but that's handled elsewhere. 3790 --FreeIntRegs; 3791 return ABIArgInfo::getIndirect(0, /* byVal = */ false); 3792} 3793 3794llvm::Value *AArch64ABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 3795 CodeGenFunction &CGF) const { 3796 // The AArch64 va_list type and handling is specified in the Procedure Call 3797 // Standard, section B.4: 3798 // 3799 // struct { 3800 // void *__stack; 3801 // void *__gr_top; 3802 // void *__vr_top; 3803 // int __gr_offs; 3804 // int __vr_offs; 3805 // }; 3806 3807 assert(!CGF.CGM.getDataLayout().isBigEndian() 3808 && "va_arg not implemented for big-endian AArch64"); 3809 3810 int FreeIntRegs = 8, FreeVFPRegs = 8; 3811 Ty = CGF.getContext().getCanonicalType(Ty); 3812 ABIArgInfo AI = classifyGenericType(Ty, FreeIntRegs, FreeVFPRegs); 3813 3814 llvm::BasicBlock *MaybeRegBlock = CGF.createBasicBlock("vaarg.maybe_reg"); 3815 llvm::BasicBlock *InRegBlock = CGF.createBasicBlock("vaarg.in_reg"); 3816 llvm::BasicBlock *OnStackBlock = CGF.createBasicBlock("vaarg.on_stack"); 3817 llvm::BasicBlock *ContBlock = CGF.createBasicBlock("vaarg.end"); 3818 3819 llvm::Value *reg_offs_p = 0, *reg_offs = 0; 3820 int reg_top_index; 3821 int RegSize; 3822 if (FreeIntRegs < 8) { 3823 assert(FreeVFPRegs == 8 && "Arguments never split between int & VFP regs"); 3824 // 3 is the field number of __gr_offs 3825 reg_offs_p = CGF.Builder.CreateStructGEP(VAListAddr, 3, "gr_offs_p"); 3826 reg_offs = CGF.Builder.CreateLoad(reg_offs_p, "gr_offs"); 3827 reg_top_index = 1; // field number for __gr_top 3828 RegSize = 8 * (8 - FreeIntRegs); 3829 } else { 3830 assert(FreeVFPRegs < 8 && "Argument must go in VFP or int regs"); 3831 // 4 is the field number of __vr_offs. 3832 reg_offs_p = CGF.Builder.CreateStructGEP(VAListAddr, 4, "vr_offs_p"); 3833 reg_offs = CGF.Builder.CreateLoad(reg_offs_p, "vr_offs"); 3834 reg_top_index = 2; // field number for __vr_top 3835 RegSize = 16 * (8 - FreeVFPRegs); 3836 } 3837 3838 //======================================= 3839 // Find out where argument was passed 3840 //======================================= 3841 3842 // If reg_offs >= 0 we're already using the stack for this type of 3843 // argument. We don't want to keep updating reg_offs (in case it overflows, 3844 // though anyone passing 2GB of arguments, each at most 16 bytes, deserves 3845 // whatever they get). 3846 llvm::Value *UsingStack = 0; 3847 UsingStack = CGF.Builder.CreateICmpSGE(reg_offs, 3848 llvm::ConstantInt::get(CGF.Int32Ty, 0)); 3849 3850 CGF.Builder.CreateCondBr(UsingStack, OnStackBlock, MaybeRegBlock); 3851 3852 // Otherwise, at least some kind of argument could go in these registers, the 3853 // quesiton is whether this particular type is too big. 3854 CGF.EmitBlock(MaybeRegBlock); 3855 3856 // Integer arguments may need to correct register alignment (for example a 3857 // "struct { __int128 a; };" gets passed in x_2N, x_{2N+1}). In this case we 3858 // align __gr_offs to calculate the potential address. 3859 if (FreeIntRegs < 8 && AI.isDirect() && getContext().getTypeAlign(Ty) > 64) { 3860 int Align = getContext().getTypeAlign(Ty) / 8; 3861 3862 reg_offs = CGF.Builder.CreateAdd(reg_offs, 3863 llvm::ConstantInt::get(CGF.Int32Ty, Align - 1), 3864 "align_regoffs"); 3865 reg_offs = CGF.Builder.CreateAnd(reg_offs, 3866 llvm::ConstantInt::get(CGF.Int32Ty, -Align), 3867 "aligned_regoffs"); 3868 } 3869 3870 // Update the gr_offs/vr_offs pointer for next call to va_arg on this va_list. 3871 llvm::Value *NewOffset = 0; 3872 NewOffset = CGF.Builder.CreateAdd(reg_offs, 3873 llvm::ConstantInt::get(CGF.Int32Ty, RegSize), 3874 "new_reg_offs"); 3875 CGF.Builder.CreateStore(NewOffset, reg_offs_p); 3876 3877 // Now we're in a position to decide whether this argument really was in 3878 // registers or not. 3879 llvm::Value *InRegs = 0; 3880 InRegs = CGF.Builder.CreateICmpSLE(NewOffset, 3881 llvm::ConstantInt::get(CGF.Int32Ty, 0), 3882 "inreg"); 3883 3884 CGF.Builder.CreateCondBr(InRegs, InRegBlock, OnStackBlock); 3885 3886 //======================================= 3887 // Argument was in registers 3888 //======================================= 3889 3890 // Now we emit the code for if the argument was originally passed in 3891 // registers. First start the appropriate block: 3892 CGF.EmitBlock(InRegBlock); 3893 3894 llvm::Value *reg_top_p = 0, *reg_top = 0; 3895 reg_top_p = CGF.Builder.CreateStructGEP(VAListAddr, reg_top_index, "reg_top_p"); 3896 reg_top = CGF.Builder.CreateLoad(reg_top_p, "reg_top"); 3897 llvm::Value *BaseAddr = CGF.Builder.CreateGEP(reg_top, reg_offs); 3898 llvm::Value *RegAddr = 0; 3899 llvm::Type *MemTy = llvm::PointerType::getUnqual(CGF.ConvertTypeForMem(Ty)); 3900 3901 if (!AI.isDirect()) { 3902 // If it's been passed indirectly (actually a struct), whatever we find from 3903 // stored registers or on the stack will actually be a struct **. 3904 MemTy = llvm::PointerType::getUnqual(MemTy); 3905 } 3906 3907 const Type *Base = 0; 3908 uint64_t NumMembers; 3909 if (isHomogeneousAggregate(Ty, Base, getContext(), &NumMembers) 3910 && NumMembers > 1) { 3911 // Homogeneous aggregates passed in registers will have their elements split 3912 // and stored 16-bytes apart regardless of size (they're notionally in qN, 3913 // qN+1, ...). We reload and store into a temporary local variable 3914 // contiguously. 3915 assert(AI.isDirect() && "Homogeneous aggregates should be passed directly"); 3916 llvm::Type *BaseTy = CGF.ConvertType(QualType(Base, 0)); 3917 llvm::Type *HFATy = llvm::ArrayType::get(BaseTy, NumMembers); 3918 llvm::Value *Tmp = CGF.CreateTempAlloca(HFATy); 3919 3920 for (unsigned i = 0; i < NumMembers; ++i) { 3921 llvm::Value *BaseOffset = llvm::ConstantInt::get(CGF.Int32Ty, 16 * i); 3922 llvm::Value *LoadAddr = CGF.Builder.CreateGEP(BaseAddr, BaseOffset); 3923 LoadAddr = CGF.Builder.CreateBitCast(LoadAddr, 3924 llvm::PointerType::getUnqual(BaseTy)); 3925 llvm::Value *StoreAddr = CGF.Builder.CreateStructGEP(Tmp, i); 3926 3927 llvm::Value *Elem = CGF.Builder.CreateLoad(LoadAddr); 3928 CGF.Builder.CreateStore(Elem, StoreAddr); 3929 } 3930 3931 RegAddr = CGF.Builder.CreateBitCast(Tmp, MemTy); 3932 } else { 3933 // Otherwise the object is contiguous in memory 3934 RegAddr = CGF.Builder.CreateBitCast(BaseAddr, MemTy); 3935 } 3936 3937 CGF.EmitBranch(ContBlock); 3938 3939 //======================================= 3940 // Argument was on the stack 3941 //======================================= 3942 CGF.EmitBlock(OnStackBlock); 3943 3944 llvm::Value *stack_p = 0, *OnStackAddr = 0; 3945 stack_p = CGF.Builder.CreateStructGEP(VAListAddr, 0, "stack_p"); 3946 OnStackAddr = CGF.Builder.CreateLoad(stack_p, "stack"); 3947 3948 // Again, stack arguments may need realigmnent. In this case both integer and 3949 // floating-point ones might be affected. 3950 if (AI.isDirect() && getContext().getTypeAlign(Ty) > 64) { 3951 int Align = getContext().getTypeAlign(Ty) / 8; 3952 3953 OnStackAddr = CGF.Builder.CreatePtrToInt(OnStackAddr, CGF.Int64Ty); 3954 3955 OnStackAddr = CGF.Builder.CreateAdd(OnStackAddr, 3956 llvm::ConstantInt::get(CGF.Int64Ty, Align - 1), 3957 "align_stack"); 3958 OnStackAddr = CGF.Builder.CreateAnd(OnStackAddr, 3959 llvm::ConstantInt::get(CGF.Int64Ty, -Align), 3960 "align_stack"); 3961 3962 OnStackAddr = CGF.Builder.CreateIntToPtr(OnStackAddr, CGF.Int8PtrTy); 3963 } 3964 3965 uint64_t StackSize; 3966 if (AI.isDirect()) 3967 StackSize = getContext().getTypeSize(Ty) / 8; 3968 else 3969 StackSize = 8; 3970 3971 // All stack slots are 8 bytes 3972 StackSize = llvm::RoundUpToAlignment(StackSize, 8); 3973 3974 llvm::Value *StackSizeC = llvm::ConstantInt::get(CGF.Int32Ty, StackSize); 3975 llvm::Value *NewStack = CGF.Builder.CreateGEP(OnStackAddr, StackSizeC, 3976 "new_stack"); 3977 3978 // Write the new value of __stack for the next call to va_arg 3979 CGF.Builder.CreateStore(NewStack, stack_p); 3980 3981 OnStackAddr = CGF.Builder.CreateBitCast(OnStackAddr, MemTy); 3982 3983 CGF.EmitBranch(ContBlock); 3984 3985 //======================================= 3986 // Tidy up 3987 //======================================= 3988 CGF.EmitBlock(ContBlock); 3989 3990 llvm::PHINode *ResAddr = CGF.Builder.CreatePHI(MemTy, 2, "vaarg.addr"); 3991 ResAddr->addIncoming(RegAddr, InRegBlock); 3992 ResAddr->addIncoming(OnStackAddr, OnStackBlock); 3993 3994 if (AI.isDirect()) 3995 return ResAddr; 3996 3997 return CGF.Builder.CreateLoad(ResAddr, "vaarg.addr"); 3998} 3999 4000//===----------------------------------------------------------------------===// 4001// NVPTX ABI Implementation 4002//===----------------------------------------------------------------------===// 4003 4004namespace { 4005 4006class NVPTXABIInfo : public ABIInfo { 4007public: 4008 NVPTXABIInfo(CodeGenTypes &CGT) : ABIInfo(CGT) {} 4009 4010 ABIArgInfo classifyReturnType(QualType RetTy) const; 4011 ABIArgInfo classifyArgumentType(QualType Ty) const; 4012 4013 virtual void computeInfo(CGFunctionInfo &FI) const; 4014 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 4015 CodeGenFunction &CFG) const; 4016}; 4017 4018class NVPTXTargetCodeGenInfo : public TargetCodeGenInfo { 4019public: 4020 NVPTXTargetCodeGenInfo(CodeGenTypes &CGT) 4021 : TargetCodeGenInfo(new NVPTXABIInfo(CGT)) {} 4022 4023 virtual void SetTargetAttributes(const Decl *D, llvm::GlobalValue *GV, 4024 CodeGen::CodeGenModule &M) const; 4025private: 4026 static void addKernelMetadata(llvm::Function *F); 4027}; 4028 4029ABIArgInfo NVPTXABIInfo::classifyReturnType(QualType RetTy) const { 4030 if (RetTy->isVoidType()) 4031 return ABIArgInfo::getIgnore(); 4032 if (isAggregateTypeForABI(RetTy)) 4033 return ABIArgInfo::getIndirect(0); 4034 return ABIArgInfo::getDirect(); 4035} 4036 4037ABIArgInfo NVPTXABIInfo::classifyArgumentType(QualType Ty) const { 4038 if (isAggregateTypeForABI(Ty)) 4039 return ABIArgInfo::getIndirect(0); 4040 4041 return ABIArgInfo::getDirect(); 4042} 4043 4044void NVPTXABIInfo::computeInfo(CGFunctionInfo &FI) const { 4045 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 4046 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 4047 it != ie; ++it) 4048 it->info = classifyArgumentType(it->type); 4049 4050 // Always honor user-specified calling convention. 4051 if (FI.getCallingConvention() != llvm::CallingConv::C) 4052 return; 4053 4054 FI.setEffectiveCallingConvention(getRuntimeCC()); 4055} 4056 4057llvm::Value *NVPTXABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 4058 CodeGenFunction &CFG) const { 4059 llvm_unreachable("NVPTX does not support varargs"); 4060} 4061 4062void NVPTXTargetCodeGenInfo:: 4063SetTargetAttributes(const Decl *D, llvm::GlobalValue *GV, 4064 CodeGen::CodeGenModule &M) const{ 4065 const FunctionDecl *FD = dyn_cast<FunctionDecl>(D); 4066 if (!FD) return; 4067 4068 llvm::Function *F = cast<llvm::Function>(GV); 4069 4070 // Perform special handling in OpenCL mode 4071 if (M.getLangOpts().OpenCL) { 4072 // Use OpenCL function attributes to check for kernel functions 4073 // By default, all functions are device functions 4074 if (FD->hasAttr<OpenCLKernelAttr>()) { 4075 // OpenCL __kernel functions get kernel metadata 4076 addKernelMetadata(F); 4077 // And kernel functions are not subject to inlining 4078 F->addFnAttr(llvm::Attribute::NoInline); 4079 } 4080 } 4081 4082 // Perform special handling in CUDA mode. 4083 if (M.getLangOpts().CUDA) { 4084 // CUDA __global__ functions get a kernel metadata entry. Since 4085 // __global__ functions cannot be called from the device, we do not 4086 // need to set the noinline attribute. 4087 if (FD->getAttr<CUDAGlobalAttr>()) 4088 addKernelMetadata(F); 4089 } 4090} 4091 4092void NVPTXTargetCodeGenInfo::addKernelMetadata(llvm::Function *F) { 4093 llvm::Module *M = F->getParent(); 4094 llvm::LLVMContext &Ctx = M->getContext(); 4095 4096 // Get "nvvm.annotations" metadata node 4097 llvm::NamedMDNode *MD = M->getOrInsertNamedMetadata("nvvm.annotations"); 4098 4099 // Create !{<func-ref>, metadata !"kernel", i32 1} node 4100 llvm::SmallVector<llvm::Value *, 3> MDVals; 4101 MDVals.push_back(F); 4102 MDVals.push_back(llvm::MDString::get(Ctx, "kernel")); 4103 MDVals.push_back(llvm::ConstantInt::get(llvm::Type::getInt32Ty(Ctx), 1)); 4104 4105 // Append metadata to nvvm.annotations 4106 MD->addOperand(llvm::MDNode::get(Ctx, MDVals)); 4107} 4108 4109} 4110 4111//===----------------------------------------------------------------------===// 4112// MBlaze ABI Implementation 4113//===----------------------------------------------------------------------===// 4114 4115namespace { 4116 4117class MBlazeABIInfo : public ABIInfo { 4118public: 4119 MBlazeABIInfo(CodeGenTypes &CGT) : ABIInfo(CGT) {} 4120 4121 bool isPromotableIntegerType(QualType Ty) const; 4122 4123 ABIArgInfo classifyReturnType(QualType RetTy) const; 4124 ABIArgInfo classifyArgumentType(QualType RetTy) const; 4125 4126 virtual void computeInfo(CGFunctionInfo &FI) const { 4127 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 4128 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 4129 it != ie; ++it) 4130 it->info = classifyArgumentType(it->type); 4131 } 4132 4133 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 4134 CodeGenFunction &CGF) const; 4135}; 4136 4137class MBlazeTargetCodeGenInfo : public TargetCodeGenInfo { 4138public: 4139 MBlazeTargetCodeGenInfo(CodeGenTypes &CGT) 4140 : TargetCodeGenInfo(new MBlazeABIInfo(CGT)) {} 4141 void SetTargetAttributes(const Decl *D, llvm::GlobalValue *GV, 4142 CodeGen::CodeGenModule &M) const; 4143}; 4144 4145} 4146 4147bool MBlazeABIInfo::isPromotableIntegerType(QualType Ty) const { 4148 // MBlaze ABI requires all 8 and 16 bit quantities to be extended. 4149 if (const BuiltinType *BT = Ty->getAs<BuiltinType>()) 4150 switch (BT->getKind()) { 4151 case BuiltinType::Bool: 4152 case BuiltinType::Char_S: 4153 case BuiltinType::Char_U: 4154 case BuiltinType::SChar: 4155 case BuiltinType::UChar: 4156 case BuiltinType::Short: 4157 case BuiltinType::UShort: 4158 return true; 4159 default: 4160 return false; 4161 } 4162 return false; 4163} 4164 4165llvm::Value *MBlazeABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 4166 CodeGenFunction &CGF) const { 4167 // FIXME: Implement 4168 return 0; 4169} 4170 4171 4172ABIArgInfo MBlazeABIInfo::classifyReturnType(QualType RetTy) const { 4173 if (RetTy->isVoidType()) 4174 return ABIArgInfo::getIgnore(); 4175 if (isAggregateTypeForABI(RetTy)) 4176 return ABIArgInfo::getIndirect(0); 4177 4178 return (isPromotableIntegerType(RetTy) ? 4179 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 4180} 4181 4182ABIArgInfo MBlazeABIInfo::classifyArgumentType(QualType Ty) const { 4183 if (isAggregateTypeForABI(Ty)) 4184 return ABIArgInfo::getIndirect(0); 4185 4186 return (isPromotableIntegerType(Ty) ? 4187 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 4188} 4189 4190void MBlazeTargetCodeGenInfo::SetTargetAttributes(const Decl *D, 4191 llvm::GlobalValue *GV, 4192 CodeGen::CodeGenModule &M) 4193 const { 4194 const FunctionDecl *FD = dyn_cast<FunctionDecl>(D); 4195 if (!FD) return; 4196 4197 llvm::CallingConv::ID CC = llvm::CallingConv::C; 4198 if (FD->hasAttr<MBlazeInterruptHandlerAttr>()) 4199 CC = llvm::CallingConv::MBLAZE_INTR; 4200 else if (FD->hasAttr<MBlazeSaveVolatilesAttr>()) 4201 CC = llvm::CallingConv::MBLAZE_SVOL; 4202 4203 if (CC != llvm::CallingConv::C) { 4204 // Handle 'interrupt_handler' attribute: 4205 llvm::Function *F = cast<llvm::Function>(GV); 4206 4207 // Step 1: Set ISR calling convention. 4208 F->setCallingConv(CC); 4209 4210 // Step 2: Add attributes goodness. 4211 F->addFnAttr(llvm::Attribute::NoInline); 4212 } 4213 4214 // Step 3: Emit _interrupt_handler alias. 4215 if (CC == llvm::CallingConv::MBLAZE_INTR) 4216 new llvm::GlobalAlias(GV->getType(), llvm::Function::ExternalLinkage, 4217 "_interrupt_handler", GV, &M.getModule()); 4218} 4219 4220 4221//===----------------------------------------------------------------------===// 4222// MSP430 ABI Implementation 4223//===----------------------------------------------------------------------===// 4224 4225namespace { 4226 4227class MSP430TargetCodeGenInfo : public TargetCodeGenInfo { 4228public: 4229 MSP430TargetCodeGenInfo(CodeGenTypes &CGT) 4230 : TargetCodeGenInfo(new DefaultABIInfo(CGT)) {} 4231 void SetTargetAttributes(const Decl *D, llvm::GlobalValue *GV, 4232 CodeGen::CodeGenModule &M) const; 4233}; 4234 4235} 4236 4237void MSP430TargetCodeGenInfo::SetTargetAttributes(const Decl *D, 4238 llvm::GlobalValue *GV, 4239 CodeGen::CodeGenModule &M) const { 4240 if (const FunctionDecl *FD = dyn_cast<FunctionDecl>(D)) { 4241 if (const MSP430InterruptAttr *attr = FD->getAttr<MSP430InterruptAttr>()) { 4242 // Handle 'interrupt' attribute: 4243 llvm::Function *F = cast<llvm::Function>(GV); 4244 4245 // Step 1: Set ISR calling convention. 4246 F->setCallingConv(llvm::CallingConv::MSP430_INTR); 4247 4248 // Step 2: Add attributes goodness. 4249 F->addFnAttr(llvm::Attribute::NoInline); 4250 4251 // Step 3: Emit ISR vector alias. 4252 unsigned Num = attr->getNumber() / 2; 4253 new llvm::GlobalAlias(GV->getType(), llvm::Function::ExternalLinkage, 4254 "__isr_" + Twine(Num), 4255 GV, &M.getModule()); 4256 } 4257 } 4258} 4259 4260//===----------------------------------------------------------------------===// 4261// MIPS ABI Implementation. This works for both little-endian and 4262// big-endian variants. 4263//===----------------------------------------------------------------------===// 4264 4265namespace { 4266class MipsABIInfo : public ABIInfo { 4267 bool IsO32; 4268 unsigned MinABIStackAlignInBytes, StackAlignInBytes; 4269 void CoerceToIntArgs(uint64_t TySize, 4270 SmallVector<llvm::Type*, 8> &ArgList) const; 4271 llvm::Type* HandleAggregates(QualType Ty, uint64_t TySize) const; 4272 llvm::Type* returnAggregateInRegs(QualType RetTy, uint64_t Size) const; 4273 llvm::Type* getPaddingType(uint64_t Align, uint64_t Offset) const; 4274public: 4275 MipsABIInfo(CodeGenTypes &CGT, bool _IsO32) : 4276 ABIInfo(CGT), IsO32(_IsO32), MinABIStackAlignInBytes(IsO32 ? 4 : 8), 4277 StackAlignInBytes(IsO32 ? 8 : 16) {} 4278 4279 ABIArgInfo classifyReturnType(QualType RetTy) const; 4280 ABIArgInfo classifyArgumentType(QualType RetTy, uint64_t &Offset) const; 4281 virtual void computeInfo(CGFunctionInfo &FI) const; 4282 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 4283 CodeGenFunction &CGF) const; 4284}; 4285 4286class MIPSTargetCodeGenInfo : public TargetCodeGenInfo { 4287 unsigned SizeOfUnwindException; 4288public: 4289 MIPSTargetCodeGenInfo(CodeGenTypes &CGT, bool IsO32) 4290 : TargetCodeGenInfo(new MipsABIInfo(CGT, IsO32)), 4291 SizeOfUnwindException(IsO32 ? 24 : 32) {} 4292 4293 int getDwarfEHStackPointer(CodeGen::CodeGenModule &CGM) const { 4294 return 29; 4295 } 4296 4297 void SetTargetAttributes(const Decl *D, llvm::GlobalValue *GV, 4298 CodeGen::CodeGenModule &CGM) const { 4299 const FunctionDecl *FD = dyn_cast<FunctionDecl>(D); 4300 if (!FD) return; 4301 llvm::Function *Fn = cast<llvm::Function>(GV); 4302 if (FD->hasAttr<Mips16Attr>()) { 4303 Fn->addFnAttr("mips16"); 4304 } 4305 else if (FD->hasAttr<NoMips16Attr>()) { 4306 Fn->addFnAttr("nomips16"); 4307 } 4308 } 4309 4310 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 4311 llvm::Value *Address) const; 4312 4313 unsigned getSizeOfUnwindException() const { 4314 return SizeOfUnwindException; 4315 } 4316}; 4317} 4318 4319void MipsABIInfo::CoerceToIntArgs(uint64_t TySize, 4320 SmallVector<llvm::Type*, 8> &ArgList) const { 4321 llvm::IntegerType *IntTy = 4322 llvm::IntegerType::get(getVMContext(), MinABIStackAlignInBytes * 8); 4323 4324 // Add (TySize / MinABIStackAlignInBytes) args of IntTy. 4325 for (unsigned N = TySize / (MinABIStackAlignInBytes * 8); N; --N) 4326 ArgList.push_back(IntTy); 4327 4328 // If necessary, add one more integer type to ArgList. 4329 unsigned R = TySize % (MinABIStackAlignInBytes * 8); 4330 4331 if (R) 4332 ArgList.push_back(llvm::IntegerType::get(getVMContext(), R)); 4333} 4334 4335// In N32/64, an aligned double precision floating point field is passed in 4336// a register. 4337llvm::Type* MipsABIInfo::HandleAggregates(QualType Ty, uint64_t TySize) const { 4338 SmallVector<llvm::Type*, 8> ArgList, IntArgList; 4339 4340 if (IsO32) { 4341 CoerceToIntArgs(TySize, ArgList); 4342 return llvm::StructType::get(getVMContext(), ArgList); 4343 } 4344 4345 if (Ty->isComplexType()) 4346 return CGT.ConvertType(Ty); 4347 4348 const RecordType *RT = Ty->getAs<RecordType>(); 4349 4350 // Unions/vectors are passed in integer registers. 4351 if (!RT || !RT->isStructureOrClassType()) { 4352 CoerceToIntArgs(TySize, ArgList); 4353 return llvm::StructType::get(getVMContext(), ArgList); 4354 } 4355 4356 const RecordDecl *RD = RT->getDecl(); 4357 const ASTRecordLayout &Layout = getContext().getASTRecordLayout(RD); 4358 assert(!(TySize % 8) && "Size of structure must be multiple of 8."); 4359 4360 uint64_t LastOffset = 0; 4361 unsigned idx = 0; 4362 llvm::IntegerType *I64 = llvm::IntegerType::get(getVMContext(), 64); 4363 4364 // Iterate over fields in the struct/class and check if there are any aligned 4365 // double fields. 4366 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 4367 i != e; ++i, ++idx) { 4368 const QualType Ty = i->getType(); 4369 const BuiltinType *BT = Ty->getAs<BuiltinType>(); 4370 4371 if (!BT || BT->getKind() != BuiltinType::Double) 4372 continue; 4373 4374 uint64_t Offset = Layout.getFieldOffset(idx); 4375 if (Offset % 64) // Ignore doubles that are not aligned. 4376 continue; 4377 4378 // Add ((Offset - LastOffset) / 64) args of type i64. 4379 for (unsigned j = (Offset - LastOffset) / 64; j > 0; --j) 4380 ArgList.push_back(I64); 4381 4382 // Add double type. 4383 ArgList.push_back(llvm::Type::getDoubleTy(getVMContext())); 4384 LastOffset = Offset + 64; 4385 } 4386 4387 CoerceToIntArgs(TySize - LastOffset, IntArgList); 4388 ArgList.append(IntArgList.begin(), IntArgList.end()); 4389 4390 return llvm::StructType::get(getVMContext(), ArgList); 4391} 4392 4393llvm::Type *MipsABIInfo::getPaddingType(uint64_t Align, uint64_t Offset) const { 4394 assert((Offset % MinABIStackAlignInBytes) == 0); 4395 4396 if ((Align - 1) & Offset) 4397 return llvm::IntegerType::get(getVMContext(), MinABIStackAlignInBytes * 8); 4398 4399 return 0; 4400} 4401 4402ABIArgInfo 4403MipsABIInfo::classifyArgumentType(QualType Ty, uint64_t &Offset) const { 4404 uint64_t OrigOffset = Offset; 4405 uint64_t TySize = getContext().getTypeSize(Ty); 4406 uint64_t Align = getContext().getTypeAlign(Ty) / 8; 4407 4408 Align = std::min(std::max(Align, (uint64_t)MinABIStackAlignInBytes), 4409 (uint64_t)StackAlignInBytes); 4410 Offset = llvm::RoundUpToAlignment(Offset, Align); 4411 Offset += llvm::RoundUpToAlignment(TySize, Align * 8) / 8; 4412 4413 if (isAggregateTypeForABI(Ty) || Ty->isVectorType()) { 4414 // Ignore empty aggregates. 4415 if (TySize == 0) 4416 return ABIArgInfo::getIgnore(); 4417 4418 // Records with non trivial destructors/constructors should not be passed 4419 // by value. 4420 if (isRecordWithNonTrivialDestructorOrCopyConstructor(Ty)) { 4421 Offset = OrigOffset + MinABIStackAlignInBytes; 4422 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 4423 } 4424 4425 // If we have reached here, aggregates are passed directly by coercing to 4426 // another structure type. Padding is inserted if the offset of the 4427 // aggregate is unaligned. 4428 return ABIArgInfo::getDirect(HandleAggregates(Ty, TySize), 0, 4429 getPaddingType(Align, OrigOffset)); 4430 } 4431 4432 // Treat an enum type as its underlying type. 4433 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 4434 Ty = EnumTy->getDecl()->getIntegerType(); 4435 4436 if (Ty->isPromotableIntegerType()) 4437 return ABIArgInfo::getExtend(); 4438 4439 return ABIArgInfo::getDirect(0, 0, 4440 IsO32 ? 0 : getPaddingType(Align, OrigOffset)); 4441} 4442 4443llvm::Type* 4444MipsABIInfo::returnAggregateInRegs(QualType RetTy, uint64_t Size) const { 4445 const RecordType *RT = RetTy->getAs<RecordType>(); 4446 SmallVector<llvm::Type*, 8> RTList; 4447 4448 if (RT && RT->isStructureOrClassType()) { 4449 const RecordDecl *RD = RT->getDecl(); 4450 const ASTRecordLayout &Layout = getContext().getASTRecordLayout(RD); 4451 unsigned FieldCnt = Layout.getFieldCount(); 4452 4453 // N32/64 returns struct/classes in floating point registers if the 4454 // following conditions are met: 4455 // 1. The size of the struct/class is no larger than 128-bit. 4456 // 2. The struct/class has one or two fields all of which are floating 4457 // point types. 4458 // 3. The offset of the first field is zero (this follows what gcc does). 4459 // 4460 // Any other composite results are returned in integer registers. 4461 // 4462 if (FieldCnt && (FieldCnt <= 2) && !Layout.getFieldOffset(0)) { 4463 RecordDecl::field_iterator b = RD->field_begin(), e = RD->field_end(); 4464 for (; b != e; ++b) { 4465 const BuiltinType *BT = b->getType()->getAs<BuiltinType>(); 4466 4467 if (!BT || !BT->isFloatingPoint()) 4468 break; 4469 4470 RTList.push_back(CGT.ConvertType(b->getType())); 4471 } 4472 4473 if (b == e) 4474 return llvm::StructType::get(getVMContext(), RTList, 4475 RD->hasAttr<PackedAttr>()); 4476 4477 RTList.clear(); 4478 } 4479 } 4480 4481 CoerceToIntArgs(Size, RTList); 4482 return llvm::StructType::get(getVMContext(), RTList); 4483} 4484 4485ABIArgInfo MipsABIInfo::classifyReturnType(QualType RetTy) const { 4486 uint64_t Size = getContext().getTypeSize(RetTy); 4487 4488 if (RetTy->isVoidType() || Size == 0) 4489 return ABIArgInfo::getIgnore(); 4490 4491 if (isAggregateTypeForABI(RetTy) || RetTy->isVectorType()) { 4492 if (Size <= 128) { 4493 if (RetTy->isAnyComplexType()) 4494 return ABIArgInfo::getDirect(); 4495 4496 // O32 returns integer vectors in registers. 4497 if (IsO32 && RetTy->isVectorType() && !RetTy->hasFloatingRepresentation()) 4498 return ABIArgInfo::getDirect(returnAggregateInRegs(RetTy, Size)); 4499 4500 if (!IsO32 && !isRecordWithNonTrivialDestructorOrCopyConstructor(RetTy)) 4501 return ABIArgInfo::getDirect(returnAggregateInRegs(RetTy, Size)); 4502 } 4503 4504 return ABIArgInfo::getIndirect(0); 4505 } 4506 4507 // Treat an enum type as its underlying type. 4508 if (const EnumType *EnumTy = RetTy->getAs<EnumType>()) 4509 RetTy = EnumTy->getDecl()->getIntegerType(); 4510 4511 return (RetTy->isPromotableIntegerType() ? 4512 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 4513} 4514 4515void MipsABIInfo::computeInfo(CGFunctionInfo &FI) const { 4516 ABIArgInfo &RetInfo = FI.getReturnInfo(); 4517 RetInfo = classifyReturnType(FI.getReturnType()); 4518 4519 // Check if a pointer to an aggregate is passed as a hidden argument. 4520 uint64_t Offset = RetInfo.isIndirect() ? MinABIStackAlignInBytes : 0; 4521 4522 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 4523 it != ie; ++it) 4524 it->info = classifyArgumentType(it->type, Offset); 4525} 4526 4527llvm::Value* MipsABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 4528 CodeGenFunction &CGF) const { 4529 llvm::Type *BP = CGF.Int8PtrTy; 4530 llvm::Type *BPP = CGF.Int8PtrPtrTy; 4531 4532 CGBuilderTy &Builder = CGF.Builder; 4533 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP, "ap"); 4534 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur"); 4535 int64_t TypeAlign = getContext().getTypeAlign(Ty) / 8; 4536 llvm::Type *PTy = llvm::PointerType::getUnqual(CGF.ConvertType(Ty)); 4537 llvm::Value *AddrTyped; 4538 unsigned PtrWidth = getTarget().getPointerWidth(0); 4539 llvm::IntegerType *IntTy = (PtrWidth == 32) ? CGF.Int32Ty : CGF.Int64Ty; 4540 4541 if (TypeAlign > MinABIStackAlignInBytes) { 4542 llvm::Value *AddrAsInt = CGF.Builder.CreatePtrToInt(Addr, IntTy); 4543 llvm::Value *Inc = llvm::ConstantInt::get(IntTy, TypeAlign - 1); 4544 llvm::Value *Mask = llvm::ConstantInt::get(IntTy, -TypeAlign); 4545 llvm::Value *Add = CGF.Builder.CreateAdd(AddrAsInt, Inc); 4546 llvm::Value *And = CGF.Builder.CreateAnd(Add, Mask); 4547 AddrTyped = CGF.Builder.CreateIntToPtr(And, PTy); 4548 } 4549 else 4550 AddrTyped = Builder.CreateBitCast(Addr, PTy); 4551 4552 llvm::Value *AlignedAddr = Builder.CreateBitCast(AddrTyped, BP); 4553 TypeAlign = std::max((unsigned)TypeAlign, MinABIStackAlignInBytes); 4554 uint64_t Offset = 4555 llvm::RoundUpToAlignment(CGF.getContext().getTypeSize(Ty) / 8, TypeAlign); 4556 llvm::Value *NextAddr = 4557 Builder.CreateGEP(AlignedAddr, llvm::ConstantInt::get(IntTy, Offset), 4558 "ap.next"); 4559 Builder.CreateStore(NextAddr, VAListAddrAsBPP); 4560 4561 return AddrTyped; 4562} 4563 4564bool 4565MIPSTargetCodeGenInfo::initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 4566 llvm::Value *Address) const { 4567 // This information comes from gcc's implementation, which seems to 4568 // as canonical as it gets. 4569 4570 // Everything on MIPS is 4 bytes. Double-precision FP registers 4571 // are aliased to pairs of single-precision FP registers. 4572 llvm::Value *Four8 = llvm::ConstantInt::get(CGF.Int8Ty, 4); 4573 4574 // 0-31 are the general purpose registers, $0 - $31. 4575 // 32-63 are the floating-point registers, $f0 - $f31. 4576 // 64 and 65 are the multiply/divide registers, $hi and $lo. 4577 // 66 is the (notional, I think) register for signal-handler return. 4578 AssignToArrayRange(CGF.Builder, Address, Four8, 0, 65); 4579 4580 // 67-74 are the floating-point status registers, $fcc0 - $fcc7. 4581 // They are one bit wide and ignored here. 4582 4583 // 80-111 are the coprocessor 0 registers, $c0r0 - $c0r31. 4584 // (coprocessor 1 is the FP unit) 4585 // 112-143 are the coprocessor 2 registers, $c2r0 - $c2r31. 4586 // 144-175 are the coprocessor 3 registers, $c3r0 - $c3r31. 4587 // 176-181 are the DSP accumulator registers. 4588 AssignToArrayRange(CGF.Builder, Address, Four8, 80, 181); 4589 return false; 4590} 4591 4592//===----------------------------------------------------------------------===// 4593// TCE ABI Implementation (see http://tce.cs.tut.fi). Uses mostly the defaults. 4594// Currently subclassed only to implement custom OpenCL C function attribute 4595// handling. 4596//===----------------------------------------------------------------------===// 4597 4598namespace { 4599 4600class TCETargetCodeGenInfo : public DefaultTargetCodeGenInfo { 4601public: 4602 TCETargetCodeGenInfo(CodeGenTypes &CGT) 4603 : DefaultTargetCodeGenInfo(CGT) {} 4604 4605 virtual void SetTargetAttributes(const Decl *D, llvm::GlobalValue *GV, 4606 CodeGen::CodeGenModule &M) const; 4607}; 4608 4609void TCETargetCodeGenInfo::SetTargetAttributes(const Decl *D, 4610 llvm::GlobalValue *GV, 4611 CodeGen::CodeGenModule &M) const { 4612 const FunctionDecl *FD = dyn_cast<FunctionDecl>(D); 4613 if (!FD) return; 4614 4615 llvm::Function *F = cast<llvm::Function>(GV); 4616 4617 if (M.getLangOpts().OpenCL) { 4618 if (FD->hasAttr<OpenCLKernelAttr>()) { 4619 // OpenCL C Kernel functions are not subject to inlining 4620 F->addFnAttr(llvm::Attribute::NoInline); 4621 4622 if (FD->hasAttr<ReqdWorkGroupSizeAttr>()) { 4623 4624 // Convert the reqd_work_group_size() attributes to metadata. 4625 llvm::LLVMContext &Context = F->getContext(); 4626 llvm::NamedMDNode *OpenCLMetadata = 4627 M.getModule().getOrInsertNamedMetadata("opencl.kernel_wg_size_info"); 4628 4629 SmallVector<llvm::Value*, 5> Operands; 4630 Operands.push_back(F); 4631 4632 Operands.push_back(llvm::Constant::getIntegerValue(M.Int32Ty, 4633 llvm::APInt(32, 4634 FD->getAttr<ReqdWorkGroupSizeAttr>()->getXDim()))); 4635 Operands.push_back(llvm::Constant::getIntegerValue(M.Int32Ty, 4636 llvm::APInt(32, 4637 FD->getAttr<ReqdWorkGroupSizeAttr>()->getYDim()))); 4638 Operands.push_back(llvm::Constant::getIntegerValue(M.Int32Ty, 4639 llvm::APInt(32, 4640 FD->getAttr<ReqdWorkGroupSizeAttr>()->getZDim()))); 4641 4642 // Add a boolean constant operand for "required" (true) or "hint" (false) 4643 // for implementing the work_group_size_hint attr later. Currently 4644 // always true as the hint is not yet implemented. 4645 Operands.push_back(llvm::ConstantInt::getTrue(Context)); 4646 OpenCLMetadata->addOperand(llvm::MDNode::get(Context, Operands)); 4647 } 4648 } 4649 } 4650} 4651 4652} 4653 4654//===----------------------------------------------------------------------===// 4655// Hexagon ABI Implementation 4656//===----------------------------------------------------------------------===// 4657 4658namespace { 4659 4660class HexagonABIInfo : public ABIInfo { 4661 4662 4663public: 4664 HexagonABIInfo(CodeGenTypes &CGT) : ABIInfo(CGT) {} 4665 4666private: 4667 4668 ABIArgInfo classifyReturnType(QualType RetTy) const; 4669 ABIArgInfo classifyArgumentType(QualType RetTy) const; 4670 4671 virtual void computeInfo(CGFunctionInfo &FI) const; 4672 4673 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 4674 CodeGenFunction &CGF) const; 4675}; 4676 4677class HexagonTargetCodeGenInfo : public TargetCodeGenInfo { 4678public: 4679 HexagonTargetCodeGenInfo(CodeGenTypes &CGT) 4680 :TargetCodeGenInfo(new HexagonABIInfo(CGT)) {} 4681 4682 int getDwarfEHStackPointer(CodeGen::CodeGenModule &M) const { 4683 return 29; 4684 } 4685}; 4686 4687} 4688 4689void HexagonABIInfo::computeInfo(CGFunctionInfo &FI) const { 4690 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 4691 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 4692 it != ie; ++it) 4693 it->info = classifyArgumentType(it->type); 4694} 4695 4696ABIArgInfo HexagonABIInfo::classifyArgumentType(QualType Ty) const { 4697 if (!isAggregateTypeForABI(Ty)) { 4698 // Treat an enum type as its underlying type. 4699 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 4700 Ty = EnumTy->getDecl()->getIntegerType(); 4701 4702 return (Ty->isPromotableIntegerType() ? 4703 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 4704 } 4705 4706 // Ignore empty records. 4707 if (isEmptyRecord(getContext(), Ty, true)) 4708 return ABIArgInfo::getIgnore(); 4709 4710 // Structures with either a non-trivial destructor or a non-trivial 4711 // copy constructor are always indirect. 4712 if (isRecordWithNonTrivialDestructorOrCopyConstructor(Ty)) 4713 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 4714 4715 uint64_t Size = getContext().getTypeSize(Ty); 4716 if (Size > 64) 4717 return ABIArgInfo::getIndirect(0, /*ByVal=*/true); 4718 // Pass in the smallest viable integer type. 4719 else if (Size > 32) 4720 return ABIArgInfo::getDirect(llvm::Type::getInt64Ty(getVMContext())); 4721 else if (Size > 16) 4722 return ABIArgInfo::getDirect(llvm::Type::getInt32Ty(getVMContext())); 4723 else if (Size > 8) 4724 return ABIArgInfo::getDirect(llvm::Type::getInt16Ty(getVMContext())); 4725 else 4726 return ABIArgInfo::getDirect(llvm::Type::getInt8Ty(getVMContext())); 4727} 4728 4729ABIArgInfo HexagonABIInfo::classifyReturnType(QualType RetTy) const { 4730 if (RetTy->isVoidType()) 4731 return ABIArgInfo::getIgnore(); 4732 4733 // Large vector types should be returned via memory. 4734 if (RetTy->isVectorType() && getContext().getTypeSize(RetTy) > 64) 4735 return ABIArgInfo::getIndirect(0); 4736 4737 if (!isAggregateTypeForABI(RetTy)) { 4738 // Treat an enum type as its underlying type. 4739 if (const EnumType *EnumTy = RetTy->getAs<EnumType>()) 4740 RetTy = EnumTy->getDecl()->getIntegerType(); 4741 4742 return (RetTy->isPromotableIntegerType() ? 4743 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 4744 } 4745 4746 // Structures with either a non-trivial destructor or a non-trivial 4747 // copy constructor are always indirect. 4748 if (isRecordWithNonTrivialDestructorOrCopyConstructor(RetTy)) 4749 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 4750 4751 if (isEmptyRecord(getContext(), RetTy, true)) 4752 return ABIArgInfo::getIgnore(); 4753 4754 // Aggregates <= 8 bytes are returned in r0; other aggregates 4755 // are returned indirectly. 4756 uint64_t Size = getContext().getTypeSize(RetTy); 4757 if (Size <= 64) { 4758 // Return in the smallest viable integer type. 4759 if (Size <= 8) 4760 return ABIArgInfo::getDirect(llvm::Type::getInt8Ty(getVMContext())); 4761 if (Size <= 16) 4762 return ABIArgInfo::getDirect(llvm::Type::getInt16Ty(getVMContext())); 4763 if (Size <= 32) 4764 return ABIArgInfo::getDirect(llvm::Type::getInt32Ty(getVMContext())); 4765 return ABIArgInfo::getDirect(llvm::Type::getInt64Ty(getVMContext())); 4766 } 4767 4768 return ABIArgInfo::getIndirect(0, /*ByVal=*/true); 4769} 4770 4771llvm::Value *HexagonABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 4772 CodeGenFunction &CGF) const { 4773 // FIXME: Need to handle alignment 4774 llvm::Type *BPP = CGF.Int8PtrPtrTy; 4775 4776 CGBuilderTy &Builder = CGF.Builder; 4777 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP, 4778 "ap"); 4779 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur"); 4780 llvm::Type *PTy = 4781 llvm::PointerType::getUnqual(CGF.ConvertType(Ty)); 4782 llvm::Value *AddrTyped = Builder.CreateBitCast(Addr, PTy); 4783 4784 uint64_t Offset = 4785 llvm::RoundUpToAlignment(CGF.getContext().getTypeSize(Ty) / 8, 4); 4786 llvm::Value *NextAddr = 4787 Builder.CreateGEP(Addr, llvm::ConstantInt::get(CGF.Int32Ty, Offset), 4788 "ap.next"); 4789 Builder.CreateStore(NextAddr, VAListAddrAsBPP); 4790 4791 return AddrTyped; 4792} 4793 4794 4795const TargetCodeGenInfo &CodeGenModule::getTargetCodeGenInfo() { 4796 if (TheTargetCodeGenInfo) 4797 return *TheTargetCodeGenInfo; 4798 4799 const llvm::Triple &Triple = getTarget().getTriple(); 4800 switch (Triple.getArch()) { 4801 default: 4802 return *(TheTargetCodeGenInfo = new DefaultTargetCodeGenInfo(Types)); 4803 4804 case llvm::Triple::le32: 4805 return *(TheTargetCodeGenInfo = new PNaClTargetCodeGenInfo(Types)); 4806 case llvm::Triple::mips: 4807 case llvm::Triple::mipsel: 4808 return *(TheTargetCodeGenInfo = new MIPSTargetCodeGenInfo(Types, true)); 4809 4810 case llvm::Triple::mips64: 4811 case llvm::Triple::mips64el: 4812 return *(TheTargetCodeGenInfo = new MIPSTargetCodeGenInfo(Types, false)); 4813 4814 case llvm::Triple::aarch64: 4815 return *(TheTargetCodeGenInfo = new AArch64TargetCodeGenInfo(Types)); 4816 4817 case llvm::Triple::arm: 4818 case llvm::Triple::thumb: 4819 { 4820 ARMABIInfo::ABIKind Kind = ARMABIInfo::AAPCS; 4821 if (strcmp(getTarget().getABI(), "apcs-gnu") == 0) 4822 Kind = ARMABIInfo::APCS; 4823 else if (CodeGenOpts.FloatABI == "hard" || 4824 (CodeGenOpts.FloatABI != "soft" && 4825 Triple.getEnvironment() == llvm::Triple::GNUEABIHF)) 4826 Kind = ARMABIInfo::AAPCS_VFP; 4827 4828 switch (Triple.getOS()) { 4829 case llvm::Triple::NaCl: 4830 return *(TheTargetCodeGenInfo = 4831 new NaClARMTargetCodeGenInfo(Types, Kind)); 4832 default: 4833 return *(TheTargetCodeGenInfo = 4834 new ARMTargetCodeGenInfo(Types, Kind)); 4835 } 4836 } 4837 4838 case llvm::Triple::ppc: 4839 return *(TheTargetCodeGenInfo = new PPC32TargetCodeGenInfo(Types)); 4840 case llvm::Triple::ppc64: 4841 if (Triple.isOSBinFormatELF()) 4842 return *(TheTargetCodeGenInfo = new PPC64_SVR4_TargetCodeGenInfo(Types)); 4843 else 4844 return *(TheTargetCodeGenInfo = new PPC64TargetCodeGenInfo(Types)); 4845 4846 case llvm::Triple::nvptx: 4847 case llvm::Triple::nvptx64: 4848 return *(TheTargetCodeGenInfo = new NVPTXTargetCodeGenInfo(Types)); 4849 4850 case llvm::Triple::mblaze: 4851 return *(TheTargetCodeGenInfo = new MBlazeTargetCodeGenInfo(Types)); 4852 4853 case llvm::Triple::msp430: 4854 return *(TheTargetCodeGenInfo = new MSP430TargetCodeGenInfo(Types)); 4855 4856 case llvm::Triple::tce: 4857 return *(TheTargetCodeGenInfo = new TCETargetCodeGenInfo(Types)); 4858 4859 case llvm::Triple::x86: { 4860 if (Triple.isOSDarwin()) 4861 return *(TheTargetCodeGenInfo = 4862 new X86_32TargetCodeGenInfo(Types, true, true, false, 4863 CodeGenOpts.NumRegisterParameters)); 4864 4865 switch (Triple.getOS()) { 4866 case llvm::Triple::Cygwin: 4867 case llvm::Triple::MinGW32: 4868 case llvm::Triple::AuroraUX: 4869 case llvm::Triple::DragonFly: 4870 case llvm::Triple::FreeBSD: 4871 case llvm::Triple::OpenBSD: 4872 case llvm::Triple::Bitrig: 4873 return *(TheTargetCodeGenInfo = 4874 new X86_32TargetCodeGenInfo(Types, false, true, false, 4875 CodeGenOpts.NumRegisterParameters)); 4876 4877 case llvm::Triple::Win32: 4878 return *(TheTargetCodeGenInfo = 4879 new X86_32TargetCodeGenInfo(Types, false, true, true, 4880 CodeGenOpts.NumRegisterParameters)); 4881 4882 default: 4883 return *(TheTargetCodeGenInfo = 4884 new X86_32TargetCodeGenInfo(Types, false, false, false, 4885 CodeGenOpts.NumRegisterParameters)); 4886 } 4887 } 4888 4889 case llvm::Triple::x86_64: { 4890 bool HasAVX = strcmp(getTarget().getABI(), "avx") == 0; 4891 4892 switch (Triple.getOS()) { 4893 case llvm::Triple::Win32: 4894 case llvm::Triple::MinGW32: 4895 case llvm::Triple::Cygwin: 4896 return *(TheTargetCodeGenInfo = new WinX86_64TargetCodeGenInfo(Types)); 4897 case llvm::Triple::NaCl: 4898 return *(TheTargetCodeGenInfo = new NaClX86_64TargetCodeGenInfo(Types, 4899 HasAVX)); 4900 default: 4901 return *(TheTargetCodeGenInfo = new X86_64TargetCodeGenInfo(Types, 4902 HasAVX)); 4903 } 4904 } 4905 case llvm::Triple::hexagon: 4906 return *(TheTargetCodeGenInfo = new HexagonTargetCodeGenInfo(Types)); 4907 } 4908} 4909