TargetInfo.cpp revision 7711523d948bbe635f690f5795ef7ea9a3289eb2
1//===---- TargetInfo.cpp - Encapsulate target details -----------*- C++ -*-===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// These classes wrap the information about a call or function 11// definition used to handle ABI compliancy. 12// 13//===----------------------------------------------------------------------===// 14 15#include "TargetInfo.h" 16#include "ABIInfo.h" 17#include "CodeGenFunction.h" 18#include "clang/AST/RecordLayout.h" 19#include "llvm/Type.h" 20#include "llvm/ADT/StringExtras.h" 21#include "llvm/ADT/Triple.h" 22#include "llvm/Support/raw_ostream.h" 23using namespace clang; 24using namespace CodeGen; 25 26ABIInfo::~ABIInfo() {} 27 28void ABIArgInfo::dump() const { 29 llvm::raw_ostream &OS = llvm::errs(); 30 OS << "(ABIArgInfo Kind="; 31 switch (TheKind) { 32 case Direct: 33 OS << "Direct"; 34 break; 35 case Extend: 36 OS << "Extend"; 37 break; 38 case Ignore: 39 OS << "Ignore"; 40 break; 41 case Coerce: 42 OS << "Coerce Type="; 43 getCoerceToType()->print(OS); 44 break; 45 case Indirect: 46 OS << "Indirect Align=" << getIndirectAlign() 47 << " Byal=" << getIndirectByVal(); 48 break; 49 case Expand: 50 OS << "Expand"; 51 break; 52 } 53 OS << ")\n"; 54} 55 56TargetCodeGenInfo::~TargetCodeGenInfo() { delete Info; } 57 58static bool isEmptyRecord(ASTContext &Context, QualType T, bool AllowArrays); 59 60/// isEmptyField - Return true iff a the field is "empty", that is it 61/// is an unnamed bit-field or an (array of) empty record(s). 62static bool isEmptyField(ASTContext &Context, const FieldDecl *FD, 63 bool AllowArrays) { 64 if (FD->isUnnamedBitfield()) 65 return true; 66 67 QualType FT = FD->getType(); 68 69 // Constant arrays of empty records count as empty, strip them off. 70 if (AllowArrays) 71 while (const ConstantArrayType *AT = Context.getAsConstantArrayType(FT)) 72 FT = AT->getElementType(); 73 74 return isEmptyRecord(Context, FT, AllowArrays); 75} 76 77/// isEmptyRecord - Return true iff a structure contains only empty 78/// fields. Note that a structure with a flexible array member is not 79/// considered empty. 80static bool isEmptyRecord(ASTContext &Context, QualType T, bool AllowArrays) { 81 const RecordType *RT = T->getAs<RecordType>(); 82 if (!RT) 83 return 0; 84 const RecordDecl *RD = RT->getDecl(); 85 if (RD->hasFlexibleArrayMember()) 86 return false; 87 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 88 i != e; ++i) 89 if (!isEmptyField(Context, *i, AllowArrays)) 90 return false; 91 return true; 92} 93 94/// hasNonTrivialDestructorOrCopyConstructor - Determine if a type has either 95/// a non-trivial destructor or a non-trivial copy constructor. 96static bool hasNonTrivialDestructorOrCopyConstructor(const RecordType *RT) { 97 const CXXRecordDecl *RD = dyn_cast<CXXRecordDecl>(RT->getDecl()); 98 if (!RD) 99 return false; 100 101 return !RD->hasTrivialDestructor() || !RD->hasTrivialCopyConstructor(); 102} 103 104/// isRecordWithNonTrivialDestructorOrCopyConstructor - Determine if a type is 105/// a record type with either a non-trivial destructor or a non-trivial copy 106/// constructor. 107static bool isRecordWithNonTrivialDestructorOrCopyConstructor(QualType T) { 108 const RecordType *RT = T->getAs<RecordType>(); 109 if (!RT) 110 return false; 111 112 return hasNonTrivialDestructorOrCopyConstructor(RT); 113} 114 115/// isSingleElementStruct - Determine if a structure is a "single 116/// element struct", i.e. it has exactly one non-empty field or 117/// exactly one field which is itself a single element 118/// struct. Structures with flexible array members are never 119/// considered single element structs. 120/// 121/// \return The field declaration for the single non-empty field, if 122/// it exists. 123static const Type *isSingleElementStruct(QualType T, ASTContext &Context) { 124 const RecordType *RT = T->getAsStructureType(); 125 if (!RT) 126 return 0; 127 128 const RecordDecl *RD = RT->getDecl(); 129 if (RD->hasFlexibleArrayMember()) 130 return 0; 131 132 const Type *Found = 0; 133 134 // If this is a C++ record, check the bases first. 135 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) { 136 for (CXXRecordDecl::base_class_const_iterator i = CXXRD->bases_begin(), 137 e = CXXRD->bases_end(); i != e; ++i) { 138 const CXXRecordDecl *Base = 139 cast<CXXRecordDecl>(i->getType()->getAs<RecordType>()->getDecl()); 140 // Ignore empty records. 141 if (Base->isEmpty()) 142 continue; 143 144 // If we already found an element then this isn't a single-element struct. 145 if (Found) 146 return 0; 147 148 // If this is non-empty and not a single element struct, the composite 149 // cannot be a single element struct. 150 Found = isSingleElementStruct(i->getType(), Context); 151 if (!Found) 152 return 0; 153 } 154 } 155 156 // Check for single element. 157 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 158 i != e; ++i) { 159 const FieldDecl *FD = *i; 160 QualType FT = FD->getType(); 161 162 // Ignore empty fields. 163 if (isEmptyField(Context, FD, true)) 164 continue; 165 166 // If we already found an element then this isn't a single-element 167 // struct. 168 if (Found) 169 return 0; 170 171 // Treat single element arrays as the element. 172 while (const ConstantArrayType *AT = Context.getAsConstantArrayType(FT)) { 173 if (AT->getSize().getZExtValue() != 1) 174 break; 175 FT = AT->getElementType(); 176 } 177 178 if (!CodeGenFunction::hasAggregateLLVMType(FT)) { 179 Found = FT.getTypePtr(); 180 } else { 181 Found = isSingleElementStruct(FT, Context); 182 if (!Found) 183 return 0; 184 } 185 } 186 187 return Found; 188} 189 190static bool is32Or64BitBasicType(QualType Ty, ASTContext &Context) { 191 if (!Ty->getAs<BuiltinType>() && !Ty->hasPointerRepresentation() && 192 !Ty->isAnyComplexType() && !Ty->isEnumeralType() && 193 !Ty->isBlockPointerType()) 194 return false; 195 196 uint64_t Size = Context.getTypeSize(Ty); 197 return Size == 32 || Size == 64; 198} 199 200/// canExpandIndirectArgument - Test whether an argument type which is to be 201/// passed indirectly (on the stack) would have the equivalent layout if it was 202/// expanded into separate arguments. If so, we prefer to do the latter to avoid 203/// inhibiting optimizations. 204/// 205// FIXME: This predicate is missing many cases, currently it just follows 206// llvm-gcc (checks that all fields are 32-bit or 64-bit primitive types). We 207// should probably make this smarter, or better yet make the LLVM backend 208// capable of handling it. 209static bool canExpandIndirectArgument(QualType Ty, ASTContext &Context) { 210 // We can only expand structure types. 211 const RecordType *RT = Ty->getAs<RecordType>(); 212 if (!RT) 213 return false; 214 215 // We can only expand (C) structures. 216 // 217 // FIXME: This needs to be generalized to handle classes as well. 218 const RecordDecl *RD = RT->getDecl(); 219 if (!RD->isStruct() || isa<CXXRecordDecl>(RD)) 220 return false; 221 222 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 223 i != e; ++i) { 224 const FieldDecl *FD = *i; 225 226 if (!is32Or64BitBasicType(FD->getType(), Context)) 227 return false; 228 229 // FIXME: Reject bit-fields wholesale; there are two problems, we don't know 230 // how to expand them yet, and the predicate for telling if a bitfield still 231 // counts as "basic" is more complicated than what we were doing previously. 232 if (FD->isBitField()) 233 return false; 234 } 235 236 return true; 237} 238 239static bool typeContainsSSEVector(const RecordDecl *RD, ASTContext &Context) { 240 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 241 i != e; ++i) { 242 const FieldDecl *FD = *i; 243 244 if (FD->getType()->isVectorType() && 245 Context.getTypeSize(FD->getType()) >= 128) 246 return true; 247 248 if (const RecordType* RT = FD->getType()->getAs<RecordType>()) 249 if (typeContainsSSEVector(RT->getDecl(), Context)) 250 return true; 251 } 252 253 return false; 254} 255 256namespace { 257/// DefaultABIInfo - The default implementation for ABI specific 258/// details. This implementation provides information which results in 259/// self-consistent and sensible LLVM IR generation, but does not 260/// conform to any particular ABI. 261class DefaultABIInfo : public ABIInfo { 262 ABIArgInfo classifyReturnType(QualType RetTy, 263 ASTContext &Context, 264 llvm::LLVMContext &VMContext) const; 265 266 ABIArgInfo classifyArgumentType(QualType RetTy, 267 ASTContext &Context, 268 llvm::LLVMContext &VMContext) const; 269 270 virtual void computeInfo(CGFunctionInfo &FI, ASTContext &Context, 271 llvm::LLVMContext &VMContext) const { 272 FI.getReturnInfo() = classifyReturnType(FI.getReturnType(), Context, 273 VMContext); 274 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 275 it != ie; ++it) 276 it->info = classifyArgumentType(it->type, Context, VMContext); 277 } 278 279 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 280 CodeGenFunction &CGF) const; 281}; 282 283class DefaultTargetCodeGenInfo : public TargetCodeGenInfo { 284public: 285 DefaultTargetCodeGenInfo():TargetCodeGenInfo(new DefaultABIInfo()) {} 286}; 287 288llvm::Value *DefaultABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 289 CodeGenFunction &CGF) const { 290 return 0; 291} 292 293ABIArgInfo DefaultABIInfo::classifyArgumentType(QualType Ty, 294 ASTContext &Context, 295 llvm::LLVMContext &VMContext) const { 296 if (CodeGenFunction::hasAggregateLLVMType(Ty)) 297 return ABIArgInfo::getIndirect(0); 298 299 // Treat an enum type as its underlying type. 300 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 301 Ty = EnumTy->getDecl()->getIntegerType(); 302 303 return (Ty->isPromotableIntegerType() ? 304 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 305} 306 307/// X86_32ABIInfo - The X86-32 ABI information. 308class X86_32ABIInfo : public ABIInfo { 309 ASTContext &Context; 310 bool IsDarwinVectorABI; 311 bool IsSmallStructInRegABI; 312 313 static bool isRegisterSize(unsigned Size) { 314 return (Size == 8 || Size == 16 || Size == 32 || Size == 64); 315 } 316 317 static bool shouldReturnTypeInRegister(QualType Ty, ASTContext &Context); 318 319 /// getIndirectResult - Give a source type \arg Ty, return a suitable result 320 /// such that the argument will be passed in memory. 321 ABIArgInfo getIndirectResult(QualType Ty, ASTContext &Context, 322 bool ByVal = true) const; 323 324public: 325 ABIArgInfo classifyReturnType(QualType RetTy, 326 ASTContext &Context, 327 llvm::LLVMContext &VMContext) const; 328 329 ABIArgInfo classifyArgumentType(QualType RetTy, 330 ASTContext &Context, 331 llvm::LLVMContext &VMContext) const; 332 333 virtual void computeInfo(CGFunctionInfo &FI, ASTContext &Context, 334 llvm::LLVMContext &VMContext) const { 335 FI.getReturnInfo() = classifyReturnType(FI.getReturnType(), Context, 336 VMContext); 337 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 338 it != ie; ++it) 339 it->info = classifyArgumentType(it->type, Context, VMContext); 340 } 341 342 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 343 CodeGenFunction &CGF) const; 344 345 X86_32ABIInfo(ASTContext &Context, bool d, bool p) 346 : ABIInfo(), Context(Context), IsDarwinVectorABI(d), 347 IsSmallStructInRegABI(p) {} 348}; 349 350class X86_32TargetCodeGenInfo : public TargetCodeGenInfo { 351public: 352 X86_32TargetCodeGenInfo(ASTContext &Context, bool d, bool p) 353 :TargetCodeGenInfo(new X86_32ABIInfo(Context, d, p)) {} 354 355 void SetTargetAttributes(const Decl *D, llvm::GlobalValue *GV, 356 CodeGen::CodeGenModule &CGM) const; 357 358 int getDwarfEHStackPointer(CodeGen::CodeGenModule &CGM) const { 359 // Darwin uses different dwarf register numbers for EH. 360 if (CGM.isTargetDarwin()) return 5; 361 362 return 4; 363 } 364 365 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 366 llvm::Value *Address) const; 367}; 368 369} 370 371/// shouldReturnTypeInRegister - Determine if the given type should be 372/// passed in a register (for the Darwin ABI). 373bool X86_32ABIInfo::shouldReturnTypeInRegister(QualType Ty, 374 ASTContext &Context) { 375 uint64_t Size = Context.getTypeSize(Ty); 376 377 // Type must be register sized. 378 if (!isRegisterSize(Size)) 379 return false; 380 381 if (Ty->isVectorType()) { 382 // 64- and 128- bit vectors inside structures are not returned in 383 // registers. 384 if (Size == 64 || Size == 128) 385 return false; 386 387 return true; 388 } 389 390 // If this is a builtin, pointer, enum, complex type, member pointer, or 391 // member function pointer it is ok. 392 if (Ty->getAs<BuiltinType>() || Ty->hasPointerRepresentation() || 393 Ty->isAnyComplexType() || Ty->isEnumeralType() || 394 Ty->isBlockPointerType() || Ty->isMemberPointerType()) 395 return true; 396 397 // Arrays are treated like records. 398 if (const ConstantArrayType *AT = Context.getAsConstantArrayType(Ty)) 399 return shouldReturnTypeInRegister(AT->getElementType(), Context); 400 401 // Otherwise, it must be a record type. 402 const RecordType *RT = Ty->getAs<RecordType>(); 403 if (!RT) return false; 404 405 // FIXME: Traverse bases here too. 406 407 // Structure types are passed in register if all fields would be 408 // passed in a register. 409 for (RecordDecl::field_iterator i = RT->getDecl()->field_begin(), 410 e = RT->getDecl()->field_end(); i != e; ++i) { 411 const FieldDecl *FD = *i; 412 413 // Empty fields are ignored. 414 if (isEmptyField(Context, FD, true)) 415 continue; 416 417 // Check fields recursively. 418 if (!shouldReturnTypeInRegister(FD->getType(), Context)) 419 return false; 420 } 421 422 return true; 423} 424 425ABIArgInfo X86_32ABIInfo::classifyReturnType(QualType RetTy, 426 ASTContext &Context, 427 llvm::LLVMContext &VMContext) const { 428 if (RetTy->isVoidType()) { 429 return ABIArgInfo::getIgnore(); 430 } else if (const VectorType *VT = RetTy->getAs<VectorType>()) { 431 // On Darwin, some vectors are returned in registers. 432 if (IsDarwinVectorABI) { 433 uint64_t Size = Context.getTypeSize(RetTy); 434 435 // 128-bit vectors are a special case; they are returned in 436 // registers and we need to make sure to pick a type the LLVM 437 // backend will like. 438 if (Size == 128) 439 return ABIArgInfo::getCoerce(llvm::VectorType::get( 440 llvm::Type::getInt64Ty(VMContext), 2)); 441 442 // Always return in register if it fits in a general purpose 443 // register, or if it is 64 bits and has a single element. 444 if ((Size == 8 || Size == 16 || Size == 32) || 445 (Size == 64 && VT->getNumElements() == 1)) 446 return ABIArgInfo::getCoerce(llvm::IntegerType::get(VMContext, Size)); 447 448 return ABIArgInfo::getIndirect(0); 449 } 450 451 return ABIArgInfo::getDirect(); 452 } else if (CodeGenFunction::hasAggregateLLVMType(RetTy)) { 453 if (const RecordType *RT = RetTy->getAs<RecordType>()) { 454 // Structures with either a non-trivial destructor or a non-trivial 455 // copy constructor are always indirect. 456 if (hasNonTrivialDestructorOrCopyConstructor(RT)) 457 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 458 459 // Structures with flexible arrays are always indirect. 460 if (RT->getDecl()->hasFlexibleArrayMember()) 461 return ABIArgInfo::getIndirect(0); 462 } 463 464 // If specified, structs and unions are always indirect. 465 if (!IsSmallStructInRegABI && !RetTy->isAnyComplexType()) 466 return ABIArgInfo::getIndirect(0); 467 468 // Classify "single element" structs as their element type. 469 if (const Type *SeltTy = isSingleElementStruct(RetTy, Context)) { 470 if (const BuiltinType *BT = SeltTy->getAs<BuiltinType>()) { 471 if (BT->isIntegerType()) { 472 // We need to use the size of the structure, padding 473 // bit-fields can adjust that to be larger than the single 474 // element type. 475 uint64_t Size = Context.getTypeSize(RetTy); 476 return ABIArgInfo::getCoerce( 477 llvm::IntegerType::get(VMContext, (unsigned) Size)); 478 } else if (BT->getKind() == BuiltinType::Float) { 479 assert(Context.getTypeSize(RetTy) == Context.getTypeSize(SeltTy) && 480 "Unexpect single element structure size!"); 481 return ABIArgInfo::getCoerce(llvm::Type::getFloatTy(VMContext)); 482 } else if (BT->getKind() == BuiltinType::Double) { 483 assert(Context.getTypeSize(RetTy) == Context.getTypeSize(SeltTy) && 484 "Unexpect single element structure size!"); 485 return ABIArgInfo::getCoerce(llvm::Type::getDoubleTy(VMContext)); 486 } 487 } else if (SeltTy->isPointerType()) { 488 // FIXME: It would be really nice if this could come out as the proper 489 // pointer type. 490 const llvm::Type *PtrTy = llvm::Type::getInt8PtrTy(VMContext); 491 return ABIArgInfo::getCoerce(PtrTy); 492 } else if (SeltTy->isVectorType()) { 493 // 64- and 128-bit vectors are never returned in a 494 // register when inside a structure. 495 uint64_t Size = Context.getTypeSize(RetTy); 496 if (Size == 64 || Size == 128) 497 return ABIArgInfo::getIndirect(0); 498 499 return classifyReturnType(QualType(SeltTy, 0), Context, VMContext); 500 } 501 } 502 503 // Small structures which are register sized are generally returned 504 // in a register. 505 if (X86_32ABIInfo::shouldReturnTypeInRegister(RetTy, Context)) { 506 uint64_t Size = Context.getTypeSize(RetTy); 507 return ABIArgInfo::getCoerce(llvm::IntegerType::get(VMContext, Size)); 508 } 509 510 return ABIArgInfo::getIndirect(0); 511 } else { 512 // Treat an enum type as its underlying type. 513 if (const EnumType *EnumTy = RetTy->getAs<EnumType>()) 514 RetTy = EnumTy->getDecl()->getIntegerType(); 515 516 return (RetTy->isPromotableIntegerType() ? 517 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 518 } 519} 520 521ABIArgInfo X86_32ABIInfo::getIndirectResult(QualType Ty, 522 ASTContext &Context, 523 bool ByVal) const { 524 if (!ByVal) 525 return ABIArgInfo::getIndirect(0, false); 526 527 // Compute the byval alignment. We trust the back-end to honor the 528 // minimum ABI alignment for byval, to make cleaner IR. 529 const unsigned MinABIAlign = 4; 530 unsigned Align = Context.getTypeAlign(Ty) / 8; 531 if (Align > MinABIAlign) 532 return ABIArgInfo::getIndirect(Align); 533 return ABIArgInfo::getIndirect(0); 534} 535 536ABIArgInfo X86_32ABIInfo::classifyArgumentType(QualType Ty, 537 ASTContext &Context, 538 llvm::LLVMContext &VMContext) const { 539 // FIXME: Set alignment on indirect arguments. 540 if (CodeGenFunction::hasAggregateLLVMType(Ty)) { 541 // Structures with flexible arrays are always indirect. 542 if (const RecordType *RT = Ty->getAs<RecordType>()) { 543 // Structures with either a non-trivial destructor or a non-trivial 544 // copy constructor are always indirect. 545 if (hasNonTrivialDestructorOrCopyConstructor(RT)) 546 return getIndirectResult(Ty, Context, /*ByVal=*/false); 547 548 if (RT->getDecl()->hasFlexibleArrayMember()) 549 return getIndirectResult(Ty, Context); 550 } 551 552 // Ignore empty structs. 553 if (Ty->isStructureType() && Context.getTypeSize(Ty) == 0) 554 return ABIArgInfo::getIgnore(); 555 556 // Expand small (<= 128-bit) record types when we know that the stack layout 557 // of those arguments will match the struct. This is important because the 558 // LLVM backend isn't smart enough to remove byval, which inhibits many 559 // optimizations. 560 if (Context.getTypeSize(Ty) <= 4*32 && 561 canExpandIndirectArgument(Ty, Context)) 562 return ABIArgInfo::getExpand(); 563 564 return getIndirectResult(Ty, Context); 565 } else { 566 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 567 Ty = EnumTy->getDecl()->getIntegerType(); 568 569 return (Ty->isPromotableIntegerType() ? 570 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 571 } 572} 573 574llvm::Value *X86_32ABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 575 CodeGenFunction &CGF) const { 576 const llvm::Type *BP = llvm::Type::getInt8PtrTy(CGF.getLLVMContext()); 577 const llvm::Type *BPP = llvm::PointerType::getUnqual(BP); 578 579 CGBuilderTy &Builder = CGF.Builder; 580 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP, 581 "ap"); 582 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur"); 583 llvm::Type *PTy = 584 llvm::PointerType::getUnqual(CGF.ConvertType(Ty)); 585 llvm::Value *AddrTyped = Builder.CreateBitCast(Addr, PTy); 586 587 uint64_t Offset = 588 llvm::RoundUpToAlignment(CGF.getContext().getTypeSize(Ty) / 8, 4); 589 llvm::Value *NextAddr = 590 Builder.CreateGEP(Addr, llvm::ConstantInt::get( 591 llvm::Type::getInt32Ty(CGF.getLLVMContext()), Offset), 592 "ap.next"); 593 Builder.CreateStore(NextAddr, VAListAddrAsBPP); 594 595 return AddrTyped; 596} 597 598void X86_32TargetCodeGenInfo::SetTargetAttributes(const Decl *D, 599 llvm::GlobalValue *GV, 600 CodeGen::CodeGenModule &CGM) const { 601 if (const FunctionDecl *FD = dyn_cast<FunctionDecl>(D)) { 602 if (FD->hasAttr<X86ForceAlignArgPointerAttr>()) { 603 // Get the LLVM function. 604 llvm::Function *Fn = cast<llvm::Function>(GV); 605 606 // Now add the 'alignstack' attribute with a value of 16. 607 Fn->addFnAttr(llvm::Attribute::constructStackAlignmentFromInt(16)); 608 } 609 } 610} 611 612bool X86_32TargetCodeGenInfo::initDwarfEHRegSizeTable( 613 CodeGen::CodeGenFunction &CGF, 614 llvm::Value *Address) const { 615 CodeGen::CGBuilderTy &Builder = CGF.Builder; 616 llvm::LLVMContext &Context = CGF.getLLVMContext(); 617 618 const llvm::IntegerType *i8 = llvm::Type::getInt8Ty(Context); 619 llvm::Value *Four8 = llvm::ConstantInt::get(i8, 4); 620 621 // 0-7 are the eight integer registers; the order is different 622 // on Darwin (for EH), but the range is the same. 623 // 8 is %eip. 624 for (unsigned I = 0, E = 9; I != E; ++I) { 625 llvm::Value *Slot = Builder.CreateConstInBoundsGEP1_32(Address, I); 626 Builder.CreateStore(Four8, Slot); 627 } 628 629 if (CGF.CGM.isTargetDarwin()) { 630 // 12-16 are st(0..4). Not sure why we stop at 4. 631 // These have size 16, which is sizeof(long double) on 632 // platforms with 8-byte alignment for that type. 633 llvm::Value *Sixteen8 = llvm::ConstantInt::get(i8, 16); 634 for (unsigned I = 12, E = 17; I != E; ++I) { 635 llvm::Value *Slot = Builder.CreateConstInBoundsGEP1_32(Address, I); 636 Builder.CreateStore(Sixteen8, Slot); 637 } 638 639 } else { 640 // 9 is %eflags, which doesn't get a size on Darwin for some 641 // reason. 642 Builder.CreateStore(Four8, Builder.CreateConstInBoundsGEP1_32(Address, 9)); 643 644 // 11-16 are st(0..5). Not sure why we stop at 5. 645 // These have size 12, which is sizeof(long double) on 646 // platforms with 4-byte alignment for that type. 647 llvm::Value *Twelve8 = llvm::ConstantInt::get(i8, 12); 648 for (unsigned I = 11, E = 17; I != E; ++I) { 649 llvm::Value *Slot = Builder.CreateConstInBoundsGEP1_32(Address, I); 650 Builder.CreateStore(Twelve8, Slot); 651 } 652 } 653 654 return false; 655} 656 657namespace { 658/// X86_64ABIInfo - The X86_64 ABI information. 659class X86_64ABIInfo : public ABIInfo { 660 enum Class { 661 Integer = 0, 662 SSE, 663 SSEUp, 664 X87, 665 X87Up, 666 ComplexX87, 667 NoClass, 668 Memory 669 }; 670 671 /// merge - Implement the X86_64 ABI merging algorithm. 672 /// 673 /// Merge an accumulating classification \arg Accum with a field 674 /// classification \arg Field. 675 /// 676 /// \param Accum - The accumulating classification. This should 677 /// always be either NoClass or the result of a previous merge 678 /// call. In addition, this should never be Memory (the caller 679 /// should just return Memory for the aggregate). 680 Class merge(Class Accum, Class Field) const; 681 682 /// classify - Determine the x86_64 register classes in which the 683 /// given type T should be passed. 684 /// 685 /// \param Lo - The classification for the parts of the type 686 /// residing in the low word of the containing object. 687 /// 688 /// \param Hi - The classification for the parts of the type 689 /// residing in the high word of the containing object. 690 /// 691 /// \param OffsetBase - The bit offset of this type in the 692 /// containing object. Some parameters are classified different 693 /// depending on whether they straddle an eightbyte boundary. 694 /// 695 /// If a word is unused its result will be NoClass; if a type should 696 /// be passed in Memory then at least the classification of \arg Lo 697 /// will be Memory. 698 /// 699 /// The \arg Lo class will be NoClass iff the argument is ignored. 700 /// 701 /// If the \arg Lo class is ComplexX87, then the \arg Hi class will 702 /// also be ComplexX87. 703 void classify(QualType T, ASTContext &Context, uint64_t OffsetBase, 704 Class &Lo, Class &Hi) const; 705 706 /// getCoerceResult - Given a source type \arg Ty and an LLVM type 707 /// to coerce to, chose the best way to pass Ty in the same place 708 /// that \arg CoerceTo would be passed, but while keeping the 709 /// emitted code as simple as possible. 710 /// 711 /// FIXME: Note, this should be cleaned up to just take an enumeration of all 712 /// the ways we might want to pass things, instead of constructing an LLVM 713 /// type. This makes this code more explicit, and it makes it clearer that we 714 /// are also doing this for correctness in the case of passing scalar types. 715 ABIArgInfo getCoerceResult(QualType Ty, 716 const llvm::Type *CoerceTo, 717 ASTContext &Context) const; 718 719 /// getIndirectResult - Give a source type \arg Ty, return a suitable result 720 /// such that the argument will be returned in memory. 721 ABIArgInfo getIndirectReturnResult(QualType Ty, ASTContext &Context) const; 722 723 /// getIndirectResult - Give a source type \arg Ty, return a suitable result 724 /// such that the argument will be passed in memory. 725 ABIArgInfo getIndirectResult(QualType Ty, ASTContext &Context) const; 726 727 ABIArgInfo classifyReturnType(QualType RetTy, 728 ASTContext &Context, 729 llvm::LLVMContext &VMContext) const; 730 731 ABIArgInfo classifyArgumentType(QualType Ty, 732 ASTContext &Context, 733 llvm::LLVMContext &VMContext, 734 unsigned &neededInt, 735 unsigned &neededSSE) const; 736 737public: 738 virtual void computeInfo(CGFunctionInfo &FI, ASTContext &Context, 739 llvm::LLVMContext &VMContext) const; 740 741 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 742 CodeGenFunction &CGF) const; 743}; 744 745class X86_64TargetCodeGenInfo : public TargetCodeGenInfo { 746public: 747 X86_64TargetCodeGenInfo():TargetCodeGenInfo(new X86_64ABIInfo()) {} 748 749 int getDwarfEHStackPointer(CodeGen::CodeGenModule &CGM) const { 750 return 7; 751 } 752 753 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 754 llvm::Value *Address) const { 755 CodeGen::CGBuilderTy &Builder = CGF.Builder; 756 llvm::LLVMContext &Context = CGF.getLLVMContext(); 757 758 const llvm::IntegerType *i8 = llvm::Type::getInt8Ty(Context); 759 llvm::Value *Eight8 = llvm::ConstantInt::get(i8, 8); 760 761 // 0-16 are the 16 integer registers. 762 // 17 is %rip. 763 for (unsigned I = 0, E = 17; I != E; ++I) { 764 llvm::Value *Slot = Builder.CreateConstInBoundsGEP1_32(Address, I); 765 Builder.CreateStore(Eight8, Slot); 766 } 767 768 return false; 769 } 770}; 771 772} 773 774X86_64ABIInfo::Class X86_64ABIInfo::merge(Class Accum, 775 Class Field) const { 776 // AMD64-ABI 3.2.3p2: Rule 4. Each field of an object is 777 // classified recursively so that always two fields are 778 // considered. The resulting class is calculated according to 779 // the classes of the fields in the eightbyte: 780 // 781 // (a) If both classes are equal, this is the resulting class. 782 // 783 // (b) If one of the classes is NO_CLASS, the resulting class is 784 // the other class. 785 // 786 // (c) If one of the classes is MEMORY, the result is the MEMORY 787 // class. 788 // 789 // (d) If one of the classes is INTEGER, the result is the 790 // INTEGER. 791 // 792 // (e) If one of the classes is X87, X87UP, COMPLEX_X87 class, 793 // MEMORY is used as class. 794 // 795 // (f) Otherwise class SSE is used. 796 797 // Accum should never be memory (we should have returned) or 798 // ComplexX87 (because this cannot be passed in a structure). 799 assert((Accum != Memory && Accum != ComplexX87) && 800 "Invalid accumulated classification during merge."); 801 if (Accum == Field || Field == NoClass) 802 return Accum; 803 else if (Field == Memory) 804 return Memory; 805 else if (Accum == NoClass) 806 return Field; 807 else if (Accum == Integer || Field == Integer) 808 return Integer; 809 else if (Field == X87 || Field == X87Up || Field == ComplexX87 || 810 Accum == X87 || Accum == X87Up) 811 return Memory; 812 else 813 return SSE; 814} 815 816void X86_64ABIInfo::classify(QualType Ty, 817 ASTContext &Context, 818 uint64_t OffsetBase, 819 Class &Lo, Class &Hi) const { 820 // FIXME: This code can be simplified by introducing a simple value class for 821 // Class pairs with appropriate constructor methods for the various 822 // situations. 823 824 // FIXME: Some of the split computations are wrong; unaligned vectors 825 // shouldn't be passed in registers for example, so there is no chance they 826 // can straddle an eightbyte. Verify & simplify. 827 828 Lo = Hi = NoClass; 829 830 Class &Current = OffsetBase < 64 ? Lo : Hi; 831 Current = Memory; 832 833 if (const BuiltinType *BT = Ty->getAs<BuiltinType>()) { 834 BuiltinType::Kind k = BT->getKind(); 835 836 if (k == BuiltinType::Void) { 837 Current = NoClass; 838 } else if (k == BuiltinType::Int128 || k == BuiltinType::UInt128) { 839 Lo = Integer; 840 Hi = Integer; 841 } else if (k >= BuiltinType::Bool && k <= BuiltinType::LongLong) { 842 Current = Integer; 843 } else if (k == BuiltinType::Float || k == BuiltinType::Double) { 844 Current = SSE; 845 } else if (k == BuiltinType::LongDouble) { 846 Lo = X87; 847 Hi = X87Up; 848 } 849 // FIXME: _Decimal32 and _Decimal64 are SSE. 850 // FIXME: _float128 and _Decimal128 are (SSE, SSEUp). 851 } else if (const EnumType *ET = Ty->getAs<EnumType>()) { 852 // Classify the underlying integer type. 853 classify(ET->getDecl()->getIntegerType(), Context, OffsetBase, Lo, Hi); 854 } else if (Ty->hasPointerRepresentation()) { 855 Current = Integer; 856 } else if (const VectorType *VT = Ty->getAs<VectorType>()) { 857 uint64_t Size = Context.getTypeSize(VT); 858 if (Size == 32) { 859 // gcc passes all <4 x char>, <2 x short>, <1 x int>, <1 x 860 // float> as integer. 861 Current = Integer; 862 863 // If this type crosses an eightbyte boundary, it should be 864 // split. 865 uint64_t EB_Real = (OffsetBase) / 64; 866 uint64_t EB_Imag = (OffsetBase + Size - 1) / 64; 867 if (EB_Real != EB_Imag) 868 Hi = Lo; 869 } else if (Size == 64) { 870 // gcc passes <1 x double> in memory. :( 871 if (VT->getElementType()->isSpecificBuiltinType(BuiltinType::Double)) 872 return; 873 874 // gcc passes <1 x long long> as INTEGER. 875 if (VT->getElementType()->isSpecificBuiltinType(BuiltinType::LongLong)) 876 Current = Integer; 877 else 878 Current = SSE; 879 880 // If this type crosses an eightbyte boundary, it should be 881 // split. 882 if (OffsetBase && OffsetBase != 64) 883 Hi = Lo; 884 } else if (Size == 128) { 885 Lo = SSE; 886 Hi = SSEUp; 887 } 888 } else if (const ComplexType *CT = Ty->getAs<ComplexType>()) { 889 QualType ET = Context.getCanonicalType(CT->getElementType()); 890 891 uint64_t Size = Context.getTypeSize(Ty); 892 if (ET->isIntegralType()) { 893 if (Size <= 64) 894 Current = Integer; 895 else if (Size <= 128) 896 Lo = Hi = Integer; 897 } else if (ET == Context.FloatTy) 898 Current = SSE; 899 else if (ET == Context.DoubleTy) 900 Lo = Hi = SSE; 901 else if (ET == Context.LongDoubleTy) 902 Current = ComplexX87; 903 904 // If this complex type crosses an eightbyte boundary then it 905 // should be split. 906 uint64_t EB_Real = (OffsetBase) / 64; 907 uint64_t EB_Imag = (OffsetBase + Context.getTypeSize(ET)) / 64; 908 if (Hi == NoClass && EB_Real != EB_Imag) 909 Hi = Lo; 910 } else if (const ConstantArrayType *AT = Context.getAsConstantArrayType(Ty)) { 911 // Arrays are treated like structures. 912 913 uint64_t Size = Context.getTypeSize(Ty); 914 915 // AMD64-ABI 3.2.3p2: Rule 1. If the size of an object is larger 916 // than two eightbytes, ..., it has class MEMORY. 917 if (Size > 128) 918 return; 919 920 // AMD64-ABI 3.2.3p2: Rule 1. If ..., or it contains unaligned 921 // fields, it has class MEMORY. 922 // 923 // Only need to check alignment of array base. 924 if (OffsetBase % Context.getTypeAlign(AT->getElementType())) 925 return; 926 927 // Otherwise implement simplified merge. We could be smarter about 928 // this, but it isn't worth it and would be harder to verify. 929 Current = NoClass; 930 uint64_t EltSize = Context.getTypeSize(AT->getElementType()); 931 uint64_t ArraySize = AT->getSize().getZExtValue(); 932 for (uint64_t i=0, Offset=OffsetBase; i<ArraySize; ++i, Offset += EltSize) { 933 Class FieldLo, FieldHi; 934 classify(AT->getElementType(), Context, Offset, FieldLo, FieldHi); 935 Lo = merge(Lo, FieldLo); 936 Hi = merge(Hi, FieldHi); 937 if (Lo == Memory || Hi == Memory) 938 break; 939 } 940 941 // Do post merger cleanup (see below). Only case we worry about is Memory. 942 if (Hi == Memory) 943 Lo = Memory; 944 assert((Hi != SSEUp || Lo == SSE) && "Invalid SSEUp array classification."); 945 } else if (const RecordType *RT = Ty->getAs<RecordType>()) { 946 uint64_t Size = Context.getTypeSize(Ty); 947 948 // AMD64-ABI 3.2.3p2: Rule 1. If the size of an object is larger 949 // than two eightbytes, ..., it has class MEMORY. 950 if (Size > 128) 951 return; 952 953 // AMD64-ABI 3.2.3p2: Rule 2. If a C++ object has either a non-trivial 954 // copy constructor or a non-trivial destructor, it is passed by invisible 955 // reference. 956 if (hasNonTrivialDestructorOrCopyConstructor(RT)) 957 return; 958 959 const RecordDecl *RD = RT->getDecl(); 960 961 // Assume variable sized types are passed in memory. 962 if (RD->hasFlexibleArrayMember()) 963 return; 964 965 const ASTRecordLayout &Layout = Context.getASTRecordLayout(RD); 966 967 // Reset Lo class, this will be recomputed. 968 Current = NoClass; 969 970 // If this is a C++ record, classify the bases first. 971 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) { 972 for (CXXRecordDecl::base_class_const_iterator i = CXXRD->bases_begin(), 973 e = CXXRD->bases_end(); i != e; ++i) { 974 assert(!i->isVirtual() && !i->getType()->isDependentType() && 975 "Unexpected base class!"); 976 const CXXRecordDecl *Base = 977 cast<CXXRecordDecl>(i->getType()->getAs<RecordType>()->getDecl()); 978 979 // Classify this field. 980 // 981 // AMD64-ABI 3.2.3p2: Rule 3. If the size of the aggregate exceeds a 982 // single eightbyte, each is classified separately. Each eightbyte gets 983 // initialized to class NO_CLASS. 984 Class FieldLo, FieldHi; 985 uint64_t Offset = OffsetBase + Layout.getBaseClassOffset(Base); 986 classify(i->getType(), Context, Offset, FieldLo, FieldHi); 987 Lo = merge(Lo, FieldLo); 988 Hi = merge(Hi, FieldHi); 989 if (Lo == Memory || Hi == Memory) 990 break; 991 } 992 993 // If this record has no fields but isn't empty, classify as INTEGER. 994 if (RD->field_empty() && Size) 995 Current = Integer; 996 } 997 998 // Classify the fields one at a time, merging the results. 999 unsigned idx = 0; 1000 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 1001 i != e; ++i, ++idx) { 1002 uint64_t Offset = OffsetBase + Layout.getFieldOffset(idx); 1003 bool BitField = i->isBitField(); 1004 1005 // AMD64-ABI 3.2.3p2: Rule 1. If ..., or it contains unaligned 1006 // fields, it has class MEMORY. 1007 // 1008 // Note, skip this test for bit-fields, see below. 1009 if (!BitField && Offset % Context.getTypeAlign(i->getType())) { 1010 Lo = Memory; 1011 return; 1012 } 1013 1014 // Classify this field. 1015 // 1016 // AMD64-ABI 3.2.3p2: Rule 3. If the size of the aggregate 1017 // exceeds a single eightbyte, each is classified 1018 // separately. Each eightbyte gets initialized to class 1019 // NO_CLASS. 1020 Class FieldLo, FieldHi; 1021 1022 // Bit-fields require special handling, they do not force the 1023 // structure to be passed in memory even if unaligned, and 1024 // therefore they can straddle an eightbyte. 1025 if (BitField) { 1026 // Ignore padding bit-fields. 1027 if (i->isUnnamedBitfield()) 1028 continue; 1029 1030 uint64_t Offset = OffsetBase + Layout.getFieldOffset(idx); 1031 uint64_t Size = i->getBitWidth()->EvaluateAsInt(Context).getZExtValue(); 1032 1033 uint64_t EB_Lo = Offset / 64; 1034 uint64_t EB_Hi = (Offset + Size - 1) / 64; 1035 FieldLo = FieldHi = NoClass; 1036 if (EB_Lo) { 1037 assert(EB_Hi == EB_Lo && "Invalid classification, type > 16 bytes."); 1038 FieldLo = NoClass; 1039 FieldHi = Integer; 1040 } else { 1041 FieldLo = Integer; 1042 FieldHi = EB_Hi ? Integer : NoClass; 1043 } 1044 } else 1045 classify(i->getType(), Context, Offset, FieldLo, FieldHi); 1046 Lo = merge(Lo, FieldLo); 1047 Hi = merge(Hi, FieldHi); 1048 if (Lo == Memory || Hi == Memory) 1049 break; 1050 } 1051 1052 // AMD64-ABI 3.2.3p2: Rule 5. Then a post merger cleanup is done: 1053 // 1054 // (a) If one of the classes is MEMORY, the whole argument is 1055 // passed in memory. 1056 // 1057 // (b) If SSEUP is not preceeded by SSE, it is converted to SSE. 1058 1059 // The first of these conditions is guaranteed by how we implement 1060 // the merge (just bail). 1061 // 1062 // The second condition occurs in the case of unions; for example 1063 // union { _Complex double; unsigned; }. 1064 if (Hi == Memory) 1065 Lo = Memory; 1066 if (Hi == SSEUp && Lo != SSE) 1067 Hi = SSE; 1068 } 1069} 1070 1071ABIArgInfo X86_64ABIInfo::getCoerceResult(QualType Ty, 1072 const llvm::Type *CoerceTo, 1073 ASTContext &Context) const { 1074 if (CoerceTo == llvm::Type::getInt64Ty(CoerceTo->getContext())) { 1075 // Integer and pointer types will end up in a general purpose 1076 // register. 1077 1078 // Treat an enum type as its underlying type. 1079 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 1080 Ty = EnumTy->getDecl()->getIntegerType(); 1081 1082 if (Ty->isIntegralType() || Ty->hasPointerRepresentation()) 1083 return (Ty->isPromotableIntegerType() ? 1084 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 1085 } else if (CoerceTo == llvm::Type::getDoubleTy(CoerceTo->getContext())) { 1086 assert(Ty.isCanonical() && "should always have a canonical type here"); 1087 assert(!Ty.hasQualifiers() && "should never have a qualified type here"); 1088 1089 // Float and double end up in a single SSE reg. 1090 if (Ty == Context.FloatTy || Ty == Context.DoubleTy) 1091 return ABIArgInfo::getDirect(); 1092 1093 } 1094 1095 return ABIArgInfo::getCoerce(CoerceTo); 1096} 1097 1098ABIArgInfo X86_64ABIInfo::getIndirectReturnResult(QualType Ty, 1099 ASTContext &Context) const { 1100 // If this is a scalar LLVM value then assume LLVM will pass it in the right 1101 // place naturally. 1102 if (!CodeGenFunction::hasAggregateLLVMType(Ty)) { 1103 // Treat an enum type as its underlying type. 1104 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 1105 Ty = EnumTy->getDecl()->getIntegerType(); 1106 1107 return (Ty->isPromotableIntegerType() ? 1108 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 1109 } 1110 1111 return ABIArgInfo::getIndirect(0); 1112} 1113 1114ABIArgInfo X86_64ABIInfo::getIndirectResult(QualType Ty, 1115 ASTContext &Context) const { 1116 // If this is a scalar LLVM value then assume LLVM will pass it in the right 1117 // place naturally. 1118 if (!CodeGenFunction::hasAggregateLLVMType(Ty)) { 1119 // Treat an enum type as its underlying type. 1120 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 1121 Ty = EnumTy->getDecl()->getIntegerType(); 1122 1123 return (Ty->isPromotableIntegerType() ? 1124 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 1125 } 1126 1127 if (isRecordWithNonTrivialDestructorOrCopyConstructor(Ty)) 1128 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 1129 1130 // Compute the byval alignment. We trust the back-end to honor the 1131 // minimum ABI alignment for byval, to make cleaner IR. 1132 const unsigned MinABIAlign = 8; 1133 unsigned Align = Context.getTypeAlign(Ty) / 8; 1134 if (Align > MinABIAlign) 1135 return ABIArgInfo::getIndirect(Align); 1136 return ABIArgInfo::getIndirect(0); 1137} 1138 1139ABIArgInfo X86_64ABIInfo::classifyReturnType(QualType RetTy, 1140 ASTContext &Context, 1141 llvm::LLVMContext &VMContext) const { 1142 // AMD64-ABI 3.2.3p4: Rule 1. Classify the return type with the 1143 // classification algorithm. 1144 X86_64ABIInfo::Class Lo, Hi; 1145 classify(RetTy, Context, 0, Lo, Hi); 1146 1147 // Check some invariants. 1148 assert((Hi != Memory || Lo == Memory) && "Invalid memory classification."); 1149 assert((Lo != NoClass || Hi == NoClass) && "Invalid null classification."); 1150 assert((Hi != SSEUp || Lo == SSE) && "Invalid SSEUp classification."); 1151 1152 const llvm::Type *ResType = 0; 1153 switch (Lo) { 1154 case NoClass: 1155 return ABIArgInfo::getIgnore(); 1156 1157 case SSEUp: 1158 case X87Up: 1159 assert(0 && "Invalid classification for lo word."); 1160 1161 // AMD64-ABI 3.2.3p4: Rule 2. Types of class memory are returned via 1162 // hidden argument. 1163 case Memory: 1164 return getIndirectReturnResult(RetTy, Context); 1165 1166 // AMD64-ABI 3.2.3p4: Rule 3. If the class is INTEGER, the next 1167 // available register of the sequence %rax, %rdx is used. 1168 case Integer: 1169 ResType = llvm::Type::getInt64Ty(VMContext); break; 1170 1171 // AMD64-ABI 3.2.3p4: Rule 4. If the class is SSE, the next 1172 // available SSE register of the sequence %xmm0, %xmm1 is used. 1173 case SSE: 1174 ResType = llvm::Type::getDoubleTy(VMContext); break; 1175 1176 // AMD64-ABI 3.2.3p4: Rule 6. If the class is X87, the value is 1177 // returned on the X87 stack in %st0 as 80-bit x87 number. 1178 case X87: 1179 ResType = llvm::Type::getX86_FP80Ty(VMContext); break; 1180 1181 // AMD64-ABI 3.2.3p4: Rule 8. If the class is COMPLEX_X87, the real 1182 // part of the value is returned in %st0 and the imaginary part in 1183 // %st1. 1184 case ComplexX87: 1185 assert(Hi == ComplexX87 && "Unexpected ComplexX87 classification."); 1186 ResType = llvm::StructType::get(VMContext, 1187 llvm::Type::getX86_FP80Ty(VMContext), 1188 llvm::Type::getX86_FP80Ty(VMContext), 1189 NULL); 1190 break; 1191 } 1192 1193 switch (Hi) { 1194 // Memory was handled previously and X87 should 1195 // never occur as a hi class. 1196 case Memory: 1197 case X87: 1198 assert(0 && "Invalid classification for hi word."); 1199 1200 case ComplexX87: // Previously handled. 1201 case NoClass: break; 1202 1203 case Integer: 1204 ResType = llvm::StructType::get(VMContext, ResType, 1205 llvm::Type::getInt64Ty(VMContext), NULL); 1206 break; 1207 case SSE: 1208 ResType = llvm::StructType::get(VMContext, ResType, 1209 llvm::Type::getDoubleTy(VMContext), NULL); 1210 break; 1211 1212 // AMD64-ABI 3.2.3p4: Rule 5. If the class is SSEUP, the eightbyte 1213 // is passed in the upper half of the last used SSE register. 1214 // 1215 // SSEUP should always be preceeded by SSE, just widen. 1216 case SSEUp: 1217 assert(Lo == SSE && "Unexpected SSEUp classification."); 1218 ResType = llvm::VectorType::get(llvm::Type::getDoubleTy(VMContext), 2); 1219 break; 1220 1221 // AMD64-ABI 3.2.3p4: Rule 7. If the class is X87UP, the value is 1222 // returned together with the previous X87 value in %st0. 1223 case X87Up: 1224 // If X87Up is preceeded by X87, we don't need to do 1225 // anything. However, in some cases with unions it may not be 1226 // preceeded by X87. In such situations we follow gcc and pass the 1227 // extra bits in an SSE reg. 1228 if (Lo != X87) 1229 ResType = llvm::StructType::get(VMContext, ResType, 1230 llvm::Type::getDoubleTy(VMContext), NULL); 1231 break; 1232 } 1233 1234 return getCoerceResult(RetTy, ResType, Context); 1235} 1236 1237ABIArgInfo X86_64ABIInfo::classifyArgumentType(QualType Ty, ASTContext &Context, 1238 llvm::LLVMContext &VMContext, 1239 unsigned &neededInt, 1240 unsigned &neededSSE) const { 1241 X86_64ABIInfo::Class Lo, Hi; 1242 classify(Ty, Context, 0, Lo, Hi); 1243 1244 // Check some invariants. 1245 // FIXME: Enforce these by construction. 1246 assert((Hi != Memory || Lo == Memory) && "Invalid memory classification."); 1247 assert((Lo != NoClass || Hi == NoClass) && "Invalid null classification."); 1248 assert((Hi != SSEUp || Lo == SSE) && "Invalid SSEUp classification."); 1249 1250 neededInt = 0; 1251 neededSSE = 0; 1252 const llvm::Type *ResType = 0; 1253 switch (Lo) { 1254 case NoClass: 1255 return ABIArgInfo::getIgnore(); 1256 1257 // AMD64-ABI 3.2.3p3: Rule 1. If the class is MEMORY, pass the argument 1258 // on the stack. 1259 case Memory: 1260 1261 // AMD64-ABI 3.2.3p3: Rule 5. If the class is X87, X87UP or 1262 // COMPLEX_X87, it is passed in memory. 1263 case X87: 1264 case ComplexX87: 1265 return getIndirectResult(Ty, Context); 1266 1267 case SSEUp: 1268 case X87Up: 1269 assert(0 && "Invalid classification for lo word."); 1270 1271 // AMD64-ABI 3.2.3p3: Rule 2. If the class is INTEGER, the next 1272 // available register of the sequence %rdi, %rsi, %rdx, %rcx, %r8 1273 // and %r9 is used. 1274 case Integer: 1275 ++neededInt; 1276 ResType = llvm::Type::getInt64Ty(VMContext); 1277 break; 1278 1279 // AMD64-ABI 3.2.3p3: Rule 3. If the class is SSE, the next 1280 // available SSE register is used, the registers are taken in the 1281 // order from %xmm0 to %xmm7. 1282 case SSE: 1283 ++neededSSE; 1284 ResType = llvm::Type::getDoubleTy(VMContext); 1285 break; 1286 } 1287 1288 switch (Hi) { 1289 // Memory was handled previously, ComplexX87 and X87 should 1290 // never occur as hi classes, and X87Up must be preceed by X87, 1291 // which is passed in memory. 1292 case Memory: 1293 case X87: 1294 case ComplexX87: 1295 assert(0 && "Invalid classification for hi word."); 1296 break; 1297 1298 case NoClass: break; 1299 case Integer: 1300 ResType = llvm::StructType::get(VMContext, ResType, 1301 llvm::Type::getInt64Ty(VMContext), NULL); 1302 ++neededInt; 1303 break; 1304 1305 // X87Up generally doesn't occur here (long double is passed in 1306 // memory), except in situations involving unions. 1307 case X87Up: 1308 case SSE: 1309 ResType = llvm::StructType::get(VMContext, ResType, 1310 llvm::Type::getDoubleTy(VMContext), NULL); 1311 ++neededSSE; 1312 break; 1313 1314 // AMD64-ABI 3.2.3p3: Rule 4. If the class is SSEUP, the 1315 // eightbyte is passed in the upper half of the last used SSE 1316 // register. 1317 case SSEUp: 1318 assert(Lo == SSE && "Unexpected SSEUp classification."); 1319 ResType = llvm::VectorType::get(llvm::Type::getDoubleTy(VMContext), 2); 1320 break; 1321 } 1322 1323 return getCoerceResult(Ty, ResType, Context); 1324} 1325 1326void X86_64ABIInfo::computeInfo(CGFunctionInfo &FI, ASTContext &Context, 1327 llvm::LLVMContext &VMContext) const { 1328 FI.getReturnInfo() = classifyReturnType(FI.getReturnType(), 1329 Context, VMContext); 1330 1331 // Keep track of the number of assigned registers. 1332 unsigned freeIntRegs = 6, freeSSERegs = 8; 1333 1334 // If the return value is indirect, then the hidden argument is consuming one 1335 // integer register. 1336 if (FI.getReturnInfo().isIndirect()) 1337 --freeIntRegs; 1338 1339 // AMD64-ABI 3.2.3p3: Once arguments are classified, the registers 1340 // get assigned (in left-to-right order) for passing as follows... 1341 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 1342 it != ie; ++it) { 1343 unsigned neededInt, neededSSE; 1344 it->info = classifyArgumentType(it->type, Context, VMContext, 1345 neededInt, neededSSE); 1346 1347 // AMD64-ABI 3.2.3p3: If there are no registers available for any 1348 // eightbyte of an argument, the whole argument is passed on the 1349 // stack. If registers have already been assigned for some 1350 // eightbytes of such an argument, the assignments get reverted. 1351 if (freeIntRegs >= neededInt && freeSSERegs >= neededSSE) { 1352 freeIntRegs -= neededInt; 1353 freeSSERegs -= neededSSE; 1354 } else { 1355 it->info = getIndirectResult(it->type, Context); 1356 } 1357 } 1358} 1359 1360static llvm::Value *EmitVAArgFromMemory(llvm::Value *VAListAddr, 1361 QualType Ty, 1362 CodeGenFunction &CGF) { 1363 llvm::Value *overflow_arg_area_p = 1364 CGF.Builder.CreateStructGEP(VAListAddr, 2, "overflow_arg_area_p"); 1365 llvm::Value *overflow_arg_area = 1366 CGF.Builder.CreateLoad(overflow_arg_area_p, "overflow_arg_area"); 1367 1368 // AMD64-ABI 3.5.7p5: Step 7. Align l->overflow_arg_area upwards to a 16 1369 // byte boundary if alignment needed by type exceeds 8 byte boundary. 1370 uint64_t Align = CGF.getContext().getTypeAlign(Ty) / 8; 1371 if (Align > 8) { 1372 // Note that we follow the ABI & gcc here, even though the type 1373 // could in theory have an alignment greater than 16. This case 1374 // shouldn't ever matter in practice. 1375 1376 // overflow_arg_area = (overflow_arg_area + 15) & ~15; 1377 llvm::Value *Offset = 1378 llvm::ConstantInt::get(llvm::Type::getInt32Ty(CGF.getLLVMContext()), 15); 1379 overflow_arg_area = CGF.Builder.CreateGEP(overflow_arg_area, Offset); 1380 llvm::Value *AsInt = CGF.Builder.CreatePtrToInt(overflow_arg_area, 1381 llvm::Type::getInt64Ty(CGF.getLLVMContext())); 1382 llvm::Value *Mask = llvm::ConstantInt::get( 1383 llvm::Type::getInt64Ty(CGF.getLLVMContext()), ~15LL); 1384 overflow_arg_area = 1385 CGF.Builder.CreateIntToPtr(CGF.Builder.CreateAnd(AsInt, Mask), 1386 overflow_arg_area->getType(), 1387 "overflow_arg_area.align"); 1388 } 1389 1390 // AMD64-ABI 3.5.7p5: Step 8. Fetch type from l->overflow_arg_area. 1391 const llvm::Type *LTy = CGF.ConvertTypeForMem(Ty); 1392 llvm::Value *Res = 1393 CGF.Builder.CreateBitCast(overflow_arg_area, 1394 llvm::PointerType::getUnqual(LTy)); 1395 1396 // AMD64-ABI 3.5.7p5: Step 9. Set l->overflow_arg_area to: 1397 // l->overflow_arg_area + sizeof(type). 1398 // AMD64-ABI 3.5.7p5: Step 10. Align l->overflow_arg_area upwards to 1399 // an 8 byte boundary. 1400 1401 uint64_t SizeInBytes = (CGF.getContext().getTypeSize(Ty) + 7) / 8; 1402 llvm::Value *Offset = 1403 llvm::ConstantInt::get(llvm::Type::getInt32Ty(CGF.getLLVMContext()), 1404 (SizeInBytes + 7) & ~7); 1405 overflow_arg_area = CGF.Builder.CreateGEP(overflow_arg_area, Offset, 1406 "overflow_arg_area.next"); 1407 CGF.Builder.CreateStore(overflow_arg_area, overflow_arg_area_p); 1408 1409 // AMD64-ABI 3.5.7p5: Step 11. Return the fetched type. 1410 return Res; 1411} 1412 1413llvm::Value *X86_64ABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 1414 CodeGenFunction &CGF) const { 1415 llvm::LLVMContext &VMContext = CGF.getLLVMContext(); 1416 const llvm::Type *i32Ty = llvm::Type::getInt32Ty(VMContext); 1417 const llvm::Type *DoubleTy = llvm::Type::getDoubleTy(VMContext); 1418 1419 // Assume that va_list type is correct; should be pointer to LLVM type: 1420 // struct { 1421 // i32 gp_offset; 1422 // i32 fp_offset; 1423 // i8* overflow_arg_area; 1424 // i8* reg_save_area; 1425 // }; 1426 unsigned neededInt, neededSSE; 1427 1428 Ty = CGF.getContext().getCanonicalType(Ty); 1429 ABIArgInfo AI = classifyArgumentType(Ty, CGF.getContext(), VMContext, 1430 neededInt, neededSSE); 1431 1432 // AMD64-ABI 3.5.7p5: Step 1. Determine whether type may be passed 1433 // in the registers. If not go to step 7. 1434 if (!neededInt && !neededSSE) 1435 return EmitVAArgFromMemory(VAListAddr, Ty, CGF); 1436 1437 // AMD64-ABI 3.5.7p5: Step 2. Compute num_gp to hold the number of 1438 // general purpose registers needed to pass type and num_fp to hold 1439 // the number of floating point registers needed. 1440 1441 // AMD64-ABI 3.5.7p5: Step 3. Verify whether arguments fit into 1442 // registers. In the case: l->gp_offset > 48 - num_gp * 8 or 1443 // l->fp_offset > 304 - num_fp * 16 go to step 7. 1444 // 1445 // NOTE: 304 is a typo, there are (6 * 8 + 8 * 16) = 176 bytes of 1446 // register save space). 1447 1448 llvm::Value *InRegs = 0; 1449 llvm::Value *gp_offset_p = 0, *gp_offset = 0; 1450 llvm::Value *fp_offset_p = 0, *fp_offset = 0; 1451 if (neededInt) { 1452 gp_offset_p = CGF.Builder.CreateStructGEP(VAListAddr, 0, "gp_offset_p"); 1453 gp_offset = CGF.Builder.CreateLoad(gp_offset_p, "gp_offset"); 1454 InRegs = 1455 CGF.Builder.CreateICmpULE(gp_offset, 1456 llvm::ConstantInt::get(i32Ty, 1457 48 - neededInt * 8), 1458 "fits_in_gp"); 1459 } 1460 1461 if (neededSSE) { 1462 fp_offset_p = CGF.Builder.CreateStructGEP(VAListAddr, 1, "fp_offset_p"); 1463 fp_offset = CGF.Builder.CreateLoad(fp_offset_p, "fp_offset"); 1464 llvm::Value *FitsInFP = 1465 CGF.Builder.CreateICmpULE(fp_offset, 1466 llvm::ConstantInt::get(i32Ty, 1467 176 - neededSSE * 16), 1468 "fits_in_fp"); 1469 InRegs = InRegs ? CGF.Builder.CreateAnd(InRegs, FitsInFP) : FitsInFP; 1470 } 1471 1472 llvm::BasicBlock *InRegBlock = CGF.createBasicBlock("vaarg.in_reg"); 1473 llvm::BasicBlock *InMemBlock = CGF.createBasicBlock("vaarg.in_mem"); 1474 llvm::BasicBlock *ContBlock = CGF.createBasicBlock("vaarg.end"); 1475 CGF.Builder.CreateCondBr(InRegs, InRegBlock, InMemBlock); 1476 1477 // Emit code to load the value if it was passed in registers. 1478 1479 CGF.EmitBlock(InRegBlock); 1480 1481 // AMD64-ABI 3.5.7p5: Step 4. Fetch type from l->reg_save_area with 1482 // an offset of l->gp_offset and/or l->fp_offset. This may require 1483 // copying to a temporary location in case the parameter is passed 1484 // in different register classes or requires an alignment greater 1485 // than 8 for general purpose registers and 16 for XMM registers. 1486 // 1487 // FIXME: This really results in shameful code when we end up needing to 1488 // collect arguments from different places; often what should result in a 1489 // simple assembling of a structure from scattered addresses has many more 1490 // loads than necessary. Can we clean this up? 1491 const llvm::Type *LTy = CGF.ConvertTypeForMem(Ty); 1492 llvm::Value *RegAddr = 1493 CGF.Builder.CreateLoad(CGF.Builder.CreateStructGEP(VAListAddr, 3), 1494 "reg_save_area"); 1495 if (neededInt && neededSSE) { 1496 // FIXME: Cleanup. 1497 assert(AI.isCoerce() && "Unexpected ABI info for mixed regs"); 1498 const llvm::StructType *ST = cast<llvm::StructType>(AI.getCoerceToType()); 1499 llvm::Value *Tmp = CGF.CreateTempAlloca(ST); 1500 assert(ST->getNumElements() == 2 && "Unexpected ABI info for mixed regs"); 1501 const llvm::Type *TyLo = ST->getElementType(0); 1502 const llvm::Type *TyHi = ST->getElementType(1); 1503 assert((TyLo->isFloatingPointTy() ^ TyHi->isFloatingPointTy()) && 1504 "Unexpected ABI info for mixed regs"); 1505 const llvm::Type *PTyLo = llvm::PointerType::getUnqual(TyLo); 1506 const llvm::Type *PTyHi = llvm::PointerType::getUnqual(TyHi); 1507 llvm::Value *GPAddr = CGF.Builder.CreateGEP(RegAddr, gp_offset); 1508 llvm::Value *FPAddr = CGF.Builder.CreateGEP(RegAddr, fp_offset); 1509 llvm::Value *RegLoAddr = TyLo->isFloatingPointTy() ? FPAddr : GPAddr; 1510 llvm::Value *RegHiAddr = TyLo->isFloatingPointTy() ? GPAddr : FPAddr; 1511 llvm::Value *V = 1512 CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegLoAddr, PTyLo)); 1513 CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 0)); 1514 V = CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegHiAddr, PTyHi)); 1515 CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 1)); 1516 1517 RegAddr = CGF.Builder.CreateBitCast(Tmp, 1518 llvm::PointerType::getUnqual(LTy)); 1519 } else if (neededInt) { 1520 RegAddr = CGF.Builder.CreateGEP(RegAddr, gp_offset); 1521 RegAddr = CGF.Builder.CreateBitCast(RegAddr, 1522 llvm::PointerType::getUnqual(LTy)); 1523 } else { 1524 if (neededSSE == 1) { 1525 RegAddr = CGF.Builder.CreateGEP(RegAddr, fp_offset); 1526 RegAddr = CGF.Builder.CreateBitCast(RegAddr, 1527 llvm::PointerType::getUnqual(LTy)); 1528 } else { 1529 assert(neededSSE == 2 && "Invalid number of needed registers!"); 1530 // SSE registers are spaced 16 bytes apart in the register save 1531 // area, we need to collect the two eightbytes together. 1532 llvm::Value *RegAddrLo = CGF.Builder.CreateGEP(RegAddr, fp_offset); 1533 llvm::Value *RegAddrHi = 1534 CGF.Builder.CreateGEP(RegAddrLo, 1535 llvm::ConstantInt::get(i32Ty, 16)); 1536 const llvm::Type *DblPtrTy = 1537 llvm::PointerType::getUnqual(DoubleTy); 1538 const llvm::StructType *ST = llvm::StructType::get(VMContext, DoubleTy, 1539 DoubleTy, NULL); 1540 llvm::Value *V, *Tmp = CGF.CreateTempAlloca(ST); 1541 V = CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegAddrLo, 1542 DblPtrTy)); 1543 CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 0)); 1544 V = CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegAddrHi, 1545 DblPtrTy)); 1546 CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 1)); 1547 RegAddr = CGF.Builder.CreateBitCast(Tmp, 1548 llvm::PointerType::getUnqual(LTy)); 1549 } 1550 } 1551 1552 // AMD64-ABI 3.5.7p5: Step 5. Set: 1553 // l->gp_offset = l->gp_offset + num_gp * 8 1554 // l->fp_offset = l->fp_offset + num_fp * 16. 1555 if (neededInt) { 1556 llvm::Value *Offset = llvm::ConstantInt::get(i32Ty, neededInt * 8); 1557 CGF.Builder.CreateStore(CGF.Builder.CreateAdd(gp_offset, Offset), 1558 gp_offset_p); 1559 } 1560 if (neededSSE) { 1561 llvm::Value *Offset = llvm::ConstantInt::get(i32Ty, neededSSE * 16); 1562 CGF.Builder.CreateStore(CGF.Builder.CreateAdd(fp_offset, Offset), 1563 fp_offset_p); 1564 } 1565 CGF.EmitBranch(ContBlock); 1566 1567 // Emit code to load the value if it was passed in memory. 1568 1569 CGF.EmitBlock(InMemBlock); 1570 llvm::Value *MemAddr = EmitVAArgFromMemory(VAListAddr, Ty, CGF); 1571 1572 // Return the appropriate result. 1573 1574 CGF.EmitBlock(ContBlock); 1575 llvm::PHINode *ResAddr = CGF.Builder.CreatePHI(RegAddr->getType(), 1576 "vaarg.addr"); 1577 ResAddr->reserveOperandSpace(2); 1578 ResAddr->addIncoming(RegAddr, InRegBlock); 1579 ResAddr->addIncoming(MemAddr, InMemBlock); 1580 1581 return ResAddr; 1582} 1583 1584// PIC16 ABI Implementation 1585 1586namespace { 1587 1588class PIC16ABIInfo : public ABIInfo { 1589 ABIArgInfo classifyReturnType(QualType RetTy, 1590 ASTContext &Context, 1591 llvm::LLVMContext &VMContext) const; 1592 1593 ABIArgInfo classifyArgumentType(QualType RetTy, 1594 ASTContext &Context, 1595 llvm::LLVMContext &VMContext) const; 1596 1597 virtual void computeInfo(CGFunctionInfo &FI, ASTContext &Context, 1598 llvm::LLVMContext &VMContext) const { 1599 FI.getReturnInfo() = classifyReturnType(FI.getReturnType(), Context, 1600 VMContext); 1601 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 1602 it != ie; ++it) 1603 it->info = classifyArgumentType(it->type, Context, VMContext); 1604 } 1605 1606 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 1607 CodeGenFunction &CGF) const; 1608}; 1609 1610class PIC16TargetCodeGenInfo : public TargetCodeGenInfo { 1611public: 1612 PIC16TargetCodeGenInfo():TargetCodeGenInfo(new PIC16ABIInfo()) {} 1613}; 1614 1615} 1616 1617ABIArgInfo PIC16ABIInfo::classifyReturnType(QualType RetTy, 1618 ASTContext &Context, 1619 llvm::LLVMContext &VMContext) const { 1620 if (RetTy->isVoidType()) { 1621 return ABIArgInfo::getIgnore(); 1622 } else { 1623 return ABIArgInfo::getDirect(); 1624 } 1625} 1626 1627ABIArgInfo PIC16ABIInfo::classifyArgumentType(QualType Ty, 1628 ASTContext &Context, 1629 llvm::LLVMContext &VMContext) const { 1630 return ABIArgInfo::getDirect(); 1631} 1632 1633llvm::Value *PIC16ABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 1634 CodeGenFunction &CGF) const { 1635 const llvm::Type *BP = llvm::Type::getInt8PtrTy(CGF.getLLVMContext()); 1636 const llvm::Type *BPP = llvm::PointerType::getUnqual(BP); 1637 1638 CGBuilderTy &Builder = CGF.Builder; 1639 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP, 1640 "ap"); 1641 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur"); 1642 llvm::Type *PTy = 1643 llvm::PointerType::getUnqual(CGF.ConvertType(Ty)); 1644 llvm::Value *AddrTyped = Builder.CreateBitCast(Addr, PTy); 1645 1646 uint64_t Offset = CGF.getContext().getTypeSize(Ty) / 8; 1647 1648 llvm::Value *NextAddr = 1649 Builder.CreateGEP(Addr, llvm::ConstantInt::get( 1650 llvm::Type::getInt32Ty(CGF.getLLVMContext()), Offset), 1651 "ap.next"); 1652 Builder.CreateStore(NextAddr, VAListAddrAsBPP); 1653 1654 return AddrTyped; 1655} 1656 1657 1658// PowerPC-32 1659 1660namespace { 1661class PPC32TargetCodeGenInfo : public DefaultTargetCodeGenInfo { 1662public: 1663 int getDwarfEHStackPointer(CodeGen::CodeGenModule &M) const { 1664 // This is recovered from gcc output. 1665 return 1; // r1 is the dedicated stack pointer 1666 } 1667 1668 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 1669 llvm::Value *Address) const; 1670}; 1671 1672} 1673 1674bool 1675PPC32TargetCodeGenInfo::initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 1676 llvm::Value *Address) const { 1677 // This is calculated from the LLVM and GCC tables and verified 1678 // against gcc output. AFAIK all ABIs use the same encoding. 1679 1680 CodeGen::CGBuilderTy &Builder = CGF.Builder; 1681 llvm::LLVMContext &Context = CGF.getLLVMContext(); 1682 1683 const llvm::IntegerType *i8 = llvm::Type::getInt8Ty(Context); 1684 llvm::Value *Four8 = llvm::ConstantInt::get(i8, 4); 1685 llvm::Value *Eight8 = llvm::ConstantInt::get(i8, 8); 1686 llvm::Value *Sixteen8 = llvm::ConstantInt::get(i8, 16); 1687 1688 // 0-31: r0-31, the 4-byte general-purpose registers 1689 for (unsigned I = 0, E = 32; I != E; ++I) { 1690 llvm::Value *Slot = Builder.CreateConstInBoundsGEP1_32(Address, I); 1691 Builder.CreateStore(Four8, Slot); 1692 } 1693 1694 // 32-63: fp0-31, the 8-byte floating-point registers 1695 for (unsigned I = 32, E = 64; I != E; ++I) { 1696 llvm::Value *Slot = Builder.CreateConstInBoundsGEP1_32(Address, I); 1697 Builder.CreateStore(Eight8, Slot); 1698 } 1699 1700 // 64-76 are various 4-byte special-purpose registers: 1701 // 64: mq 1702 // 65: lr 1703 // 66: ctr 1704 // 67: ap 1705 // 68-75 cr0-7 1706 // 76: xer 1707 for (unsigned I = 64, E = 77; I != E; ++I) { 1708 llvm::Value *Slot = Builder.CreateConstInBoundsGEP1_32(Address, I); 1709 Builder.CreateStore(Four8, Slot); 1710 } 1711 1712 // 77-108: v0-31, the 16-byte vector registers 1713 for (unsigned I = 77, E = 109; I != E; ++I) { 1714 llvm::Value *Slot = Builder.CreateConstInBoundsGEP1_32(Address, I); 1715 Builder.CreateStore(Sixteen8, Slot); 1716 } 1717 1718 // 109: vrsave 1719 // 110: vscr 1720 // 111: spe_acc 1721 // 112: spefscr 1722 // 113: sfp 1723 for (unsigned I = 109, E = 114; I != E; ++I) { 1724 llvm::Value *Slot = Builder.CreateConstInBoundsGEP1_32(Address, I); 1725 Builder.CreateStore(Four8, Slot); 1726 } 1727 1728 return false; 1729} 1730 1731 1732// ARM ABI Implementation 1733 1734namespace { 1735 1736class ARMABIInfo : public ABIInfo { 1737public: 1738 enum ABIKind { 1739 APCS = 0, 1740 AAPCS = 1, 1741 AAPCS_VFP 1742 }; 1743 1744private: 1745 ABIKind Kind; 1746 1747public: 1748 ARMABIInfo(ABIKind _Kind) : Kind(_Kind) {} 1749 1750private: 1751 ABIKind getABIKind() const { return Kind; } 1752 1753 ABIArgInfo classifyReturnType(QualType RetTy, 1754 ASTContext &Context, 1755 llvm::LLVMContext &VMCOntext) const; 1756 1757 ABIArgInfo classifyArgumentType(QualType RetTy, 1758 ASTContext &Context, 1759 llvm::LLVMContext &VMContext) const; 1760 1761 virtual void computeInfo(CGFunctionInfo &FI, ASTContext &Context, 1762 llvm::LLVMContext &VMContext) const; 1763 1764 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 1765 CodeGenFunction &CGF) const; 1766}; 1767 1768class ARMTargetCodeGenInfo : public TargetCodeGenInfo { 1769public: 1770 ARMTargetCodeGenInfo(ARMABIInfo::ABIKind K) 1771 :TargetCodeGenInfo(new ARMABIInfo(K)) {} 1772 1773 int getDwarfEHStackPointer(CodeGen::CodeGenModule &M) const { 1774 return 13; 1775 } 1776}; 1777 1778} 1779 1780void ARMABIInfo::computeInfo(CGFunctionInfo &FI, ASTContext &Context, 1781 llvm::LLVMContext &VMContext) const { 1782 FI.getReturnInfo() = classifyReturnType(FI.getReturnType(), Context, 1783 VMContext); 1784 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 1785 it != ie; ++it) { 1786 it->info = classifyArgumentType(it->type, Context, VMContext); 1787 } 1788 1789 // ARM always overrides the calling convention. 1790 switch (getABIKind()) { 1791 case APCS: 1792 FI.setEffectiveCallingConvention(llvm::CallingConv::ARM_APCS); 1793 break; 1794 1795 case AAPCS: 1796 FI.setEffectiveCallingConvention(llvm::CallingConv::ARM_AAPCS); 1797 break; 1798 1799 case AAPCS_VFP: 1800 FI.setEffectiveCallingConvention(llvm::CallingConv::ARM_AAPCS_VFP); 1801 break; 1802 } 1803} 1804 1805ABIArgInfo ARMABIInfo::classifyArgumentType(QualType Ty, 1806 ASTContext &Context, 1807 llvm::LLVMContext &VMContext) const { 1808 if (!CodeGenFunction::hasAggregateLLVMType(Ty)) { 1809 // Treat an enum type as its underlying type. 1810 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 1811 Ty = EnumTy->getDecl()->getIntegerType(); 1812 1813 return (Ty->isPromotableIntegerType() ? 1814 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 1815 } 1816 1817 // Ignore empty records. 1818 if (isEmptyRecord(Context, Ty, true)) 1819 return ABIArgInfo::getIgnore(); 1820 1821 // FIXME: This is kind of nasty... but there isn't much choice because the ARM 1822 // backend doesn't support byval. 1823 // FIXME: This doesn't handle alignment > 64 bits. 1824 const llvm::Type* ElemTy; 1825 unsigned SizeRegs; 1826 if (Context.getTypeAlign(Ty) > 32) { 1827 ElemTy = llvm::Type::getInt64Ty(VMContext); 1828 SizeRegs = (Context.getTypeSize(Ty) + 63) / 64; 1829 } else { 1830 ElemTy = llvm::Type::getInt32Ty(VMContext); 1831 SizeRegs = (Context.getTypeSize(Ty) + 31) / 32; 1832 } 1833 std::vector<const llvm::Type*> LLVMFields; 1834 LLVMFields.push_back(llvm::ArrayType::get(ElemTy, SizeRegs)); 1835 const llvm::Type* STy = llvm::StructType::get(VMContext, LLVMFields, true); 1836 return ABIArgInfo::getCoerce(STy); 1837} 1838 1839static bool isIntegerLikeType(QualType Ty, 1840 ASTContext &Context, 1841 llvm::LLVMContext &VMContext) { 1842 // APCS, C Language Calling Conventions, Non-Simple Return Values: A structure 1843 // is called integer-like if its size is less than or equal to one word, and 1844 // the offset of each of its addressable sub-fields is zero. 1845 1846 uint64_t Size = Context.getTypeSize(Ty); 1847 1848 // Check that the type fits in a word. 1849 if (Size > 32) 1850 return false; 1851 1852 // FIXME: Handle vector types! 1853 if (Ty->isVectorType()) 1854 return false; 1855 1856 // Float types are never treated as "integer like". 1857 if (Ty->isRealFloatingType()) 1858 return false; 1859 1860 // If this is a builtin or pointer type then it is ok. 1861 if (Ty->getAs<BuiltinType>() || Ty->isPointerType()) 1862 return true; 1863 1864 // Small complex integer types are "integer like". 1865 if (const ComplexType *CT = Ty->getAs<ComplexType>()) 1866 return isIntegerLikeType(CT->getElementType(), Context, VMContext); 1867 1868 // Single element and zero sized arrays should be allowed, by the definition 1869 // above, but they are not. 1870 1871 // Otherwise, it must be a record type. 1872 const RecordType *RT = Ty->getAs<RecordType>(); 1873 if (!RT) return false; 1874 1875 // Ignore records with flexible arrays. 1876 const RecordDecl *RD = RT->getDecl(); 1877 if (RD->hasFlexibleArrayMember()) 1878 return false; 1879 1880 // Check that all sub-fields are at offset 0, and are themselves "integer 1881 // like". 1882 const ASTRecordLayout &Layout = Context.getASTRecordLayout(RD); 1883 1884 bool HadField = false; 1885 unsigned idx = 0; 1886 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 1887 i != e; ++i, ++idx) { 1888 const FieldDecl *FD = *i; 1889 1890 // Bit-fields are not addressable, we only need to verify they are "integer 1891 // like". We still have to disallow a subsequent non-bitfield, for example: 1892 // struct { int : 0; int x } 1893 // is non-integer like according to gcc. 1894 if (FD->isBitField()) { 1895 if (!RD->isUnion()) 1896 HadField = true; 1897 1898 if (!isIntegerLikeType(FD->getType(), Context, VMContext)) 1899 return false; 1900 1901 continue; 1902 } 1903 1904 // Check if this field is at offset 0. 1905 if (Layout.getFieldOffset(idx) != 0) 1906 return false; 1907 1908 if (!isIntegerLikeType(FD->getType(), Context, VMContext)) 1909 return false; 1910 1911 // Only allow at most one field in a structure. This doesn't match the 1912 // wording above, but follows gcc in situations with a field following an 1913 // empty structure. 1914 if (!RD->isUnion()) { 1915 if (HadField) 1916 return false; 1917 1918 HadField = true; 1919 } 1920 } 1921 1922 return true; 1923} 1924 1925ABIArgInfo ARMABIInfo::classifyReturnType(QualType RetTy, 1926 ASTContext &Context, 1927 llvm::LLVMContext &VMContext) const { 1928 if (RetTy->isVoidType()) 1929 return ABIArgInfo::getIgnore(); 1930 1931 if (!CodeGenFunction::hasAggregateLLVMType(RetTy)) { 1932 // Treat an enum type as its underlying type. 1933 if (const EnumType *EnumTy = RetTy->getAs<EnumType>()) 1934 RetTy = EnumTy->getDecl()->getIntegerType(); 1935 1936 return (RetTy->isPromotableIntegerType() ? 1937 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 1938 } 1939 1940 // Are we following APCS? 1941 if (getABIKind() == APCS) { 1942 if (isEmptyRecord(Context, RetTy, false)) 1943 return ABIArgInfo::getIgnore(); 1944 1945 // Complex types are all returned as packed integers. 1946 // 1947 // FIXME: Consider using 2 x vector types if the back end handles them 1948 // correctly. 1949 if (RetTy->isAnyComplexType()) 1950 return ABIArgInfo::getCoerce(llvm::IntegerType::get( 1951 VMContext, Context.getTypeSize(RetTy))); 1952 1953 // Integer like structures are returned in r0. 1954 if (isIntegerLikeType(RetTy, Context, VMContext)) { 1955 // Return in the smallest viable integer type. 1956 uint64_t Size = Context.getTypeSize(RetTy); 1957 if (Size <= 8) 1958 return ABIArgInfo::getCoerce(llvm::Type::getInt8Ty(VMContext)); 1959 if (Size <= 16) 1960 return ABIArgInfo::getCoerce(llvm::Type::getInt16Ty(VMContext)); 1961 return ABIArgInfo::getCoerce(llvm::Type::getInt32Ty(VMContext)); 1962 } 1963 1964 // Otherwise return in memory. 1965 return ABIArgInfo::getIndirect(0); 1966 } 1967 1968 // Otherwise this is an AAPCS variant. 1969 1970 if (isEmptyRecord(Context, RetTy, true)) 1971 return ABIArgInfo::getIgnore(); 1972 1973 // Aggregates <= 4 bytes are returned in r0; other aggregates 1974 // are returned indirectly. 1975 uint64_t Size = Context.getTypeSize(RetTy); 1976 if (Size <= 32) { 1977 // Return in the smallest viable integer type. 1978 if (Size <= 8) 1979 return ABIArgInfo::getCoerce(llvm::Type::getInt8Ty(VMContext)); 1980 if (Size <= 16) 1981 return ABIArgInfo::getCoerce(llvm::Type::getInt16Ty(VMContext)); 1982 return ABIArgInfo::getCoerce(llvm::Type::getInt32Ty(VMContext)); 1983 } 1984 1985 return ABIArgInfo::getIndirect(0); 1986} 1987 1988llvm::Value *ARMABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 1989 CodeGenFunction &CGF) const { 1990 // FIXME: Need to handle alignment 1991 const llvm::Type *BP = llvm::Type::getInt8PtrTy(CGF.getLLVMContext()); 1992 const llvm::Type *BPP = llvm::PointerType::getUnqual(BP); 1993 1994 CGBuilderTy &Builder = CGF.Builder; 1995 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP, 1996 "ap"); 1997 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur"); 1998 llvm::Type *PTy = 1999 llvm::PointerType::getUnqual(CGF.ConvertType(Ty)); 2000 llvm::Value *AddrTyped = Builder.CreateBitCast(Addr, PTy); 2001 2002 uint64_t Offset = 2003 llvm::RoundUpToAlignment(CGF.getContext().getTypeSize(Ty) / 8, 4); 2004 llvm::Value *NextAddr = 2005 Builder.CreateGEP(Addr, llvm::ConstantInt::get( 2006 llvm::Type::getInt32Ty(CGF.getLLVMContext()), Offset), 2007 "ap.next"); 2008 Builder.CreateStore(NextAddr, VAListAddrAsBPP); 2009 2010 return AddrTyped; 2011} 2012 2013ABIArgInfo DefaultABIInfo::classifyReturnType(QualType RetTy, 2014 ASTContext &Context, 2015 llvm::LLVMContext &VMContext) const { 2016 if (RetTy->isVoidType()) { 2017 return ABIArgInfo::getIgnore(); 2018 } else if (CodeGenFunction::hasAggregateLLVMType(RetTy)) { 2019 return ABIArgInfo::getIndirect(0); 2020 } else { 2021 // Treat an enum type as its underlying type. 2022 if (const EnumType *EnumTy = RetTy->getAs<EnumType>()) 2023 RetTy = EnumTy->getDecl()->getIntegerType(); 2024 2025 return (RetTy->isPromotableIntegerType() ? 2026 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 2027 } 2028} 2029 2030// SystemZ ABI Implementation 2031 2032namespace { 2033 2034class SystemZABIInfo : public ABIInfo { 2035 bool isPromotableIntegerType(QualType Ty) const; 2036 2037 ABIArgInfo classifyReturnType(QualType RetTy, ASTContext &Context, 2038 llvm::LLVMContext &VMContext) const; 2039 2040 ABIArgInfo classifyArgumentType(QualType RetTy, ASTContext &Context, 2041 llvm::LLVMContext &VMContext) const; 2042 2043 virtual void computeInfo(CGFunctionInfo &FI, ASTContext &Context, 2044 llvm::LLVMContext &VMContext) const { 2045 FI.getReturnInfo() = classifyReturnType(FI.getReturnType(), 2046 Context, VMContext); 2047 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 2048 it != ie; ++it) 2049 it->info = classifyArgumentType(it->type, Context, VMContext); 2050 } 2051 2052 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 2053 CodeGenFunction &CGF) const; 2054}; 2055 2056class SystemZTargetCodeGenInfo : public TargetCodeGenInfo { 2057public: 2058 SystemZTargetCodeGenInfo():TargetCodeGenInfo(new SystemZABIInfo()) {} 2059}; 2060 2061} 2062 2063bool SystemZABIInfo::isPromotableIntegerType(QualType Ty) const { 2064 // SystemZ ABI requires all 8, 16 and 32 bit quantities to be extended. 2065 if (const BuiltinType *BT = Ty->getAs<BuiltinType>()) 2066 switch (BT->getKind()) { 2067 case BuiltinType::Bool: 2068 case BuiltinType::Char_S: 2069 case BuiltinType::Char_U: 2070 case BuiltinType::SChar: 2071 case BuiltinType::UChar: 2072 case BuiltinType::Short: 2073 case BuiltinType::UShort: 2074 case BuiltinType::Int: 2075 case BuiltinType::UInt: 2076 return true; 2077 default: 2078 return false; 2079 } 2080 return false; 2081} 2082 2083llvm::Value *SystemZABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 2084 CodeGenFunction &CGF) const { 2085 // FIXME: Implement 2086 return 0; 2087} 2088 2089 2090ABIArgInfo SystemZABIInfo::classifyReturnType(QualType RetTy, 2091 ASTContext &Context, 2092 llvm::LLVMContext &VMContext) const { 2093 if (RetTy->isVoidType()) { 2094 return ABIArgInfo::getIgnore(); 2095 } else if (CodeGenFunction::hasAggregateLLVMType(RetTy)) { 2096 return ABIArgInfo::getIndirect(0); 2097 } else { 2098 return (isPromotableIntegerType(RetTy) ? 2099 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 2100 } 2101} 2102 2103ABIArgInfo SystemZABIInfo::classifyArgumentType(QualType Ty, 2104 ASTContext &Context, 2105 llvm::LLVMContext &VMContext) const { 2106 if (CodeGenFunction::hasAggregateLLVMType(Ty)) { 2107 return ABIArgInfo::getIndirect(0); 2108 } else { 2109 return (isPromotableIntegerType(Ty) ? 2110 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 2111 } 2112} 2113 2114// MSP430 ABI Implementation 2115 2116namespace { 2117 2118class MSP430TargetCodeGenInfo : public TargetCodeGenInfo { 2119public: 2120 MSP430TargetCodeGenInfo():TargetCodeGenInfo(new DefaultABIInfo()) {} 2121 void SetTargetAttributes(const Decl *D, llvm::GlobalValue *GV, 2122 CodeGen::CodeGenModule &M) const; 2123}; 2124 2125} 2126 2127void MSP430TargetCodeGenInfo::SetTargetAttributes(const Decl *D, 2128 llvm::GlobalValue *GV, 2129 CodeGen::CodeGenModule &M) const { 2130 if (const FunctionDecl *FD = dyn_cast<FunctionDecl>(D)) { 2131 if (const MSP430InterruptAttr *attr = FD->getAttr<MSP430InterruptAttr>()) { 2132 // Handle 'interrupt' attribute: 2133 llvm::Function *F = cast<llvm::Function>(GV); 2134 2135 // Step 1: Set ISR calling convention. 2136 F->setCallingConv(llvm::CallingConv::MSP430_INTR); 2137 2138 // Step 2: Add attributes goodness. 2139 F->addFnAttr(llvm::Attribute::NoInline); 2140 2141 // Step 3: Emit ISR vector alias. 2142 unsigned Num = attr->getNumber() + 0xffe0; 2143 new llvm::GlobalAlias(GV->getType(), llvm::Function::ExternalLinkage, 2144 "vector_" + 2145 llvm::LowercaseString(llvm::utohexstr(Num)), 2146 GV, &M.getModule()); 2147 } 2148 } 2149} 2150 2151const TargetCodeGenInfo &CodeGenModule::getTargetCodeGenInfo() const { 2152 if (TheTargetCodeGenInfo) 2153 return *TheTargetCodeGenInfo; 2154 2155 // For now we just cache the TargetCodeGenInfo in CodeGenModule and don't 2156 // free it. 2157 2158 const llvm::Triple &Triple(getContext().Target.getTriple()); 2159 switch (Triple.getArch()) { 2160 default: 2161 return *(TheTargetCodeGenInfo = new DefaultTargetCodeGenInfo); 2162 2163 case llvm::Triple::arm: 2164 case llvm::Triple::thumb: 2165 // FIXME: We want to know the float calling convention as well. 2166 if (strcmp(getContext().Target.getABI(), "apcs-gnu") == 0) 2167 return *(TheTargetCodeGenInfo = 2168 new ARMTargetCodeGenInfo(ARMABIInfo::APCS)); 2169 2170 return *(TheTargetCodeGenInfo = 2171 new ARMTargetCodeGenInfo(ARMABIInfo::AAPCS)); 2172 2173 case llvm::Triple::pic16: 2174 return *(TheTargetCodeGenInfo = new PIC16TargetCodeGenInfo()); 2175 2176 case llvm::Triple::ppc: 2177 return *(TheTargetCodeGenInfo = new PPC32TargetCodeGenInfo()); 2178 2179 case llvm::Triple::systemz: 2180 return *(TheTargetCodeGenInfo = new SystemZTargetCodeGenInfo()); 2181 2182 case llvm::Triple::msp430: 2183 return *(TheTargetCodeGenInfo = new MSP430TargetCodeGenInfo()); 2184 2185 case llvm::Triple::x86: 2186 switch (Triple.getOS()) { 2187 case llvm::Triple::Darwin: 2188 return *(TheTargetCodeGenInfo = 2189 new X86_32TargetCodeGenInfo(Context, true, true)); 2190 case llvm::Triple::Cygwin: 2191 case llvm::Triple::MinGW32: 2192 case llvm::Triple::MinGW64: 2193 case llvm::Triple::AuroraUX: 2194 case llvm::Triple::DragonFly: 2195 case llvm::Triple::FreeBSD: 2196 case llvm::Triple::OpenBSD: 2197 return *(TheTargetCodeGenInfo = 2198 new X86_32TargetCodeGenInfo(Context, false, true)); 2199 2200 default: 2201 return *(TheTargetCodeGenInfo = 2202 new X86_32TargetCodeGenInfo(Context, false, false)); 2203 } 2204 2205 case llvm::Triple::x86_64: 2206 return *(TheTargetCodeGenInfo = new X86_64TargetCodeGenInfo()); 2207 } 2208} 2209