TargetInfo.cpp revision 8e50a96b387dca7525caa8a6add31420dd82a2cd
1//===---- TargetInfo.cpp - Encapsulate target details -----------*- C++ -*-===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// These classes wrap the information about a call or function 11// definition used to handle ABI compliancy. 12// 13//===----------------------------------------------------------------------===// 14 15#include "TargetInfo.h" 16#include "ABIInfo.h" 17#include "CodeGenFunction.h" 18#include "clang/AST/RecordLayout.h" 19#include "llvm/Type.h" 20#include "llvm/Target/TargetData.h" 21#include "llvm/ADT/Triple.h" 22#include "llvm/Support/raw_ostream.h" 23using namespace clang; 24using namespace CodeGen; 25 26static void AssignToArrayRange(CodeGen::CGBuilderTy &Builder, 27 llvm::Value *Array, 28 llvm::Value *Value, 29 unsigned FirstIndex, 30 unsigned LastIndex) { 31 // Alternatively, we could emit this as a loop in the source. 32 for (unsigned I = FirstIndex; I <= LastIndex; ++I) { 33 llvm::Value *Cell = Builder.CreateConstInBoundsGEP1_32(Array, I); 34 Builder.CreateStore(Value, Cell); 35 } 36} 37 38static bool isAggregateTypeForABI(QualType T) { 39 return CodeGenFunction::hasAggregateLLVMType(T) || 40 T->isMemberFunctionPointerType(); 41} 42 43ABIInfo::~ABIInfo() {} 44 45ASTContext &ABIInfo::getContext() const { 46 return CGT.getContext(); 47} 48 49llvm::LLVMContext &ABIInfo::getVMContext() const { 50 return CGT.getLLVMContext(); 51} 52 53const llvm::TargetData &ABIInfo::getTargetData() const { 54 return CGT.getTargetData(); 55} 56 57 58void ABIArgInfo::dump() const { 59 llvm::raw_ostream &OS = llvm::errs(); 60 OS << "(ABIArgInfo Kind="; 61 switch (TheKind) { 62 case Direct: 63 OS << "Direct Type="; 64 if (const llvm::Type *Ty = getCoerceToType()) 65 Ty->print(OS); 66 else 67 OS << "null"; 68 break; 69 case Extend: 70 OS << "Extend"; 71 break; 72 case Ignore: 73 OS << "Ignore"; 74 break; 75 case Indirect: 76 OS << "Indirect Align=" << getIndirectAlign() 77 << " Byal=" << getIndirectByVal() 78 << " Realign=" << getIndirectRealign(); 79 break; 80 case Expand: 81 OS << "Expand"; 82 break; 83 } 84 OS << ")\n"; 85} 86 87TargetCodeGenInfo::~TargetCodeGenInfo() { delete Info; } 88 89static bool isEmptyRecord(ASTContext &Context, QualType T, bool AllowArrays); 90 91/// isEmptyField - Return true iff a the field is "empty", that is it 92/// is an unnamed bit-field or an (array of) empty record(s). 93static bool isEmptyField(ASTContext &Context, const FieldDecl *FD, 94 bool AllowArrays) { 95 if (FD->isUnnamedBitfield()) 96 return true; 97 98 QualType FT = FD->getType(); 99 100 // Constant arrays of empty records count as empty, strip them off. 101 if (AllowArrays) 102 while (const ConstantArrayType *AT = Context.getAsConstantArrayType(FT)) 103 FT = AT->getElementType(); 104 105 const RecordType *RT = FT->getAs<RecordType>(); 106 if (!RT) 107 return false; 108 109 // C++ record fields are never empty, at least in the Itanium ABI. 110 // 111 // FIXME: We should use a predicate for whether this behavior is true in the 112 // current ABI. 113 if (isa<CXXRecordDecl>(RT->getDecl())) 114 return false; 115 116 return isEmptyRecord(Context, FT, AllowArrays); 117} 118 119/// isEmptyRecord - Return true iff a structure contains only empty 120/// fields. Note that a structure with a flexible array member is not 121/// considered empty. 122static bool isEmptyRecord(ASTContext &Context, QualType T, bool AllowArrays) { 123 const RecordType *RT = T->getAs<RecordType>(); 124 if (!RT) 125 return 0; 126 const RecordDecl *RD = RT->getDecl(); 127 if (RD->hasFlexibleArrayMember()) 128 return false; 129 130 // If this is a C++ record, check the bases first. 131 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) 132 for (CXXRecordDecl::base_class_const_iterator i = CXXRD->bases_begin(), 133 e = CXXRD->bases_end(); i != e; ++i) 134 if (!isEmptyRecord(Context, i->getType(), true)) 135 return false; 136 137 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 138 i != e; ++i) 139 if (!isEmptyField(Context, *i, AllowArrays)) 140 return false; 141 return true; 142} 143 144/// hasNonTrivialDestructorOrCopyConstructor - Determine if a type has either 145/// a non-trivial destructor or a non-trivial copy constructor. 146static bool hasNonTrivialDestructorOrCopyConstructor(const RecordType *RT) { 147 const CXXRecordDecl *RD = dyn_cast<CXXRecordDecl>(RT->getDecl()); 148 if (!RD) 149 return false; 150 151 return !RD->hasTrivialDestructor() || !RD->hasTrivialCopyConstructor(); 152} 153 154/// isRecordWithNonTrivialDestructorOrCopyConstructor - Determine if a type is 155/// a record type with either a non-trivial destructor or a non-trivial copy 156/// constructor. 157static bool isRecordWithNonTrivialDestructorOrCopyConstructor(QualType T) { 158 const RecordType *RT = T->getAs<RecordType>(); 159 if (!RT) 160 return false; 161 162 return hasNonTrivialDestructorOrCopyConstructor(RT); 163} 164 165/// isSingleElementStruct - Determine if a structure is a "single 166/// element struct", i.e. it has exactly one non-empty field or 167/// exactly one field which is itself a single element 168/// struct. Structures with flexible array members are never 169/// considered single element structs. 170/// 171/// \return The field declaration for the single non-empty field, if 172/// it exists. 173static const Type *isSingleElementStruct(QualType T, ASTContext &Context) { 174 const RecordType *RT = T->getAsStructureType(); 175 if (!RT) 176 return 0; 177 178 const RecordDecl *RD = RT->getDecl(); 179 if (RD->hasFlexibleArrayMember()) 180 return 0; 181 182 const Type *Found = 0; 183 184 // If this is a C++ record, check the bases first. 185 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) { 186 for (CXXRecordDecl::base_class_const_iterator i = CXXRD->bases_begin(), 187 e = CXXRD->bases_end(); i != e; ++i) { 188 // Ignore empty records. 189 if (isEmptyRecord(Context, i->getType(), true)) 190 continue; 191 192 // If we already found an element then this isn't a single-element struct. 193 if (Found) 194 return 0; 195 196 // If this is non-empty and not a single element struct, the composite 197 // cannot be a single element struct. 198 Found = isSingleElementStruct(i->getType(), Context); 199 if (!Found) 200 return 0; 201 } 202 } 203 204 // Check for single element. 205 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 206 i != e; ++i) { 207 const FieldDecl *FD = *i; 208 QualType FT = FD->getType(); 209 210 // Ignore empty fields. 211 if (isEmptyField(Context, FD, true)) 212 continue; 213 214 // If we already found an element then this isn't a single-element 215 // struct. 216 if (Found) 217 return 0; 218 219 // Treat single element arrays as the element. 220 while (const ConstantArrayType *AT = Context.getAsConstantArrayType(FT)) { 221 if (AT->getSize().getZExtValue() != 1) 222 break; 223 FT = AT->getElementType(); 224 } 225 226 if (!isAggregateTypeForABI(FT)) { 227 Found = FT.getTypePtr(); 228 } else { 229 Found = isSingleElementStruct(FT, Context); 230 if (!Found) 231 return 0; 232 } 233 } 234 235 return Found; 236} 237 238static bool is32Or64BitBasicType(QualType Ty, ASTContext &Context) { 239 if (!Ty->getAs<BuiltinType>() && !Ty->hasPointerRepresentation() && 240 !Ty->isAnyComplexType() && !Ty->isEnumeralType() && 241 !Ty->isBlockPointerType()) 242 return false; 243 244 uint64_t Size = Context.getTypeSize(Ty); 245 return Size == 32 || Size == 64; 246} 247 248/// canExpandIndirectArgument - Test whether an argument type which is to be 249/// passed indirectly (on the stack) would have the equivalent layout if it was 250/// expanded into separate arguments. If so, we prefer to do the latter to avoid 251/// inhibiting optimizations. 252/// 253// FIXME: This predicate is missing many cases, currently it just follows 254// llvm-gcc (checks that all fields are 32-bit or 64-bit primitive types). We 255// should probably make this smarter, or better yet make the LLVM backend 256// capable of handling it. 257static bool canExpandIndirectArgument(QualType Ty, ASTContext &Context) { 258 // We can only expand structure types. 259 const RecordType *RT = Ty->getAs<RecordType>(); 260 if (!RT) 261 return false; 262 263 // We can only expand (C) structures. 264 // 265 // FIXME: This needs to be generalized to handle classes as well. 266 const RecordDecl *RD = RT->getDecl(); 267 if (!RD->isStruct() || isa<CXXRecordDecl>(RD)) 268 return false; 269 270 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 271 i != e; ++i) { 272 const FieldDecl *FD = *i; 273 274 if (!is32Or64BitBasicType(FD->getType(), Context)) 275 return false; 276 277 // FIXME: Reject bit-fields wholesale; there are two problems, we don't know 278 // how to expand them yet, and the predicate for telling if a bitfield still 279 // counts as "basic" is more complicated than what we were doing previously. 280 if (FD->isBitField()) 281 return false; 282 } 283 284 return true; 285} 286 287namespace { 288/// DefaultABIInfo - The default implementation for ABI specific 289/// details. This implementation provides information which results in 290/// self-consistent and sensible LLVM IR generation, but does not 291/// conform to any particular ABI. 292class DefaultABIInfo : public ABIInfo { 293public: 294 DefaultABIInfo(CodeGen::CodeGenTypes &CGT) : ABIInfo(CGT) {} 295 296 ABIArgInfo classifyReturnType(QualType RetTy) const; 297 ABIArgInfo classifyArgumentType(QualType RetTy) const; 298 299 virtual void computeInfo(CGFunctionInfo &FI) const { 300 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 301 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 302 it != ie; ++it) 303 it->info = classifyArgumentType(it->type); 304 } 305 306 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 307 CodeGenFunction &CGF) const; 308}; 309 310class DefaultTargetCodeGenInfo : public TargetCodeGenInfo { 311public: 312 DefaultTargetCodeGenInfo(CodeGen::CodeGenTypes &CGT) 313 : TargetCodeGenInfo(new DefaultABIInfo(CGT)) {} 314}; 315 316llvm::Value *DefaultABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 317 CodeGenFunction &CGF) const { 318 return 0; 319} 320 321ABIArgInfo DefaultABIInfo::classifyArgumentType(QualType Ty) const { 322 if (isAggregateTypeForABI(Ty)) 323 return ABIArgInfo::getIndirect(0); 324 325 // Treat an enum type as its underlying type. 326 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 327 Ty = EnumTy->getDecl()->getIntegerType(); 328 329 return (Ty->isPromotableIntegerType() ? 330 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 331} 332 333ABIArgInfo DefaultABIInfo::classifyReturnType(QualType RetTy) const { 334 if (RetTy->isVoidType()) 335 return ABIArgInfo::getIgnore(); 336 337 if (isAggregateTypeForABI(RetTy)) 338 return ABIArgInfo::getIndirect(0); 339 340 // Treat an enum type as its underlying type. 341 if (const EnumType *EnumTy = RetTy->getAs<EnumType>()) 342 RetTy = EnumTy->getDecl()->getIntegerType(); 343 344 return (RetTy->isPromotableIntegerType() ? 345 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 346} 347 348/// UseX86_MMXType - Return true if this is an MMX type that should use the special 349/// x86_mmx type. 350bool UseX86_MMXType(const llvm::Type *IRType) { 351 // If the type is an MMX type <2 x i32>, <4 x i16>, or <8 x i8>, use the 352 // special x86_mmx type. 353 return IRType->isVectorTy() && IRType->getPrimitiveSizeInBits() == 64 && 354 cast<llvm::VectorType>(IRType)->getElementType()->isIntegerTy() && 355 IRType->getScalarSizeInBits() != 64; 356} 357 358//===----------------------------------------------------------------------===// 359// X86-32 ABI Implementation 360//===----------------------------------------------------------------------===// 361 362/// X86_32ABIInfo - The X86-32 ABI information. 363class X86_32ABIInfo : public ABIInfo { 364 static const unsigned MinABIStackAlignInBytes = 4; 365 366 bool IsDarwinVectorABI; 367 bool IsSmallStructInRegABI; 368 369 static bool isRegisterSize(unsigned Size) { 370 return (Size == 8 || Size == 16 || Size == 32 || Size == 64); 371 } 372 373 static bool shouldReturnTypeInRegister(QualType Ty, ASTContext &Context); 374 375 /// getIndirectResult - Give a source type \arg Ty, return a suitable result 376 /// such that the argument will be passed in memory. 377 ABIArgInfo getIndirectResult(QualType Ty, bool ByVal = true) const; 378 379 /// \brief Return the alignment to use for the given type on the stack. 380 unsigned getTypeStackAlignInBytes(QualType Ty, unsigned Align) const; 381 382public: 383 384 ABIArgInfo classifyReturnType(QualType RetTy) const; 385 ABIArgInfo classifyArgumentType(QualType RetTy) const; 386 387 virtual void computeInfo(CGFunctionInfo &FI) const { 388 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 389 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 390 it != ie; ++it) 391 it->info = classifyArgumentType(it->type); 392 } 393 394 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 395 CodeGenFunction &CGF) const; 396 397 X86_32ABIInfo(CodeGen::CodeGenTypes &CGT, bool d, bool p) 398 : ABIInfo(CGT), IsDarwinVectorABI(d), IsSmallStructInRegABI(p) {} 399}; 400 401class X86_32TargetCodeGenInfo : public TargetCodeGenInfo { 402public: 403 X86_32TargetCodeGenInfo(CodeGen::CodeGenTypes &CGT, bool d, bool p) 404 :TargetCodeGenInfo(new X86_32ABIInfo(CGT, d, p)) {} 405 406 void SetTargetAttributes(const Decl *D, llvm::GlobalValue *GV, 407 CodeGen::CodeGenModule &CGM) const; 408 409 int getDwarfEHStackPointer(CodeGen::CodeGenModule &CGM) const { 410 // Darwin uses different dwarf register numbers for EH. 411 if (CGM.isTargetDarwin()) return 5; 412 413 return 4; 414 } 415 416 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 417 llvm::Value *Address) const; 418}; 419 420} 421 422/// shouldReturnTypeInRegister - Determine if the given type should be 423/// passed in a register (for the Darwin ABI). 424bool X86_32ABIInfo::shouldReturnTypeInRegister(QualType Ty, 425 ASTContext &Context) { 426 uint64_t Size = Context.getTypeSize(Ty); 427 428 // Type must be register sized. 429 if (!isRegisterSize(Size)) 430 return false; 431 432 if (Ty->isVectorType()) { 433 // 64- and 128- bit vectors inside structures are not returned in 434 // registers. 435 if (Size == 64 || Size == 128) 436 return false; 437 438 return true; 439 } 440 441 // If this is a builtin, pointer, enum, complex type, member pointer, or 442 // member function pointer it is ok. 443 if (Ty->getAs<BuiltinType>() || Ty->hasPointerRepresentation() || 444 Ty->isAnyComplexType() || Ty->isEnumeralType() || 445 Ty->isBlockPointerType() || Ty->isMemberPointerType()) 446 return true; 447 448 // Arrays are treated like records. 449 if (const ConstantArrayType *AT = Context.getAsConstantArrayType(Ty)) 450 return shouldReturnTypeInRegister(AT->getElementType(), Context); 451 452 // Otherwise, it must be a record type. 453 const RecordType *RT = Ty->getAs<RecordType>(); 454 if (!RT) return false; 455 456 // FIXME: Traverse bases here too. 457 458 // Structure types are passed in register if all fields would be 459 // passed in a register. 460 for (RecordDecl::field_iterator i = RT->getDecl()->field_begin(), 461 e = RT->getDecl()->field_end(); i != e; ++i) { 462 const FieldDecl *FD = *i; 463 464 // Empty fields are ignored. 465 if (isEmptyField(Context, FD, true)) 466 continue; 467 468 // Check fields recursively. 469 if (!shouldReturnTypeInRegister(FD->getType(), Context)) 470 return false; 471 } 472 473 return true; 474} 475 476ABIArgInfo X86_32ABIInfo::classifyReturnType(QualType RetTy) const { 477 if (RetTy->isVoidType()) 478 return ABIArgInfo::getIgnore(); 479 480 if (const VectorType *VT = RetTy->getAs<VectorType>()) { 481 // On Darwin, some vectors are returned in registers. 482 if (IsDarwinVectorABI) { 483 uint64_t Size = getContext().getTypeSize(RetTy); 484 485 // 128-bit vectors are a special case; they are returned in 486 // registers and we need to make sure to pick a type the LLVM 487 // backend will like. 488 if (Size == 128) 489 return ABIArgInfo::getDirect(llvm::VectorType::get( 490 llvm::Type::getInt64Ty(getVMContext()), 2)); 491 492 // Always return in register if it fits in a general purpose 493 // register, or if it is 64 bits and has a single element. 494 if ((Size == 8 || Size == 16 || Size == 32) || 495 (Size == 64 && VT->getNumElements() == 1)) 496 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(), 497 Size)); 498 499 return ABIArgInfo::getIndirect(0); 500 } 501 502 return ABIArgInfo::getDirect(); 503 } 504 505 if (isAggregateTypeForABI(RetTy)) { 506 if (const RecordType *RT = RetTy->getAs<RecordType>()) { 507 // Structures with either a non-trivial destructor or a non-trivial 508 // copy constructor are always indirect. 509 if (hasNonTrivialDestructorOrCopyConstructor(RT)) 510 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 511 512 // Structures with flexible arrays are always indirect. 513 if (RT->getDecl()->hasFlexibleArrayMember()) 514 return ABIArgInfo::getIndirect(0); 515 } 516 517 // If specified, structs and unions are always indirect. 518 if (!IsSmallStructInRegABI && !RetTy->isAnyComplexType()) 519 return ABIArgInfo::getIndirect(0); 520 521 // Classify "single element" structs as their element type. 522 if (const Type *SeltTy = isSingleElementStruct(RetTy, getContext())) { 523 if (const BuiltinType *BT = SeltTy->getAs<BuiltinType>()) { 524 if (BT->isIntegerType()) { 525 // We need to use the size of the structure, padding 526 // bit-fields can adjust that to be larger than the single 527 // element type. 528 uint64_t Size = getContext().getTypeSize(RetTy); 529 return ABIArgInfo::getDirect( 530 llvm::IntegerType::get(getVMContext(), (unsigned)Size)); 531 } 532 533 if (BT->getKind() == BuiltinType::Float) { 534 assert(getContext().getTypeSize(RetTy) == 535 getContext().getTypeSize(SeltTy) && 536 "Unexpect single element structure size!"); 537 return ABIArgInfo::getDirect(llvm::Type::getFloatTy(getVMContext())); 538 } 539 540 if (BT->getKind() == BuiltinType::Double) { 541 assert(getContext().getTypeSize(RetTy) == 542 getContext().getTypeSize(SeltTy) && 543 "Unexpect single element structure size!"); 544 return ABIArgInfo::getDirect(llvm::Type::getDoubleTy(getVMContext())); 545 } 546 } else if (SeltTy->isPointerType()) { 547 // FIXME: It would be really nice if this could come out as the proper 548 // pointer type. 549 const llvm::Type *PtrTy = llvm::Type::getInt8PtrTy(getVMContext()); 550 return ABIArgInfo::getDirect(PtrTy); 551 } else if (SeltTy->isVectorType()) { 552 // 64- and 128-bit vectors are never returned in a 553 // register when inside a structure. 554 uint64_t Size = getContext().getTypeSize(RetTy); 555 if (Size == 64 || Size == 128) 556 return ABIArgInfo::getIndirect(0); 557 558 return classifyReturnType(QualType(SeltTy, 0)); 559 } 560 } 561 562 // Small structures which are register sized are generally returned 563 // in a register. 564 if (X86_32ABIInfo::shouldReturnTypeInRegister(RetTy, getContext())) { 565 uint64_t Size = getContext().getTypeSize(RetTy); 566 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(),Size)); 567 } 568 569 return ABIArgInfo::getIndirect(0); 570 } 571 572 // Treat an enum type as its underlying type. 573 if (const EnumType *EnumTy = RetTy->getAs<EnumType>()) 574 RetTy = EnumTy->getDecl()->getIntegerType(); 575 576 return (RetTy->isPromotableIntegerType() ? 577 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 578} 579 580static bool isRecordWithSSEVectorType(ASTContext &Context, QualType Ty) { 581 const RecordType *RT = Ty->getAs<RecordType>(); 582 if (!RT) 583 return 0; 584 const RecordDecl *RD = RT->getDecl(); 585 586 // If this is a C++ record, check the bases first. 587 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) 588 for (CXXRecordDecl::base_class_const_iterator i = CXXRD->bases_begin(), 589 e = CXXRD->bases_end(); i != e; ++i) 590 if (!isRecordWithSSEVectorType(Context, i->getType())) 591 return false; 592 593 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 594 i != e; ++i) { 595 QualType FT = i->getType(); 596 597 if (FT->getAs<VectorType>() && Context.getTypeSize(Ty) == 128) 598 return true; 599 600 if (isRecordWithSSEVectorType(Context, FT)) 601 return true; 602 } 603 604 return false; 605} 606 607unsigned X86_32ABIInfo::getTypeStackAlignInBytes(QualType Ty, 608 unsigned Align) const { 609 // Otherwise, if the alignment is less than or equal to the minimum ABI 610 // alignment, just use the default; the backend will handle this. 611 if (Align <= MinABIStackAlignInBytes) 612 return 0; // Use default alignment. 613 614 // On non-Darwin, the stack type alignment is always 4. 615 if (!IsDarwinVectorABI) { 616 // Set explicit alignment, since we may need to realign the top. 617 return MinABIStackAlignInBytes; 618 } 619 620 // Otherwise, if the type contains an SSE vector type, the alignment is 16. 621 if (isRecordWithSSEVectorType(getContext(), Ty)) 622 return 16; 623 624 return MinABIStackAlignInBytes; 625} 626 627ABIArgInfo X86_32ABIInfo::getIndirectResult(QualType Ty, bool ByVal) const { 628 if (!ByVal) 629 return ABIArgInfo::getIndirect(0, false); 630 631 // Compute the byval alignment. 632 unsigned TypeAlign = getContext().getTypeAlign(Ty) / 8; 633 unsigned StackAlign = getTypeStackAlignInBytes(Ty, TypeAlign); 634 if (StackAlign == 0) 635 return ABIArgInfo::getIndirect(0); 636 637 // If the stack alignment is less than the type alignment, realign the 638 // argument. 639 if (StackAlign < TypeAlign) 640 return ABIArgInfo::getIndirect(StackAlign, /*ByVal=*/true, 641 /*Realign=*/true); 642 643 return ABIArgInfo::getIndirect(StackAlign); 644} 645 646ABIArgInfo X86_32ABIInfo::classifyArgumentType(QualType Ty) const { 647 // FIXME: Set alignment on indirect arguments. 648 if (isAggregateTypeForABI(Ty)) { 649 // Structures with flexible arrays are always indirect. 650 if (const RecordType *RT = Ty->getAs<RecordType>()) { 651 // Structures with either a non-trivial destructor or a non-trivial 652 // copy constructor are always indirect. 653 if (hasNonTrivialDestructorOrCopyConstructor(RT)) 654 return getIndirectResult(Ty, /*ByVal=*/false); 655 656 if (RT->getDecl()->hasFlexibleArrayMember()) 657 return getIndirectResult(Ty); 658 } 659 660 // Ignore empty structs. 661 if (Ty->isStructureType() && getContext().getTypeSize(Ty) == 0) 662 return ABIArgInfo::getIgnore(); 663 664 // Expand small (<= 128-bit) record types when we know that the stack layout 665 // of those arguments will match the struct. This is important because the 666 // LLVM backend isn't smart enough to remove byval, which inhibits many 667 // optimizations. 668 if (getContext().getTypeSize(Ty) <= 4*32 && 669 canExpandIndirectArgument(Ty, getContext())) 670 return ABIArgInfo::getExpand(); 671 672 return getIndirectResult(Ty); 673 } 674 675 if (const VectorType *VT = Ty->getAs<VectorType>()) { 676 // On Darwin, some vectors are passed in memory, we handle this by passing 677 // it as an i8/i16/i32/i64. 678 if (IsDarwinVectorABI) { 679 uint64_t Size = getContext().getTypeSize(Ty); 680 if ((Size == 8 || Size == 16 || Size == 32) || 681 (Size == 64 && VT->getNumElements() == 1)) 682 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(), 683 Size)); 684 } 685 686 const llvm::Type *IRType = CGT.ConvertTypeRecursive(Ty); 687 if (UseX86_MMXType(IRType)) { 688 ABIArgInfo AAI = ABIArgInfo::getDirect(IRType); 689 AAI.setCoerceToType(llvm::Type::getX86_MMXTy(getVMContext())); 690 return AAI; 691 } 692 693 return ABIArgInfo::getDirect(); 694 } 695 696 697 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 698 Ty = EnumTy->getDecl()->getIntegerType(); 699 700 return (Ty->isPromotableIntegerType() ? 701 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 702} 703 704llvm::Value *X86_32ABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 705 CodeGenFunction &CGF) const { 706 const llvm::Type *BP = llvm::Type::getInt8PtrTy(CGF.getLLVMContext()); 707 const llvm::Type *BPP = llvm::PointerType::getUnqual(BP); 708 709 CGBuilderTy &Builder = CGF.Builder; 710 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP, 711 "ap"); 712 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur"); 713 llvm::Type *PTy = 714 llvm::PointerType::getUnqual(CGF.ConvertType(Ty)); 715 llvm::Value *AddrTyped = Builder.CreateBitCast(Addr, PTy); 716 717 uint64_t Offset = 718 llvm::RoundUpToAlignment(CGF.getContext().getTypeSize(Ty) / 8, 4); 719 llvm::Value *NextAddr = 720 Builder.CreateGEP(Addr, llvm::ConstantInt::get(CGF.Int32Ty, Offset), 721 "ap.next"); 722 Builder.CreateStore(NextAddr, VAListAddrAsBPP); 723 724 return AddrTyped; 725} 726 727void X86_32TargetCodeGenInfo::SetTargetAttributes(const Decl *D, 728 llvm::GlobalValue *GV, 729 CodeGen::CodeGenModule &CGM) const { 730 if (const FunctionDecl *FD = dyn_cast<FunctionDecl>(D)) { 731 if (FD->hasAttr<X86ForceAlignArgPointerAttr>()) { 732 // Get the LLVM function. 733 llvm::Function *Fn = cast<llvm::Function>(GV); 734 735 // Now add the 'alignstack' attribute with a value of 16. 736 Fn->addFnAttr(llvm::Attribute::constructStackAlignmentFromInt(16)); 737 } 738 } 739} 740 741bool X86_32TargetCodeGenInfo::initDwarfEHRegSizeTable( 742 CodeGen::CodeGenFunction &CGF, 743 llvm::Value *Address) const { 744 CodeGen::CGBuilderTy &Builder = CGF.Builder; 745 llvm::LLVMContext &Context = CGF.getLLVMContext(); 746 747 const llvm::IntegerType *i8 = llvm::Type::getInt8Ty(Context); 748 llvm::Value *Four8 = llvm::ConstantInt::get(i8, 4); 749 750 // 0-7 are the eight integer registers; the order is different 751 // on Darwin (for EH), but the range is the same. 752 // 8 is %eip. 753 AssignToArrayRange(Builder, Address, Four8, 0, 8); 754 755 if (CGF.CGM.isTargetDarwin()) { 756 // 12-16 are st(0..4). Not sure why we stop at 4. 757 // These have size 16, which is sizeof(long double) on 758 // platforms with 8-byte alignment for that type. 759 llvm::Value *Sixteen8 = llvm::ConstantInt::get(i8, 16); 760 AssignToArrayRange(Builder, Address, Sixteen8, 12, 16); 761 762 } else { 763 // 9 is %eflags, which doesn't get a size on Darwin for some 764 // reason. 765 Builder.CreateStore(Four8, Builder.CreateConstInBoundsGEP1_32(Address, 9)); 766 767 // 11-16 are st(0..5). Not sure why we stop at 5. 768 // These have size 12, which is sizeof(long double) on 769 // platforms with 4-byte alignment for that type. 770 llvm::Value *Twelve8 = llvm::ConstantInt::get(i8, 12); 771 AssignToArrayRange(Builder, Address, Twelve8, 11, 16); 772 } 773 774 return false; 775} 776 777//===----------------------------------------------------------------------===// 778// X86-64 ABI Implementation 779//===----------------------------------------------------------------------===// 780 781 782namespace { 783/// X86_64ABIInfo - The X86_64 ABI information. 784class X86_64ABIInfo : public ABIInfo { 785 enum Class { 786 Integer = 0, 787 SSE, 788 SSEUp, 789 X87, 790 X87Up, 791 ComplexX87, 792 NoClass, 793 Memory 794 }; 795 796 /// merge - Implement the X86_64 ABI merging algorithm. 797 /// 798 /// Merge an accumulating classification \arg Accum with a field 799 /// classification \arg Field. 800 /// 801 /// \param Accum - The accumulating classification. This should 802 /// always be either NoClass or the result of a previous merge 803 /// call. In addition, this should never be Memory (the caller 804 /// should just return Memory for the aggregate). 805 static Class merge(Class Accum, Class Field); 806 807 /// classify - Determine the x86_64 register classes in which the 808 /// given type T should be passed. 809 /// 810 /// \param Lo - The classification for the parts of the type 811 /// residing in the low word of the containing object. 812 /// 813 /// \param Hi - The classification for the parts of the type 814 /// residing in the high word of the containing object. 815 /// 816 /// \param OffsetBase - The bit offset of this type in the 817 /// containing object. Some parameters are classified different 818 /// depending on whether they straddle an eightbyte boundary. 819 /// 820 /// If a word is unused its result will be NoClass; if a type should 821 /// be passed in Memory then at least the classification of \arg Lo 822 /// will be Memory. 823 /// 824 /// The \arg Lo class will be NoClass iff the argument is ignored. 825 /// 826 /// If the \arg Lo class is ComplexX87, then the \arg Hi class will 827 /// also be ComplexX87. 828 void classify(QualType T, uint64_t OffsetBase, Class &Lo, Class &Hi) const; 829 830 const llvm::Type *Get16ByteVectorType(QualType Ty) const; 831 const llvm::Type *GetSSETypeAtOffset(const llvm::Type *IRType, 832 unsigned IROffset, QualType SourceTy, 833 unsigned SourceOffset) const; 834 const llvm::Type *GetINTEGERTypeAtOffset(const llvm::Type *IRType, 835 unsigned IROffset, QualType SourceTy, 836 unsigned SourceOffset) const; 837 838 /// getIndirectResult - Give a source type \arg Ty, return a suitable result 839 /// such that the argument will be returned in memory. 840 ABIArgInfo getIndirectReturnResult(QualType Ty) const; 841 842 /// getIndirectResult - Give a source type \arg Ty, return a suitable result 843 /// such that the argument will be passed in memory. 844 ABIArgInfo getIndirectResult(QualType Ty) const; 845 846 ABIArgInfo classifyReturnType(QualType RetTy) const; 847 848 ABIArgInfo classifyArgumentType(QualType Ty, 849 unsigned &neededInt, 850 unsigned &neededSSE) const; 851 852public: 853 X86_64ABIInfo(CodeGen::CodeGenTypes &CGT) : ABIInfo(CGT) {} 854 855 virtual void computeInfo(CGFunctionInfo &FI) const; 856 857 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 858 CodeGenFunction &CGF) const; 859}; 860 861/// WinX86_64ABIInfo - The Windows X86_64 ABI information. 862class WinX86_64ABIInfo : public ABIInfo { 863 864 ABIArgInfo classify(QualType Ty) const; 865 866public: 867 WinX86_64ABIInfo(CodeGen::CodeGenTypes &CGT) : ABIInfo(CGT) {} 868 869 virtual void computeInfo(CGFunctionInfo &FI) const; 870 871 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 872 CodeGenFunction &CGF) const; 873}; 874 875class X86_64TargetCodeGenInfo : public TargetCodeGenInfo { 876public: 877 X86_64TargetCodeGenInfo(CodeGen::CodeGenTypes &CGT) 878 : TargetCodeGenInfo(new X86_64ABIInfo(CGT)) {} 879 880 int getDwarfEHStackPointer(CodeGen::CodeGenModule &CGM) const { 881 return 7; 882 } 883 884 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 885 llvm::Value *Address) const { 886 CodeGen::CGBuilderTy &Builder = CGF.Builder; 887 llvm::LLVMContext &Context = CGF.getLLVMContext(); 888 889 const llvm::IntegerType *i8 = llvm::Type::getInt8Ty(Context); 890 llvm::Value *Eight8 = llvm::ConstantInt::get(i8, 8); 891 892 // 0-15 are the 16 integer registers. 893 // 16 is %rip. 894 AssignToArrayRange(Builder, Address, Eight8, 0, 16); 895 896 return false; 897 } 898}; 899 900class WinX86_64TargetCodeGenInfo : public TargetCodeGenInfo { 901public: 902 WinX86_64TargetCodeGenInfo(CodeGen::CodeGenTypes &CGT) 903 : TargetCodeGenInfo(new WinX86_64ABIInfo(CGT)) {} 904 905 int getDwarfEHStackPointer(CodeGen::CodeGenModule &CGM) const { 906 return 7; 907 } 908 909 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 910 llvm::Value *Address) const { 911 CodeGen::CGBuilderTy &Builder = CGF.Builder; 912 llvm::LLVMContext &Context = CGF.getLLVMContext(); 913 914 const llvm::IntegerType *i8 = llvm::Type::getInt8Ty(Context); 915 llvm::Value *Eight8 = llvm::ConstantInt::get(i8, 8); 916 917 // 0-15 are the 16 integer registers. 918 // 16 is %rip. 919 AssignToArrayRange(Builder, Address, Eight8, 0, 16); 920 921 return false; 922 } 923}; 924 925} 926 927X86_64ABIInfo::Class X86_64ABIInfo::merge(Class Accum, Class Field) { 928 // AMD64-ABI 3.2.3p2: Rule 4. Each field of an object is 929 // classified recursively so that always two fields are 930 // considered. The resulting class is calculated according to 931 // the classes of the fields in the eightbyte: 932 // 933 // (a) If both classes are equal, this is the resulting class. 934 // 935 // (b) If one of the classes is NO_CLASS, the resulting class is 936 // the other class. 937 // 938 // (c) If one of the classes is MEMORY, the result is the MEMORY 939 // class. 940 // 941 // (d) If one of the classes is INTEGER, the result is the 942 // INTEGER. 943 // 944 // (e) If one of the classes is X87, X87UP, COMPLEX_X87 class, 945 // MEMORY is used as class. 946 // 947 // (f) Otherwise class SSE is used. 948 949 // Accum should never be memory (we should have returned) or 950 // ComplexX87 (because this cannot be passed in a structure). 951 assert((Accum != Memory && Accum != ComplexX87) && 952 "Invalid accumulated classification during merge."); 953 if (Accum == Field || Field == NoClass) 954 return Accum; 955 if (Field == Memory) 956 return Memory; 957 if (Accum == NoClass) 958 return Field; 959 if (Accum == Integer || Field == Integer) 960 return Integer; 961 if (Field == X87 || Field == X87Up || Field == ComplexX87 || 962 Accum == X87 || Accum == X87Up) 963 return Memory; 964 return SSE; 965} 966 967void X86_64ABIInfo::classify(QualType Ty, uint64_t OffsetBase, 968 Class &Lo, Class &Hi) const { 969 // FIXME: This code can be simplified by introducing a simple value class for 970 // Class pairs with appropriate constructor methods for the various 971 // situations. 972 973 // FIXME: Some of the split computations are wrong; unaligned vectors 974 // shouldn't be passed in registers for example, so there is no chance they 975 // can straddle an eightbyte. Verify & simplify. 976 977 Lo = Hi = NoClass; 978 979 Class &Current = OffsetBase < 64 ? Lo : Hi; 980 Current = Memory; 981 982 if (const BuiltinType *BT = Ty->getAs<BuiltinType>()) { 983 BuiltinType::Kind k = BT->getKind(); 984 985 if (k == BuiltinType::Void) { 986 Current = NoClass; 987 } else if (k == BuiltinType::Int128 || k == BuiltinType::UInt128) { 988 Lo = Integer; 989 Hi = Integer; 990 } else if (k >= BuiltinType::Bool && k <= BuiltinType::LongLong) { 991 Current = Integer; 992 } else if (k == BuiltinType::Float || k == BuiltinType::Double) { 993 Current = SSE; 994 } else if (k == BuiltinType::LongDouble) { 995 Lo = X87; 996 Hi = X87Up; 997 } 998 // FIXME: _Decimal32 and _Decimal64 are SSE. 999 // FIXME: _float128 and _Decimal128 are (SSE, SSEUp). 1000 return; 1001 } 1002 1003 if (const EnumType *ET = Ty->getAs<EnumType>()) { 1004 // Classify the underlying integer type. 1005 classify(ET->getDecl()->getIntegerType(), OffsetBase, Lo, Hi); 1006 return; 1007 } 1008 1009 if (Ty->hasPointerRepresentation()) { 1010 Current = Integer; 1011 return; 1012 } 1013 1014 if (Ty->isMemberPointerType()) { 1015 if (Ty->isMemberFunctionPointerType()) 1016 Lo = Hi = Integer; 1017 else 1018 Current = Integer; 1019 return; 1020 } 1021 1022 if (const VectorType *VT = Ty->getAs<VectorType>()) { 1023 uint64_t Size = getContext().getTypeSize(VT); 1024 if (Size == 32) { 1025 // gcc passes all <4 x char>, <2 x short>, <1 x int>, <1 x 1026 // float> as integer. 1027 Current = Integer; 1028 1029 // If this type crosses an eightbyte boundary, it should be 1030 // split. 1031 uint64_t EB_Real = (OffsetBase) / 64; 1032 uint64_t EB_Imag = (OffsetBase + Size - 1) / 64; 1033 if (EB_Real != EB_Imag) 1034 Hi = Lo; 1035 } else if (Size == 64) { 1036 // gcc passes <1 x double> in memory. :( 1037 if (VT->getElementType()->isSpecificBuiltinType(BuiltinType::Double)) 1038 return; 1039 1040 // gcc passes <1 x long long> as INTEGER. 1041 if (VT->getElementType()->isSpecificBuiltinType(BuiltinType::LongLong) || 1042 VT->getElementType()->isSpecificBuiltinType(BuiltinType::ULongLong) || 1043 VT->getElementType()->isSpecificBuiltinType(BuiltinType::Long) || 1044 VT->getElementType()->isSpecificBuiltinType(BuiltinType::ULong)) 1045 Current = Integer; 1046 else 1047 Current = SSE; 1048 1049 // If this type crosses an eightbyte boundary, it should be 1050 // split. 1051 if (OffsetBase && OffsetBase != 64) 1052 Hi = Lo; 1053 } else if (Size == 128) { 1054 Lo = SSE; 1055 Hi = SSEUp; 1056 } 1057 return; 1058 } 1059 1060 if (const ComplexType *CT = Ty->getAs<ComplexType>()) { 1061 QualType ET = getContext().getCanonicalType(CT->getElementType()); 1062 1063 uint64_t Size = getContext().getTypeSize(Ty); 1064 if (ET->isIntegralOrEnumerationType()) { 1065 if (Size <= 64) 1066 Current = Integer; 1067 else if (Size <= 128) 1068 Lo = Hi = Integer; 1069 } else if (ET == getContext().FloatTy) 1070 Current = SSE; 1071 else if (ET == getContext().DoubleTy) 1072 Lo = Hi = SSE; 1073 else if (ET == getContext().LongDoubleTy) 1074 Current = ComplexX87; 1075 1076 // If this complex type crosses an eightbyte boundary then it 1077 // should be split. 1078 uint64_t EB_Real = (OffsetBase) / 64; 1079 uint64_t EB_Imag = (OffsetBase + getContext().getTypeSize(ET)) / 64; 1080 if (Hi == NoClass && EB_Real != EB_Imag) 1081 Hi = Lo; 1082 1083 return; 1084 } 1085 1086 if (const ConstantArrayType *AT = getContext().getAsConstantArrayType(Ty)) { 1087 // Arrays are treated like structures. 1088 1089 uint64_t Size = getContext().getTypeSize(Ty); 1090 1091 // AMD64-ABI 3.2.3p2: Rule 1. If the size of an object is larger 1092 // than two eightbytes, ..., it has class MEMORY. 1093 if (Size > 128) 1094 return; 1095 1096 // AMD64-ABI 3.2.3p2: Rule 1. If ..., or it contains unaligned 1097 // fields, it has class MEMORY. 1098 // 1099 // Only need to check alignment of array base. 1100 if (OffsetBase % getContext().getTypeAlign(AT->getElementType())) 1101 return; 1102 1103 // Otherwise implement simplified merge. We could be smarter about 1104 // this, but it isn't worth it and would be harder to verify. 1105 Current = NoClass; 1106 uint64_t EltSize = getContext().getTypeSize(AT->getElementType()); 1107 uint64_t ArraySize = AT->getSize().getZExtValue(); 1108 for (uint64_t i=0, Offset=OffsetBase; i<ArraySize; ++i, Offset += EltSize) { 1109 Class FieldLo, FieldHi; 1110 classify(AT->getElementType(), Offset, FieldLo, FieldHi); 1111 Lo = merge(Lo, FieldLo); 1112 Hi = merge(Hi, FieldHi); 1113 if (Lo == Memory || Hi == Memory) 1114 break; 1115 } 1116 1117 // Do post merger cleanup (see below). Only case we worry about is Memory. 1118 if (Hi == Memory) 1119 Lo = Memory; 1120 assert((Hi != SSEUp || Lo == SSE) && "Invalid SSEUp array classification."); 1121 return; 1122 } 1123 1124 if (const RecordType *RT = Ty->getAs<RecordType>()) { 1125 uint64_t Size = getContext().getTypeSize(Ty); 1126 1127 // AMD64-ABI 3.2.3p2: Rule 1. If the size of an object is larger 1128 // than two eightbytes, ..., it has class MEMORY. 1129 if (Size > 128) 1130 return; 1131 1132 // AMD64-ABI 3.2.3p2: Rule 2. If a C++ object has either a non-trivial 1133 // copy constructor or a non-trivial destructor, it is passed by invisible 1134 // reference. 1135 if (hasNonTrivialDestructorOrCopyConstructor(RT)) 1136 return; 1137 1138 const RecordDecl *RD = RT->getDecl(); 1139 1140 // Assume variable sized types are passed in memory. 1141 if (RD->hasFlexibleArrayMember()) 1142 return; 1143 1144 const ASTRecordLayout &Layout = getContext().getASTRecordLayout(RD); 1145 1146 // Reset Lo class, this will be recomputed. 1147 Current = NoClass; 1148 1149 // If this is a C++ record, classify the bases first. 1150 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) { 1151 for (CXXRecordDecl::base_class_const_iterator i = CXXRD->bases_begin(), 1152 e = CXXRD->bases_end(); i != e; ++i) { 1153 assert(!i->isVirtual() && !i->getType()->isDependentType() && 1154 "Unexpected base class!"); 1155 const CXXRecordDecl *Base = 1156 cast<CXXRecordDecl>(i->getType()->getAs<RecordType>()->getDecl()); 1157 1158 // Classify this field. 1159 // 1160 // AMD64-ABI 3.2.3p2: Rule 3. If the size of the aggregate exceeds a 1161 // single eightbyte, each is classified separately. Each eightbyte gets 1162 // initialized to class NO_CLASS. 1163 Class FieldLo, FieldHi; 1164 uint64_t Offset = OffsetBase + Layout.getBaseClassOffsetInBits(Base); 1165 classify(i->getType(), Offset, FieldLo, FieldHi); 1166 Lo = merge(Lo, FieldLo); 1167 Hi = merge(Hi, FieldHi); 1168 if (Lo == Memory || Hi == Memory) 1169 break; 1170 } 1171 } 1172 1173 // Classify the fields one at a time, merging the results. 1174 unsigned idx = 0; 1175 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 1176 i != e; ++i, ++idx) { 1177 uint64_t Offset = OffsetBase + Layout.getFieldOffset(idx); 1178 bool BitField = i->isBitField(); 1179 1180 // AMD64-ABI 3.2.3p2: Rule 1. If ..., or it contains unaligned 1181 // fields, it has class MEMORY. 1182 // 1183 // Note, skip this test for bit-fields, see below. 1184 if (!BitField && Offset % getContext().getTypeAlign(i->getType())) { 1185 Lo = Memory; 1186 return; 1187 } 1188 1189 // Classify this field. 1190 // 1191 // AMD64-ABI 3.2.3p2: Rule 3. If the size of the aggregate 1192 // exceeds a single eightbyte, each is classified 1193 // separately. Each eightbyte gets initialized to class 1194 // NO_CLASS. 1195 Class FieldLo, FieldHi; 1196 1197 // Bit-fields require special handling, they do not force the 1198 // structure to be passed in memory even if unaligned, and 1199 // therefore they can straddle an eightbyte. 1200 if (BitField) { 1201 // Ignore padding bit-fields. 1202 if (i->isUnnamedBitfield()) 1203 continue; 1204 1205 uint64_t Offset = OffsetBase + Layout.getFieldOffset(idx); 1206 uint64_t Size = 1207 i->getBitWidth()->EvaluateAsInt(getContext()).getZExtValue(); 1208 1209 uint64_t EB_Lo = Offset / 64; 1210 uint64_t EB_Hi = (Offset + Size - 1) / 64; 1211 FieldLo = FieldHi = NoClass; 1212 if (EB_Lo) { 1213 assert(EB_Hi == EB_Lo && "Invalid classification, type > 16 bytes."); 1214 FieldLo = NoClass; 1215 FieldHi = Integer; 1216 } else { 1217 FieldLo = Integer; 1218 FieldHi = EB_Hi ? Integer : NoClass; 1219 } 1220 } else 1221 classify(i->getType(), Offset, FieldLo, FieldHi); 1222 Lo = merge(Lo, FieldLo); 1223 Hi = merge(Hi, FieldHi); 1224 if (Lo == Memory || Hi == Memory) 1225 break; 1226 } 1227 1228 // AMD64-ABI 3.2.3p2: Rule 5. Then a post merger cleanup is done: 1229 // 1230 // (a) If one of the classes is MEMORY, the whole argument is 1231 // passed in memory. 1232 // 1233 // (b) If SSEUP is not preceeded by SSE, it is converted to SSE. 1234 1235 // The first of these conditions is guaranteed by how we implement 1236 // the merge (just bail). 1237 // 1238 // The second condition occurs in the case of unions; for example 1239 // union { _Complex double; unsigned; }. 1240 if (Hi == Memory) 1241 Lo = Memory; 1242 if (Hi == SSEUp && Lo != SSE) 1243 Hi = SSE; 1244 } 1245} 1246 1247ABIArgInfo X86_64ABIInfo::getIndirectReturnResult(QualType Ty) const { 1248 // If this is a scalar LLVM value then assume LLVM will pass it in the right 1249 // place naturally. 1250 if (!isAggregateTypeForABI(Ty)) { 1251 // Treat an enum type as its underlying type. 1252 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 1253 Ty = EnumTy->getDecl()->getIntegerType(); 1254 1255 return (Ty->isPromotableIntegerType() ? 1256 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 1257 } 1258 1259 return ABIArgInfo::getIndirect(0); 1260} 1261 1262ABIArgInfo X86_64ABIInfo::getIndirectResult(QualType Ty) const { 1263 // If this is a scalar LLVM value then assume LLVM will pass it in the right 1264 // place naturally. 1265 if (!isAggregateTypeForABI(Ty)) { 1266 // Treat an enum type as its underlying type. 1267 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 1268 Ty = EnumTy->getDecl()->getIntegerType(); 1269 1270 return (Ty->isPromotableIntegerType() ? 1271 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 1272 } 1273 1274 if (isRecordWithNonTrivialDestructorOrCopyConstructor(Ty)) 1275 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 1276 1277 // Compute the byval alignment. We trust the back-end to honor the 1278 // minimum ABI alignment for byval, to make cleaner IR. 1279 const unsigned MinABIAlign = 8; 1280 unsigned Align = getContext().getTypeAlign(Ty) / 8; 1281 if (Align > MinABIAlign) 1282 return ABIArgInfo::getIndirect(Align); 1283 return ABIArgInfo::getIndirect(0); 1284} 1285 1286/// Get16ByteVectorType - The ABI specifies that a value should be passed in an 1287/// full vector XMM register. Pick an LLVM IR type that will be passed as a 1288/// vector register. 1289const llvm::Type *X86_64ABIInfo::Get16ByteVectorType(QualType Ty) const { 1290 const llvm::Type *IRType = CGT.ConvertTypeRecursive(Ty); 1291 1292 // Wrapper structs that just contain vectors are passed just like vectors, 1293 // strip them off if present. 1294 const llvm::StructType *STy = dyn_cast<llvm::StructType>(IRType); 1295 while (STy && STy->getNumElements() == 1) { 1296 IRType = STy->getElementType(0); 1297 STy = dyn_cast<llvm::StructType>(IRType); 1298 } 1299 1300 // If the preferred type is a 16-byte vector, prefer to pass it. 1301 if (const llvm::VectorType *VT = dyn_cast<llvm::VectorType>(IRType)){ 1302 const llvm::Type *EltTy = VT->getElementType(); 1303 if (VT->getBitWidth() == 128 && 1304 (EltTy->isFloatTy() || EltTy->isDoubleTy() || 1305 EltTy->isIntegerTy(8) || EltTy->isIntegerTy(16) || 1306 EltTy->isIntegerTy(32) || EltTy->isIntegerTy(64) || 1307 EltTy->isIntegerTy(128))) 1308 return VT; 1309 } 1310 1311 return llvm::VectorType::get(llvm::Type::getDoubleTy(getVMContext()), 2); 1312} 1313 1314/// BitsContainNoUserData - Return true if the specified [start,end) bit range 1315/// is known to either be off the end of the specified type or being in 1316/// alignment padding. The user type specified is known to be at most 128 bits 1317/// in size, and have passed through X86_64ABIInfo::classify with a successful 1318/// classification that put one of the two halves in the INTEGER class. 1319/// 1320/// It is conservatively correct to return false. 1321static bool BitsContainNoUserData(QualType Ty, unsigned StartBit, 1322 unsigned EndBit, ASTContext &Context) { 1323 // If the bytes being queried are off the end of the type, there is no user 1324 // data hiding here. This handles analysis of builtins, vectors and other 1325 // types that don't contain interesting padding. 1326 unsigned TySize = (unsigned)Context.getTypeSize(Ty); 1327 if (TySize <= StartBit) 1328 return true; 1329 1330 if (const ConstantArrayType *AT = Context.getAsConstantArrayType(Ty)) { 1331 unsigned EltSize = (unsigned)Context.getTypeSize(AT->getElementType()); 1332 unsigned NumElts = (unsigned)AT->getSize().getZExtValue(); 1333 1334 // Check each element to see if the element overlaps with the queried range. 1335 for (unsigned i = 0; i != NumElts; ++i) { 1336 // If the element is after the span we care about, then we're done.. 1337 unsigned EltOffset = i*EltSize; 1338 if (EltOffset >= EndBit) break; 1339 1340 unsigned EltStart = EltOffset < StartBit ? StartBit-EltOffset :0; 1341 if (!BitsContainNoUserData(AT->getElementType(), EltStart, 1342 EndBit-EltOffset, Context)) 1343 return false; 1344 } 1345 // If it overlaps no elements, then it is safe to process as padding. 1346 return true; 1347 } 1348 1349 if (const RecordType *RT = Ty->getAs<RecordType>()) { 1350 const RecordDecl *RD = RT->getDecl(); 1351 const ASTRecordLayout &Layout = Context.getASTRecordLayout(RD); 1352 1353 // If this is a C++ record, check the bases first. 1354 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) { 1355 for (CXXRecordDecl::base_class_const_iterator i = CXXRD->bases_begin(), 1356 e = CXXRD->bases_end(); i != e; ++i) { 1357 assert(!i->isVirtual() && !i->getType()->isDependentType() && 1358 "Unexpected base class!"); 1359 const CXXRecordDecl *Base = 1360 cast<CXXRecordDecl>(i->getType()->getAs<RecordType>()->getDecl()); 1361 1362 // If the base is after the span we care about, ignore it. 1363 unsigned BaseOffset = (unsigned)Layout.getBaseClassOffsetInBits(Base); 1364 if (BaseOffset >= EndBit) continue; 1365 1366 unsigned BaseStart = BaseOffset < StartBit ? StartBit-BaseOffset :0; 1367 if (!BitsContainNoUserData(i->getType(), BaseStart, 1368 EndBit-BaseOffset, Context)) 1369 return false; 1370 } 1371 } 1372 1373 // Verify that no field has data that overlaps the region of interest. Yes 1374 // this could be sped up a lot by being smarter about queried fields, 1375 // however we're only looking at structs up to 16 bytes, so we don't care 1376 // much. 1377 unsigned idx = 0; 1378 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 1379 i != e; ++i, ++idx) { 1380 unsigned FieldOffset = (unsigned)Layout.getFieldOffset(idx); 1381 1382 // If we found a field after the region we care about, then we're done. 1383 if (FieldOffset >= EndBit) break; 1384 1385 unsigned FieldStart = FieldOffset < StartBit ? StartBit-FieldOffset :0; 1386 if (!BitsContainNoUserData(i->getType(), FieldStart, EndBit-FieldOffset, 1387 Context)) 1388 return false; 1389 } 1390 1391 // If nothing in this record overlapped the area of interest, then we're 1392 // clean. 1393 return true; 1394 } 1395 1396 return false; 1397} 1398 1399/// ContainsFloatAtOffset - Return true if the specified LLVM IR type has a 1400/// float member at the specified offset. For example, {int,{float}} has a 1401/// float at offset 4. It is conservatively correct for this routine to return 1402/// false. 1403static bool ContainsFloatAtOffset(const llvm::Type *IRType, unsigned IROffset, 1404 const llvm::TargetData &TD) { 1405 // Base case if we find a float. 1406 if (IROffset == 0 && IRType->isFloatTy()) 1407 return true; 1408 1409 // If this is a struct, recurse into the field at the specified offset. 1410 if (const llvm::StructType *STy = dyn_cast<llvm::StructType>(IRType)) { 1411 const llvm::StructLayout *SL = TD.getStructLayout(STy); 1412 unsigned Elt = SL->getElementContainingOffset(IROffset); 1413 IROffset -= SL->getElementOffset(Elt); 1414 return ContainsFloatAtOffset(STy->getElementType(Elt), IROffset, TD); 1415 } 1416 1417 // If this is an array, recurse into the field at the specified offset. 1418 if (const llvm::ArrayType *ATy = dyn_cast<llvm::ArrayType>(IRType)) { 1419 const llvm::Type *EltTy = ATy->getElementType(); 1420 unsigned EltSize = TD.getTypeAllocSize(EltTy); 1421 IROffset -= IROffset/EltSize*EltSize; 1422 return ContainsFloatAtOffset(EltTy, IROffset, TD); 1423 } 1424 1425 return false; 1426} 1427 1428 1429/// GetSSETypeAtOffset - Return a type that will be passed by the backend in the 1430/// low 8 bytes of an XMM register, corresponding to the SSE class. 1431const llvm::Type *X86_64ABIInfo:: 1432GetSSETypeAtOffset(const llvm::Type *IRType, unsigned IROffset, 1433 QualType SourceTy, unsigned SourceOffset) const { 1434 // The only three choices we have are either double, <2 x float>, or float. We 1435 // pass as float if the last 4 bytes is just padding. This happens for 1436 // structs that contain 3 floats. 1437 if (BitsContainNoUserData(SourceTy, SourceOffset*8+32, 1438 SourceOffset*8+64, getContext())) 1439 return llvm::Type::getFloatTy(getVMContext()); 1440 1441 // We want to pass as <2 x float> if the LLVM IR type contains a float at 1442 // offset+0 and offset+4. Walk the LLVM IR type to find out if this is the 1443 // case. 1444 if (ContainsFloatAtOffset(IRType, IROffset, getTargetData()) && 1445 ContainsFloatAtOffset(IRType, IROffset+4, getTargetData())) 1446 return llvm::VectorType::get(llvm::Type::getFloatTy(getVMContext()), 2); 1447 1448 return llvm::Type::getDoubleTy(getVMContext()); 1449} 1450 1451 1452/// GetINTEGERTypeAtOffset - The ABI specifies that a value should be passed in 1453/// an 8-byte GPR. This means that we either have a scalar or we are talking 1454/// about the high or low part of an up-to-16-byte struct. This routine picks 1455/// the best LLVM IR type to represent this, which may be i64 or may be anything 1456/// else that the backend will pass in a GPR that works better (e.g. i8, %foo*, 1457/// etc). 1458/// 1459/// PrefType is an LLVM IR type that corresponds to (part of) the IR type for 1460/// the source type. IROffset is an offset in bytes into the LLVM IR type that 1461/// the 8-byte value references. PrefType may be null. 1462/// 1463/// SourceTy is the source level type for the entire argument. SourceOffset is 1464/// an offset into this that we're processing (which is always either 0 or 8). 1465/// 1466const llvm::Type *X86_64ABIInfo:: 1467GetINTEGERTypeAtOffset(const llvm::Type *IRType, unsigned IROffset, 1468 QualType SourceTy, unsigned SourceOffset) const { 1469 // If we're dealing with an un-offset LLVM IR type, then it means that we're 1470 // returning an 8-byte unit starting with it. See if we can safely use it. 1471 if (IROffset == 0) { 1472 // Pointers and int64's always fill the 8-byte unit. 1473 if (isa<llvm::PointerType>(IRType) || IRType->isIntegerTy(64)) 1474 return IRType; 1475 1476 // If we have a 1/2/4-byte integer, we can use it only if the rest of the 1477 // goodness in the source type is just tail padding. This is allowed to 1478 // kick in for struct {double,int} on the int, but not on 1479 // struct{double,int,int} because we wouldn't return the second int. We 1480 // have to do this analysis on the source type because we can't depend on 1481 // unions being lowered a specific way etc. 1482 if (IRType->isIntegerTy(8) || IRType->isIntegerTy(16) || 1483 IRType->isIntegerTy(32)) { 1484 unsigned BitWidth = cast<llvm::IntegerType>(IRType)->getBitWidth(); 1485 1486 if (BitsContainNoUserData(SourceTy, SourceOffset*8+BitWidth, 1487 SourceOffset*8+64, getContext())) 1488 return IRType; 1489 } 1490 } 1491 1492 if (const llvm::StructType *STy = dyn_cast<llvm::StructType>(IRType)) { 1493 // If this is a struct, recurse into the field at the specified offset. 1494 const llvm::StructLayout *SL = getTargetData().getStructLayout(STy); 1495 if (IROffset < SL->getSizeInBytes()) { 1496 unsigned FieldIdx = SL->getElementContainingOffset(IROffset); 1497 IROffset -= SL->getElementOffset(FieldIdx); 1498 1499 return GetINTEGERTypeAtOffset(STy->getElementType(FieldIdx), IROffset, 1500 SourceTy, SourceOffset); 1501 } 1502 } 1503 1504 if (const llvm::ArrayType *ATy = dyn_cast<llvm::ArrayType>(IRType)) { 1505 const llvm::Type *EltTy = ATy->getElementType(); 1506 unsigned EltSize = getTargetData().getTypeAllocSize(EltTy); 1507 unsigned EltOffset = IROffset/EltSize*EltSize; 1508 return GetINTEGERTypeAtOffset(EltTy, IROffset-EltOffset, SourceTy, 1509 SourceOffset); 1510 } 1511 1512 // Okay, we don't have any better idea of what to pass, so we pass this in an 1513 // integer register that isn't too big to fit the rest of the struct. 1514 unsigned TySizeInBytes = 1515 (unsigned)getContext().getTypeSizeInChars(SourceTy).getQuantity(); 1516 1517 assert(TySizeInBytes != SourceOffset && "Empty field?"); 1518 1519 // It is always safe to classify this as an integer type up to i64 that 1520 // isn't larger than the structure. 1521 return llvm::IntegerType::get(getVMContext(), 1522 std::min(TySizeInBytes-SourceOffset, 8U)*8); 1523} 1524 1525 1526/// GetX86_64ByValArgumentPair - Given a high and low type that can ideally 1527/// be used as elements of a two register pair to pass or return, return a 1528/// first class aggregate to represent them. For example, if the low part of 1529/// a by-value argument should be passed as i32* and the high part as float, 1530/// return {i32*, float}. 1531static const llvm::Type * 1532GetX86_64ByValArgumentPair(const llvm::Type *Lo, const llvm::Type *Hi, 1533 const llvm::TargetData &TD) { 1534 // In order to correctly satisfy the ABI, we need to the high part to start 1535 // at offset 8. If the high and low parts we inferred are both 4-byte types 1536 // (e.g. i32 and i32) then the resultant struct type ({i32,i32}) won't have 1537 // the second element at offset 8. Check for this: 1538 unsigned LoSize = (unsigned)TD.getTypeAllocSize(Lo); 1539 unsigned HiAlign = TD.getABITypeAlignment(Hi); 1540 unsigned HiStart = llvm::TargetData::RoundUpAlignment(LoSize, HiAlign); 1541 assert(HiStart != 0 && HiStart <= 8 && "Invalid x86-64 argument pair!"); 1542 1543 // To handle this, we have to increase the size of the low part so that the 1544 // second element will start at an 8 byte offset. We can't increase the size 1545 // of the second element because it might make us access off the end of the 1546 // struct. 1547 if (HiStart != 8) { 1548 // There are only two sorts of types the ABI generation code can produce for 1549 // the low part of a pair that aren't 8 bytes in size: float or i8/i16/i32. 1550 // Promote these to a larger type. 1551 if (Lo->isFloatTy()) 1552 Lo = llvm::Type::getDoubleTy(Lo->getContext()); 1553 else { 1554 assert(Lo->isIntegerTy() && "Invalid/unknown lo type"); 1555 Lo = llvm::Type::getInt64Ty(Lo->getContext()); 1556 } 1557 } 1558 1559 const llvm::StructType *Result = 1560 llvm::StructType::get(Lo->getContext(), Lo, Hi, NULL); 1561 1562 1563 // Verify that the second element is at an 8-byte offset. 1564 assert(TD.getStructLayout(Result)->getElementOffset(1) == 8 && 1565 "Invalid x86-64 argument pair!"); 1566 return Result; 1567} 1568 1569ABIArgInfo X86_64ABIInfo:: 1570classifyReturnType(QualType RetTy) const { 1571 // AMD64-ABI 3.2.3p4: Rule 1. Classify the return type with the 1572 // classification algorithm. 1573 X86_64ABIInfo::Class Lo, Hi; 1574 classify(RetTy, 0, Lo, Hi); 1575 1576 // Check some invariants. 1577 assert((Hi != Memory || Lo == Memory) && "Invalid memory classification."); 1578 assert((Hi != SSEUp || Lo == SSE) && "Invalid SSEUp classification."); 1579 1580 const llvm::Type *ResType = 0; 1581 switch (Lo) { 1582 case NoClass: 1583 if (Hi == NoClass) 1584 return ABIArgInfo::getIgnore(); 1585 // If the low part is just padding, it takes no register, leave ResType 1586 // null. 1587 assert((Hi == SSE || Hi == Integer || Hi == X87Up) && 1588 "Unknown missing lo part"); 1589 break; 1590 1591 case SSEUp: 1592 case X87Up: 1593 assert(0 && "Invalid classification for lo word."); 1594 1595 // AMD64-ABI 3.2.3p4: Rule 2. Types of class memory are returned via 1596 // hidden argument. 1597 case Memory: 1598 return getIndirectReturnResult(RetTy); 1599 1600 // AMD64-ABI 3.2.3p4: Rule 3. If the class is INTEGER, the next 1601 // available register of the sequence %rax, %rdx is used. 1602 case Integer: 1603 ResType = GetINTEGERTypeAtOffset(CGT.ConvertTypeRecursive(RetTy), 0, 1604 RetTy, 0); 1605 1606 // If we have a sign or zero extended integer, make sure to return Extend 1607 // so that the parameter gets the right LLVM IR attributes. 1608 if (Hi == NoClass && isa<llvm::IntegerType>(ResType)) { 1609 // Treat an enum type as its underlying type. 1610 if (const EnumType *EnumTy = RetTy->getAs<EnumType>()) 1611 RetTy = EnumTy->getDecl()->getIntegerType(); 1612 1613 if (RetTy->isIntegralOrEnumerationType() && 1614 RetTy->isPromotableIntegerType()) 1615 return ABIArgInfo::getExtend(); 1616 } 1617 break; 1618 1619 // AMD64-ABI 3.2.3p4: Rule 4. If the class is SSE, the next 1620 // available SSE register of the sequence %xmm0, %xmm1 is used. 1621 case SSE: 1622 ResType = GetSSETypeAtOffset(CGT.ConvertTypeRecursive(RetTy), 0, RetTy, 0); 1623 break; 1624 1625 // AMD64-ABI 3.2.3p4: Rule 6. If the class is X87, the value is 1626 // returned on the X87 stack in %st0 as 80-bit x87 number. 1627 case X87: 1628 ResType = llvm::Type::getX86_FP80Ty(getVMContext()); 1629 break; 1630 1631 // AMD64-ABI 3.2.3p4: Rule 8. If the class is COMPLEX_X87, the real 1632 // part of the value is returned in %st0 and the imaginary part in 1633 // %st1. 1634 case ComplexX87: 1635 assert(Hi == ComplexX87 && "Unexpected ComplexX87 classification."); 1636 ResType = llvm::StructType::get(getVMContext(), 1637 llvm::Type::getX86_FP80Ty(getVMContext()), 1638 llvm::Type::getX86_FP80Ty(getVMContext()), 1639 NULL); 1640 break; 1641 } 1642 1643 const llvm::Type *HighPart = 0; 1644 switch (Hi) { 1645 // Memory was handled previously and X87 should 1646 // never occur as a hi class. 1647 case Memory: 1648 case X87: 1649 assert(0 && "Invalid classification for hi word."); 1650 1651 case ComplexX87: // Previously handled. 1652 case NoClass: 1653 break; 1654 1655 case Integer: 1656 HighPart = GetINTEGERTypeAtOffset(CGT.ConvertTypeRecursive(RetTy), 1657 8, RetTy, 8); 1658 if (Lo == NoClass) // Return HighPart at offset 8 in memory. 1659 return ABIArgInfo::getDirect(HighPart, 8); 1660 break; 1661 case SSE: 1662 HighPart = GetSSETypeAtOffset(CGT.ConvertTypeRecursive(RetTy), 8, RetTy, 8); 1663 if (Lo == NoClass) // Return HighPart at offset 8 in memory. 1664 return ABIArgInfo::getDirect(HighPart, 8); 1665 break; 1666 1667 // AMD64-ABI 3.2.3p4: Rule 5. If the class is SSEUP, the eightbyte 1668 // is passed in the upper half of the last used SSE register. 1669 // 1670 // SSEUP should always be preceeded by SSE, just widen. 1671 case SSEUp: 1672 assert(Lo == SSE && "Unexpected SSEUp classification."); 1673 ResType = Get16ByteVectorType(RetTy); 1674 break; 1675 1676 // AMD64-ABI 3.2.3p4: Rule 7. If the class is X87UP, the value is 1677 // returned together with the previous X87 value in %st0. 1678 case X87Up: 1679 // If X87Up is preceeded by X87, we don't need to do 1680 // anything. However, in some cases with unions it may not be 1681 // preceeded by X87. In such situations we follow gcc and pass the 1682 // extra bits in an SSE reg. 1683 if (Lo != X87) { 1684 HighPart = GetSSETypeAtOffset(CGT.ConvertTypeRecursive(RetTy), 1685 8, RetTy, 8); 1686 if (Lo == NoClass) // Return HighPart at offset 8 in memory. 1687 return ABIArgInfo::getDirect(HighPart, 8); 1688 } 1689 break; 1690 } 1691 1692 // If a high part was specified, merge it together with the low part. It is 1693 // known to pass in the high eightbyte of the result. We do this by forming a 1694 // first class struct aggregate with the high and low part: {low, high} 1695 if (HighPart) 1696 ResType = GetX86_64ByValArgumentPair(ResType, HighPart, getTargetData()); 1697 1698 return ABIArgInfo::getDirect(ResType); 1699} 1700 1701ABIArgInfo X86_64ABIInfo::classifyArgumentType(QualType Ty, unsigned &neededInt, 1702 unsigned &neededSSE) const { 1703 X86_64ABIInfo::Class Lo, Hi; 1704 classify(Ty, 0, Lo, Hi); 1705 1706 // Check some invariants. 1707 // FIXME: Enforce these by construction. 1708 assert((Hi != Memory || Lo == Memory) && "Invalid memory classification."); 1709 assert((Hi != SSEUp || Lo == SSE) && "Invalid SSEUp classification."); 1710 1711 neededInt = 0; 1712 neededSSE = 0; 1713 const llvm::Type *ResType = 0; 1714 switch (Lo) { 1715 case NoClass: 1716 if (Hi == NoClass) 1717 return ABIArgInfo::getIgnore(); 1718 // If the low part is just padding, it takes no register, leave ResType 1719 // null. 1720 assert((Hi == SSE || Hi == Integer || Hi == X87Up) && 1721 "Unknown missing lo part"); 1722 break; 1723 1724 // AMD64-ABI 3.2.3p3: Rule 1. If the class is MEMORY, pass the argument 1725 // on the stack. 1726 case Memory: 1727 1728 // AMD64-ABI 3.2.3p3: Rule 5. If the class is X87, X87UP or 1729 // COMPLEX_X87, it is passed in memory. 1730 case X87: 1731 case ComplexX87: 1732 return getIndirectResult(Ty); 1733 1734 case SSEUp: 1735 case X87Up: 1736 assert(0 && "Invalid classification for lo word."); 1737 1738 // AMD64-ABI 3.2.3p3: Rule 2. If the class is INTEGER, the next 1739 // available register of the sequence %rdi, %rsi, %rdx, %rcx, %r8 1740 // and %r9 is used. 1741 case Integer: 1742 ++neededInt; 1743 1744 // Pick an 8-byte type based on the preferred type. 1745 ResType = GetINTEGERTypeAtOffset(CGT.ConvertTypeRecursive(Ty), 0, Ty, 0); 1746 1747 // If we have a sign or zero extended integer, make sure to return Extend 1748 // so that the parameter gets the right LLVM IR attributes. 1749 if (Hi == NoClass && isa<llvm::IntegerType>(ResType)) { 1750 // Treat an enum type as its underlying type. 1751 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 1752 Ty = EnumTy->getDecl()->getIntegerType(); 1753 1754 if (Ty->isIntegralOrEnumerationType() && 1755 Ty->isPromotableIntegerType()) 1756 return ABIArgInfo::getExtend(); 1757 } 1758 1759 break; 1760 1761 // AMD64-ABI 3.2.3p3: Rule 3. If the class is SSE, the next 1762 // available SSE register is used, the registers are taken in the 1763 // order from %xmm0 to %xmm7. 1764 case SSE: { 1765 const llvm::Type *IRType = CGT.ConvertTypeRecursive(Ty); 1766 if (Hi != NoClass || !UseX86_MMXType(IRType)) 1767 ResType = GetSSETypeAtOffset(IRType, 0, Ty, 0); 1768 else 1769 // This is an MMX type. Treat it as such. 1770 ResType = llvm::Type::getX86_MMXTy(getVMContext()); 1771 1772 ++neededSSE; 1773 break; 1774 } 1775 } 1776 1777 const llvm::Type *HighPart = 0; 1778 switch (Hi) { 1779 // Memory was handled previously, ComplexX87 and X87 should 1780 // never occur as hi classes, and X87Up must be preceed by X87, 1781 // which is passed in memory. 1782 case Memory: 1783 case X87: 1784 case ComplexX87: 1785 assert(0 && "Invalid classification for hi word."); 1786 break; 1787 1788 case NoClass: break; 1789 1790 case Integer: 1791 ++neededInt; 1792 // Pick an 8-byte type based on the preferred type. 1793 HighPart = GetINTEGERTypeAtOffset(CGT.ConvertTypeRecursive(Ty), 8, Ty, 8); 1794 1795 if (Lo == NoClass) // Pass HighPart at offset 8 in memory. 1796 return ABIArgInfo::getDirect(HighPart, 8); 1797 break; 1798 1799 // X87Up generally doesn't occur here (long double is passed in 1800 // memory), except in situations involving unions. 1801 case X87Up: 1802 case SSE: 1803 HighPart = GetSSETypeAtOffset(CGT.ConvertTypeRecursive(Ty), 8, Ty, 8); 1804 1805 if (Lo == NoClass) // Pass HighPart at offset 8 in memory. 1806 return ABIArgInfo::getDirect(HighPart, 8); 1807 1808 ++neededSSE; 1809 break; 1810 1811 // AMD64-ABI 3.2.3p3: Rule 4. If the class is SSEUP, the 1812 // eightbyte is passed in the upper half of the last used SSE 1813 // register. This only happens when 128-bit vectors are passed. 1814 case SSEUp: 1815 assert(Lo == SSE && "Unexpected SSEUp classification"); 1816 ResType = Get16ByteVectorType(Ty); 1817 break; 1818 } 1819 1820 // If a high part was specified, merge it together with the low part. It is 1821 // known to pass in the high eightbyte of the result. We do this by forming a 1822 // first class struct aggregate with the high and low part: {low, high} 1823 if (HighPart) 1824 ResType = GetX86_64ByValArgumentPair(ResType, HighPart, getTargetData()); 1825 1826 return ABIArgInfo::getDirect(ResType); 1827} 1828 1829void X86_64ABIInfo::computeInfo(CGFunctionInfo &FI) const { 1830 1831 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 1832 1833 // Keep track of the number of assigned registers. 1834 unsigned freeIntRegs = 6, freeSSERegs = 8; 1835 1836 // If the return value is indirect, then the hidden argument is consuming one 1837 // integer register. 1838 if (FI.getReturnInfo().isIndirect()) 1839 --freeIntRegs; 1840 1841 // AMD64-ABI 3.2.3p3: Once arguments are classified, the registers 1842 // get assigned (in left-to-right order) for passing as follows... 1843 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 1844 it != ie; ++it) { 1845 unsigned neededInt, neededSSE; 1846 it->info = classifyArgumentType(it->type, neededInt, neededSSE); 1847 1848 // AMD64-ABI 3.2.3p3: If there are no registers available for any 1849 // eightbyte of an argument, the whole argument is passed on the 1850 // stack. If registers have already been assigned for some 1851 // eightbytes of such an argument, the assignments get reverted. 1852 if (freeIntRegs >= neededInt && freeSSERegs >= neededSSE) { 1853 freeIntRegs -= neededInt; 1854 freeSSERegs -= neededSSE; 1855 } else { 1856 it->info = getIndirectResult(it->type); 1857 } 1858 } 1859} 1860 1861static llvm::Value *EmitVAArgFromMemory(llvm::Value *VAListAddr, 1862 QualType Ty, 1863 CodeGenFunction &CGF) { 1864 llvm::Value *overflow_arg_area_p = 1865 CGF.Builder.CreateStructGEP(VAListAddr, 2, "overflow_arg_area_p"); 1866 llvm::Value *overflow_arg_area = 1867 CGF.Builder.CreateLoad(overflow_arg_area_p, "overflow_arg_area"); 1868 1869 // AMD64-ABI 3.5.7p5: Step 7. Align l->overflow_arg_area upwards to a 16 1870 // byte boundary if alignment needed by type exceeds 8 byte boundary. 1871 uint64_t Align = CGF.getContext().getTypeAlign(Ty) / 8; 1872 if (Align > 8) { 1873 // Note that we follow the ABI & gcc here, even though the type 1874 // could in theory have an alignment greater than 16. This case 1875 // shouldn't ever matter in practice. 1876 1877 // overflow_arg_area = (overflow_arg_area + 15) & ~15; 1878 llvm::Value *Offset = 1879 llvm::ConstantInt::get(CGF.Int32Ty, 15); 1880 overflow_arg_area = CGF.Builder.CreateGEP(overflow_arg_area, Offset); 1881 llvm::Value *AsInt = CGF.Builder.CreatePtrToInt(overflow_arg_area, 1882 CGF.Int64Ty); 1883 llvm::Value *Mask = llvm::ConstantInt::get(CGF.Int64Ty, ~15LL); 1884 overflow_arg_area = 1885 CGF.Builder.CreateIntToPtr(CGF.Builder.CreateAnd(AsInt, Mask), 1886 overflow_arg_area->getType(), 1887 "overflow_arg_area.align"); 1888 } 1889 1890 // AMD64-ABI 3.5.7p5: Step 8. Fetch type from l->overflow_arg_area. 1891 const llvm::Type *LTy = CGF.ConvertTypeForMem(Ty); 1892 llvm::Value *Res = 1893 CGF.Builder.CreateBitCast(overflow_arg_area, 1894 llvm::PointerType::getUnqual(LTy)); 1895 1896 // AMD64-ABI 3.5.7p5: Step 9. Set l->overflow_arg_area to: 1897 // l->overflow_arg_area + sizeof(type). 1898 // AMD64-ABI 3.5.7p5: Step 10. Align l->overflow_arg_area upwards to 1899 // an 8 byte boundary. 1900 1901 uint64_t SizeInBytes = (CGF.getContext().getTypeSize(Ty) + 7) / 8; 1902 llvm::Value *Offset = 1903 llvm::ConstantInt::get(CGF.Int32Ty, (SizeInBytes + 7) & ~7); 1904 overflow_arg_area = CGF.Builder.CreateGEP(overflow_arg_area, Offset, 1905 "overflow_arg_area.next"); 1906 CGF.Builder.CreateStore(overflow_arg_area, overflow_arg_area_p); 1907 1908 // AMD64-ABI 3.5.7p5: Step 11. Return the fetched type. 1909 return Res; 1910} 1911 1912llvm::Value *X86_64ABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 1913 CodeGenFunction &CGF) const { 1914 llvm::LLVMContext &VMContext = CGF.getLLVMContext(); 1915 1916 // Assume that va_list type is correct; should be pointer to LLVM type: 1917 // struct { 1918 // i32 gp_offset; 1919 // i32 fp_offset; 1920 // i8* overflow_arg_area; 1921 // i8* reg_save_area; 1922 // }; 1923 unsigned neededInt, neededSSE; 1924 1925 Ty = CGF.getContext().getCanonicalType(Ty); 1926 ABIArgInfo AI = classifyArgumentType(Ty, neededInt, neededSSE); 1927 1928 // AMD64-ABI 3.5.7p5: Step 1. Determine whether type may be passed 1929 // in the registers. If not go to step 7. 1930 if (!neededInt && !neededSSE) 1931 return EmitVAArgFromMemory(VAListAddr, Ty, CGF); 1932 1933 // AMD64-ABI 3.5.7p5: Step 2. Compute num_gp to hold the number of 1934 // general purpose registers needed to pass type and num_fp to hold 1935 // the number of floating point registers needed. 1936 1937 // AMD64-ABI 3.5.7p5: Step 3. Verify whether arguments fit into 1938 // registers. In the case: l->gp_offset > 48 - num_gp * 8 or 1939 // l->fp_offset > 304 - num_fp * 16 go to step 7. 1940 // 1941 // NOTE: 304 is a typo, there are (6 * 8 + 8 * 16) = 176 bytes of 1942 // register save space). 1943 1944 llvm::Value *InRegs = 0; 1945 llvm::Value *gp_offset_p = 0, *gp_offset = 0; 1946 llvm::Value *fp_offset_p = 0, *fp_offset = 0; 1947 if (neededInt) { 1948 gp_offset_p = CGF.Builder.CreateStructGEP(VAListAddr, 0, "gp_offset_p"); 1949 gp_offset = CGF.Builder.CreateLoad(gp_offset_p, "gp_offset"); 1950 InRegs = llvm::ConstantInt::get(CGF.Int32Ty, 48 - neededInt * 8); 1951 InRegs = CGF.Builder.CreateICmpULE(gp_offset, InRegs, "fits_in_gp"); 1952 } 1953 1954 if (neededSSE) { 1955 fp_offset_p = CGF.Builder.CreateStructGEP(VAListAddr, 1, "fp_offset_p"); 1956 fp_offset = CGF.Builder.CreateLoad(fp_offset_p, "fp_offset"); 1957 llvm::Value *FitsInFP = 1958 llvm::ConstantInt::get(CGF.Int32Ty, 176 - neededSSE * 16); 1959 FitsInFP = CGF.Builder.CreateICmpULE(fp_offset, FitsInFP, "fits_in_fp"); 1960 InRegs = InRegs ? CGF.Builder.CreateAnd(InRegs, FitsInFP) : FitsInFP; 1961 } 1962 1963 llvm::BasicBlock *InRegBlock = CGF.createBasicBlock("vaarg.in_reg"); 1964 llvm::BasicBlock *InMemBlock = CGF.createBasicBlock("vaarg.in_mem"); 1965 llvm::BasicBlock *ContBlock = CGF.createBasicBlock("vaarg.end"); 1966 CGF.Builder.CreateCondBr(InRegs, InRegBlock, InMemBlock); 1967 1968 // Emit code to load the value if it was passed in registers. 1969 1970 CGF.EmitBlock(InRegBlock); 1971 1972 // AMD64-ABI 3.5.7p5: Step 4. Fetch type from l->reg_save_area with 1973 // an offset of l->gp_offset and/or l->fp_offset. This may require 1974 // copying to a temporary location in case the parameter is passed 1975 // in different register classes or requires an alignment greater 1976 // than 8 for general purpose registers and 16 for XMM registers. 1977 // 1978 // FIXME: This really results in shameful code when we end up needing to 1979 // collect arguments from different places; often what should result in a 1980 // simple assembling of a structure from scattered addresses has many more 1981 // loads than necessary. Can we clean this up? 1982 const llvm::Type *LTy = CGF.ConvertTypeForMem(Ty); 1983 llvm::Value *RegAddr = 1984 CGF.Builder.CreateLoad(CGF.Builder.CreateStructGEP(VAListAddr, 3), 1985 "reg_save_area"); 1986 if (neededInt && neededSSE) { 1987 // FIXME: Cleanup. 1988 assert(AI.isDirect() && "Unexpected ABI info for mixed regs"); 1989 const llvm::StructType *ST = cast<llvm::StructType>(AI.getCoerceToType()); 1990 llvm::Value *Tmp = CGF.CreateTempAlloca(ST); 1991 assert(ST->getNumElements() == 2 && "Unexpected ABI info for mixed regs"); 1992 const llvm::Type *TyLo = ST->getElementType(0); 1993 const llvm::Type *TyHi = ST->getElementType(1); 1994 assert((TyLo->isFPOrFPVectorTy() ^ TyHi->isFPOrFPVectorTy()) && 1995 "Unexpected ABI info for mixed regs"); 1996 const llvm::Type *PTyLo = llvm::PointerType::getUnqual(TyLo); 1997 const llvm::Type *PTyHi = llvm::PointerType::getUnqual(TyHi); 1998 llvm::Value *GPAddr = CGF.Builder.CreateGEP(RegAddr, gp_offset); 1999 llvm::Value *FPAddr = CGF.Builder.CreateGEP(RegAddr, fp_offset); 2000 llvm::Value *RegLoAddr = TyLo->isFloatingPointTy() ? FPAddr : GPAddr; 2001 llvm::Value *RegHiAddr = TyLo->isFloatingPointTy() ? GPAddr : FPAddr; 2002 llvm::Value *V = 2003 CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegLoAddr, PTyLo)); 2004 CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 0)); 2005 V = CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegHiAddr, PTyHi)); 2006 CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 1)); 2007 2008 RegAddr = CGF.Builder.CreateBitCast(Tmp, 2009 llvm::PointerType::getUnqual(LTy)); 2010 } else if (neededInt) { 2011 RegAddr = CGF.Builder.CreateGEP(RegAddr, gp_offset); 2012 RegAddr = CGF.Builder.CreateBitCast(RegAddr, 2013 llvm::PointerType::getUnqual(LTy)); 2014 } else if (neededSSE == 1) { 2015 RegAddr = CGF.Builder.CreateGEP(RegAddr, fp_offset); 2016 RegAddr = CGF.Builder.CreateBitCast(RegAddr, 2017 llvm::PointerType::getUnqual(LTy)); 2018 } else { 2019 assert(neededSSE == 2 && "Invalid number of needed registers!"); 2020 // SSE registers are spaced 16 bytes apart in the register save 2021 // area, we need to collect the two eightbytes together. 2022 llvm::Value *RegAddrLo = CGF.Builder.CreateGEP(RegAddr, fp_offset); 2023 llvm::Value *RegAddrHi = CGF.Builder.CreateConstGEP1_32(RegAddrLo, 16); 2024 const llvm::Type *DoubleTy = llvm::Type::getDoubleTy(VMContext); 2025 const llvm::Type *DblPtrTy = 2026 llvm::PointerType::getUnqual(DoubleTy); 2027 const llvm::StructType *ST = llvm::StructType::get(VMContext, DoubleTy, 2028 DoubleTy, NULL); 2029 llvm::Value *V, *Tmp = CGF.CreateTempAlloca(ST); 2030 V = CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegAddrLo, 2031 DblPtrTy)); 2032 CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 0)); 2033 V = CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegAddrHi, 2034 DblPtrTy)); 2035 CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 1)); 2036 RegAddr = CGF.Builder.CreateBitCast(Tmp, 2037 llvm::PointerType::getUnqual(LTy)); 2038 } 2039 2040 // AMD64-ABI 3.5.7p5: Step 5. Set: 2041 // l->gp_offset = l->gp_offset + num_gp * 8 2042 // l->fp_offset = l->fp_offset + num_fp * 16. 2043 if (neededInt) { 2044 llvm::Value *Offset = llvm::ConstantInt::get(CGF.Int32Ty, neededInt * 8); 2045 CGF.Builder.CreateStore(CGF.Builder.CreateAdd(gp_offset, Offset), 2046 gp_offset_p); 2047 } 2048 if (neededSSE) { 2049 llvm::Value *Offset = llvm::ConstantInt::get(CGF.Int32Ty, neededSSE * 16); 2050 CGF.Builder.CreateStore(CGF.Builder.CreateAdd(fp_offset, Offset), 2051 fp_offset_p); 2052 } 2053 CGF.EmitBranch(ContBlock); 2054 2055 // Emit code to load the value if it was passed in memory. 2056 2057 CGF.EmitBlock(InMemBlock); 2058 llvm::Value *MemAddr = EmitVAArgFromMemory(VAListAddr, Ty, CGF); 2059 2060 // Return the appropriate result. 2061 2062 CGF.EmitBlock(ContBlock); 2063 llvm::PHINode *ResAddr = CGF.Builder.CreatePHI(RegAddr->getType(), 2064 "vaarg.addr"); 2065 ResAddr->reserveOperandSpace(2); 2066 ResAddr->addIncoming(RegAddr, InRegBlock); 2067 ResAddr->addIncoming(MemAddr, InMemBlock); 2068 return ResAddr; 2069} 2070 2071ABIArgInfo WinX86_64ABIInfo::classify(QualType Ty) const { 2072 2073 if (Ty->isVoidType()) 2074 return ABIArgInfo::getIgnore(); 2075 2076 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 2077 Ty = EnumTy->getDecl()->getIntegerType(); 2078 2079 uint64_t Size = getContext().getTypeSize(Ty); 2080 2081 if (const RecordType *RT = Ty->getAs<RecordType>()) { 2082 if (hasNonTrivialDestructorOrCopyConstructor(RT) || 2083 RT->getDecl()->hasFlexibleArrayMember()) 2084 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 2085 2086 // FIXME: mingw64-gcc emits 128-bit struct as i128 2087 if (Size <= 128 && 2088 (Size & (Size - 1)) == 0) 2089 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(), 2090 Size)); 2091 2092 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 2093 } 2094 2095 if (Ty->isPromotableIntegerType()) 2096 return ABIArgInfo::getExtend(); 2097 2098 return ABIArgInfo::getDirect(); 2099} 2100 2101void WinX86_64ABIInfo::computeInfo(CGFunctionInfo &FI) const { 2102 2103 QualType RetTy = FI.getReturnType(); 2104 FI.getReturnInfo() = classify(RetTy); 2105 2106 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 2107 it != ie; ++it) 2108 it->info = classify(it->type); 2109} 2110 2111llvm::Value *WinX86_64ABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 2112 CodeGenFunction &CGF) const { 2113 const llvm::Type *BP = llvm::Type::getInt8PtrTy(CGF.getLLVMContext()); 2114 const llvm::Type *BPP = llvm::PointerType::getUnqual(BP); 2115 2116 CGBuilderTy &Builder = CGF.Builder; 2117 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP, 2118 "ap"); 2119 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur"); 2120 llvm::Type *PTy = 2121 llvm::PointerType::getUnqual(CGF.ConvertType(Ty)); 2122 llvm::Value *AddrTyped = Builder.CreateBitCast(Addr, PTy); 2123 2124 uint64_t Offset = 2125 llvm::RoundUpToAlignment(CGF.getContext().getTypeSize(Ty) / 8, 8); 2126 llvm::Value *NextAddr = 2127 Builder.CreateGEP(Addr, llvm::ConstantInt::get(CGF.Int32Ty, Offset), 2128 "ap.next"); 2129 Builder.CreateStore(NextAddr, VAListAddrAsBPP); 2130 2131 return AddrTyped; 2132} 2133 2134// PowerPC-32 2135 2136namespace { 2137class PPC32TargetCodeGenInfo : public DefaultTargetCodeGenInfo { 2138public: 2139 PPC32TargetCodeGenInfo(CodeGenTypes &CGT) : DefaultTargetCodeGenInfo(CGT) {} 2140 2141 int getDwarfEHStackPointer(CodeGen::CodeGenModule &M) const { 2142 // This is recovered from gcc output. 2143 return 1; // r1 is the dedicated stack pointer 2144 } 2145 2146 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 2147 llvm::Value *Address) const; 2148}; 2149 2150} 2151 2152bool 2153PPC32TargetCodeGenInfo::initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 2154 llvm::Value *Address) const { 2155 // This is calculated from the LLVM and GCC tables and verified 2156 // against gcc output. AFAIK all ABIs use the same encoding. 2157 2158 CodeGen::CGBuilderTy &Builder = CGF.Builder; 2159 llvm::LLVMContext &Context = CGF.getLLVMContext(); 2160 2161 const llvm::IntegerType *i8 = llvm::Type::getInt8Ty(Context); 2162 llvm::Value *Four8 = llvm::ConstantInt::get(i8, 4); 2163 llvm::Value *Eight8 = llvm::ConstantInt::get(i8, 8); 2164 llvm::Value *Sixteen8 = llvm::ConstantInt::get(i8, 16); 2165 2166 // 0-31: r0-31, the 4-byte general-purpose registers 2167 AssignToArrayRange(Builder, Address, Four8, 0, 31); 2168 2169 // 32-63: fp0-31, the 8-byte floating-point registers 2170 AssignToArrayRange(Builder, Address, Eight8, 32, 63); 2171 2172 // 64-76 are various 4-byte special-purpose registers: 2173 // 64: mq 2174 // 65: lr 2175 // 66: ctr 2176 // 67: ap 2177 // 68-75 cr0-7 2178 // 76: xer 2179 AssignToArrayRange(Builder, Address, Four8, 64, 76); 2180 2181 // 77-108: v0-31, the 16-byte vector registers 2182 AssignToArrayRange(Builder, Address, Sixteen8, 77, 108); 2183 2184 // 109: vrsave 2185 // 110: vscr 2186 // 111: spe_acc 2187 // 112: spefscr 2188 // 113: sfp 2189 AssignToArrayRange(Builder, Address, Four8, 109, 113); 2190 2191 return false; 2192} 2193 2194 2195//===----------------------------------------------------------------------===// 2196// ARM ABI Implementation 2197//===----------------------------------------------------------------------===// 2198 2199namespace { 2200 2201class ARMABIInfo : public ABIInfo { 2202public: 2203 enum ABIKind { 2204 APCS = 0, 2205 AAPCS = 1, 2206 AAPCS_VFP 2207 }; 2208 2209private: 2210 ABIKind Kind; 2211 2212public: 2213 ARMABIInfo(CodeGenTypes &CGT, ABIKind _Kind) : ABIInfo(CGT), Kind(_Kind) {} 2214 2215private: 2216 ABIKind getABIKind() const { return Kind; } 2217 2218 ABIArgInfo classifyReturnType(QualType RetTy) const; 2219 ABIArgInfo classifyArgumentType(QualType RetTy) const; 2220 2221 virtual void computeInfo(CGFunctionInfo &FI) const; 2222 2223 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 2224 CodeGenFunction &CGF) const; 2225}; 2226 2227class ARMTargetCodeGenInfo : public TargetCodeGenInfo { 2228public: 2229 ARMTargetCodeGenInfo(CodeGenTypes &CGT, ARMABIInfo::ABIKind K) 2230 :TargetCodeGenInfo(new ARMABIInfo(CGT, K)) {} 2231 2232 int getDwarfEHStackPointer(CodeGen::CodeGenModule &M) const { 2233 return 13; 2234 } 2235}; 2236 2237} 2238 2239void ARMABIInfo::computeInfo(CGFunctionInfo &FI) const { 2240 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 2241 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 2242 it != ie; ++it) 2243 it->info = classifyArgumentType(it->type); 2244 2245 const llvm::Triple &Triple(getContext().Target.getTriple()); 2246 llvm::CallingConv::ID DefaultCC; 2247 if (Triple.getEnvironmentName() == "gnueabi" || 2248 Triple.getEnvironmentName() == "eabi") 2249 DefaultCC = llvm::CallingConv::ARM_AAPCS; 2250 else 2251 DefaultCC = llvm::CallingConv::ARM_APCS; 2252 2253 switch (getABIKind()) { 2254 case APCS: 2255 if (DefaultCC != llvm::CallingConv::ARM_APCS) 2256 FI.setEffectiveCallingConvention(llvm::CallingConv::ARM_APCS); 2257 break; 2258 2259 case AAPCS: 2260 if (DefaultCC != llvm::CallingConv::ARM_AAPCS) 2261 FI.setEffectiveCallingConvention(llvm::CallingConv::ARM_AAPCS); 2262 break; 2263 2264 case AAPCS_VFP: 2265 FI.setEffectiveCallingConvention(llvm::CallingConv::ARM_AAPCS_VFP); 2266 break; 2267 } 2268} 2269 2270ABIArgInfo ARMABIInfo::classifyArgumentType(QualType Ty) const { 2271 if (!isAggregateTypeForABI(Ty)) { 2272 // Treat an enum type as its underlying type. 2273 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 2274 Ty = EnumTy->getDecl()->getIntegerType(); 2275 2276 return (Ty->isPromotableIntegerType() ? 2277 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 2278 } 2279 2280 // Ignore empty records. 2281 if (isEmptyRecord(getContext(), Ty, true)) 2282 return ABIArgInfo::getIgnore(); 2283 2284 // Structures with either a non-trivial destructor or a non-trivial 2285 // copy constructor are always indirect. 2286 if (isRecordWithNonTrivialDestructorOrCopyConstructor(Ty)) 2287 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 2288 2289 // Otherwise, pass by coercing to a structure of the appropriate size. 2290 // 2291 // FIXME: This is kind of nasty... but there isn't much choice because the ARM 2292 // backend doesn't support byval. 2293 // FIXME: This doesn't handle alignment > 64 bits. 2294 const llvm::Type* ElemTy; 2295 unsigned SizeRegs; 2296 if (getContext().getTypeAlign(Ty) > 32) { 2297 ElemTy = llvm::Type::getInt64Ty(getVMContext()); 2298 SizeRegs = (getContext().getTypeSize(Ty) + 63) / 64; 2299 } else { 2300 ElemTy = llvm::Type::getInt32Ty(getVMContext()); 2301 SizeRegs = (getContext().getTypeSize(Ty) + 31) / 32; 2302 } 2303 std::vector<const llvm::Type*> LLVMFields; 2304 LLVMFields.push_back(llvm::ArrayType::get(ElemTy, SizeRegs)); 2305 const llvm::Type* STy = llvm::StructType::get(getVMContext(), LLVMFields, 2306 true); 2307 return ABIArgInfo::getDirect(STy); 2308} 2309 2310static bool isIntegerLikeType(QualType Ty, ASTContext &Context, 2311 llvm::LLVMContext &VMContext) { 2312 // APCS, C Language Calling Conventions, Non-Simple Return Values: A structure 2313 // is called integer-like if its size is less than or equal to one word, and 2314 // the offset of each of its addressable sub-fields is zero. 2315 2316 uint64_t Size = Context.getTypeSize(Ty); 2317 2318 // Check that the type fits in a word. 2319 if (Size > 32) 2320 return false; 2321 2322 // FIXME: Handle vector types! 2323 if (Ty->isVectorType()) 2324 return false; 2325 2326 // Float types are never treated as "integer like". 2327 if (Ty->isRealFloatingType()) 2328 return false; 2329 2330 // If this is a builtin or pointer type then it is ok. 2331 if (Ty->getAs<BuiltinType>() || Ty->isPointerType()) 2332 return true; 2333 2334 // Small complex integer types are "integer like". 2335 if (const ComplexType *CT = Ty->getAs<ComplexType>()) 2336 return isIntegerLikeType(CT->getElementType(), Context, VMContext); 2337 2338 // Single element and zero sized arrays should be allowed, by the definition 2339 // above, but they are not. 2340 2341 // Otherwise, it must be a record type. 2342 const RecordType *RT = Ty->getAs<RecordType>(); 2343 if (!RT) return false; 2344 2345 // Ignore records with flexible arrays. 2346 const RecordDecl *RD = RT->getDecl(); 2347 if (RD->hasFlexibleArrayMember()) 2348 return false; 2349 2350 // Check that all sub-fields are at offset 0, and are themselves "integer 2351 // like". 2352 const ASTRecordLayout &Layout = Context.getASTRecordLayout(RD); 2353 2354 bool HadField = false; 2355 unsigned idx = 0; 2356 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 2357 i != e; ++i, ++idx) { 2358 const FieldDecl *FD = *i; 2359 2360 // Bit-fields are not addressable, we only need to verify they are "integer 2361 // like". We still have to disallow a subsequent non-bitfield, for example: 2362 // struct { int : 0; int x } 2363 // is non-integer like according to gcc. 2364 if (FD->isBitField()) { 2365 if (!RD->isUnion()) 2366 HadField = true; 2367 2368 if (!isIntegerLikeType(FD->getType(), Context, VMContext)) 2369 return false; 2370 2371 continue; 2372 } 2373 2374 // Check if this field is at offset 0. 2375 if (Layout.getFieldOffset(idx) != 0) 2376 return false; 2377 2378 if (!isIntegerLikeType(FD->getType(), Context, VMContext)) 2379 return false; 2380 2381 // Only allow at most one field in a structure. This doesn't match the 2382 // wording above, but follows gcc in situations with a field following an 2383 // empty structure. 2384 if (!RD->isUnion()) { 2385 if (HadField) 2386 return false; 2387 2388 HadField = true; 2389 } 2390 } 2391 2392 return true; 2393} 2394 2395ABIArgInfo ARMABIInfo::classifyReturnType(QualType RetTy) const { 2396 if (RetTy->isVoidType()) 2397 return ABIArgInfo::getIgnore(); 2398 2399 // Large vector types should be returned via memory. 2400 if (RetTy->isVectorType() && getContext().getTypeSize(RetTy) > 128) 2401 return ABIArgInfo::getIndirect(0); 2402 2403 if (!isAggregateTypeForABI(RetTy)) { 2404 // Treat an enum type as its underlying type. 2405 if (const EnumType *EnumTy = RetTy->getAs<EnumType>()) 2406 RetTy = EnumTy->getDecl()->getIntegerType(); 2407 2408 return (RetTy->isPromotableIntegerType() ? 2409 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 2410 } 2411 2412 // Structures with either a non-trivial destructor or a non-trivial 2413 // copy constructor are always indirect. 2414 if (isRecordWithNonTrivialDestructorOrCopyConstructor(RetTy)) 2415 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 2416 2417 // Are we following APCS? 2418 if (getABIKind() == APCS) { 2419 if (isEmptyRecord(getContext(), RetTy, false)) 2420 return ABIArgInfo::getIgnore(); 2421 2422 // Complex types are all returned as packed integers. 2423 // 2424 // FIXME: Consider using 2 x vector types if the back end handles them 2425 // correctly. 2426 if (RetTy->isAnyComplexType()) 2427 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(), 2428 getContext().getTypeSize(RetTy))); 2429 2430 // Integer like structures are returned in r0. 2431 if (isIntegerLikeType(RetTy, getContext(), getVMContext())) { 2432 // Return in the smallest viable integer type. 2433 uint64_t Size = getContext().getTypeSize(RetTy); 2434 if (Size <= 8) 2435 return ABIArgInfo::getDirect(llvm::Type::getInt8Ty(getVMContext())); 2436 if (Size <= 16) 2437 return ABIArgInfo::getDirect(llvm::Type::getInt16Ty(getVMContext())); 2438 return ABIArgInfo::getDirect(llvm::Type::getInt32Ty(getVMContext())); 2439 } 2440 2441 // Otherwise return in memory. 2442 return ABIArgInfo::getIndirect(0); 2443 } 2444 2445 // Otherwise this is an AAPCS variant. 2446 2447 if (isEmptyRecord(getContext(), RetTy, true)) 2448 return ABIArgInfo::getIgnore(); 2449 2450 // Aggregates <= 4 bytes are returned in r0; other aggregates 2451 // are returned indirectly. 2452 uint64_t Size = getContext().getTypeSize(RetTy); 2453 if (Size <= 32) { 2454 // Return in the smallest viable integer type. 2455 if (Size <= 8) 2456 return ABIArgInfo::getDirect(llvm::Type::getInt8Ty(getVMContext())); 2457 if (Size <= 16) 2458 return ABIArgInfo::getDirect(llvm::Type::getInt16Ty(getVMContext())); 2459 return ABIArgInfo::getDirect(llvm::Type::getInt32Ty(getVMContext())); 2460 } 2461 2462 return ABIArgInfo::getIndirect(0); 2463} 2464 2465llvm::Value *ARMABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 2466 CodeGenFunction &CGF) const { 2467 // FIXME: Need to handle alignment 2468 const llvm::Type *BP = llvm::Type::getInt8PtrTy(CGF.getLLVMContext()); 2469 const llvm::Type *BPP = llvm::PointerType::getUnqual(BP); 2470 2471 CGBuilderTy &Builder = CGF.Builder; 2472 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP, 2473 "ap"); 2474 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur"); 2475 llvm::Type *PTy = 2476 llvm::PointerType::getUnqual(CGF.ConvertType(Ty)); 2477 llvm::Value *AddrTyped = Builder.CreateBitCast(Addr, PTy); 2478 2479 uint64_t Offset = 2480 llvm::RoundUpToAlignment(CGF.getContext().getTypeSize(Ty) / 8, 4); 2481 llvm::Value *NextAddr = 2482 Builder.CreateGEP(Addr, llvm::ConstantInt::get(CGF.Int32Ty, Offset), 2483 "ap.next"); 2484 Builder.CreateStore(NextAddr, VAListAddrAsBPP); 2485 2486 return AddrTyped; 2487} 2488 2489//===----------------------------------------------------------------------===// 2490// SystemZ ABI Implementation 2491//===----------------------------------------------------------------------===// 2492 2493namespace { 2494 2495class SystemZABIInfo : public ABIInfo { 2496public: 2497 SystemZABIInfo(CodeGenTypes &CGT) : ABIInfo(CGT) {} 2498 2499 bool isPromotableIntegerType(QualType Ty) const; 2500 2501 ABIArgInfo classifyReturnType(QualType RetTy) const; 2502 ABIArgInfo classifyArgumentType(QualType RetTy) const; 2503 2504 virtual void computeInfo(CGFunctionInfo &FI) const { 2505 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 2506 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 2507 it != ie; ++it) 2508 it->info = classifyArgumentType(it->type); 2509 } 2510 2511 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 2512 CodeGenFunction &CGF) const; 2513}; 2514 2515class SystemZTargetCodeGenInfo : public TargetCodeGenInfo { 2516public: 2517 SystemZTargetCodeGenInfo(CodeGenTypes &CGT) 2518 : TargetCodeGenInfo(new SystemZABIInfo(CGT)) {} 2519}; 2520 2521} 2522 2523bool SystemZABIInfo::isPromotableIntegerType(QualType Ty) const { 2524 // SystemZ ABI requires all 8, 16 and 32 bit quantities to be extended. 2525 if (const BuiltinType *BT = Ty->getAs<BuiltinType>()) 2526 switch (BT->getKind()) { 2527 case BuiltinType::Bool: 2528 case BuiltinType::Char_S: 2529 case BuiltinType::Char_U: 2530 case BuiltinType::SChar: 2531 case BuiltinType::UChar: 2532 case BuiltinType::Short: 2533 case BuiltinType::UShort: 2534 case BuiltinType::Int: 2535 case BuiltinType::UInt: 2536 return true; 2537 default: 2538 return false; 2539 } 2540 return false; 2541} 2542 2543llvm::Value *SystemZABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 2544 CodeGenFunction &CGF) const { 2545 // FIXME: Implement 2546 return 0; 2547} 2548 2549 2550ABIArgInfo SystemZABIInfo::classifyReturnType(QualType RetTy) const { 2551 if (RetTy->isVoidType()) 2552 return ABIArgInfo::getIgnore(); 2553 if (isAggregateTypeForABI(RetTy)) 2554 return ABIArgInfo::getIndirect(0); 2555 2556 return (isPromotableIntegerType(RetTy) ? 2557 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 2558} 2559 2560ABIArgInfo SystemZABIInfo::classifyArgumentType(QualType Ty) const { 2561 if (isAggregateTypeForABI(Ty)) 2562 return ABIArgInfo::getIndirect(0); 2563 2564 return (isPromotableIntegerType(Ty) ? 2565 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 2566} 2567 2568//===----------------------------------------------------------------------===// 2569// MBlaze ABI Implementation 2570//===----------------------------------------------------------------------===// 2571 2572namespace { 2573 2574class MBlazeABIInfo : public ABIInfo { 2575public: 2576 MBlazeABIInfo(CodeGenTypes &CGT) : ABIInfo(CGT) {} 2577 2578 bool isPromotableIntegerType(QualType Ty) const; 2579 2580 ABIArgInfo classifyReturnType(QualType RetTy) const; 2581 ABIArgInfo classifyArgumentType(QualType RetTy) const; 2582 2583 virtual void computeInfo(CGFunctionInfo &FI) const { 2584 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 2585 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 2586 it != ie; ++it) 2587 it->info = classifyArgumentType(it->type); 2588 } 2589 2590 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 2591 CodeGenFunction &CGF) const; 2592}; 2593 2594class MBlazeTargetCodeGenInfo : public TargetCodeGenInfo { 2595public: 2596 MBlazeTargetCodeGenInfo(CodeGenTypes &CGT) 2597 : TargetCodeGenInfo(new MBlazeABIInfo(CGT)) {} 2598 void SetTargetAttributes(const Decl *D, llvm::GlobalValue *GV, 2599 CodeGen::CodeGenModule &M) const; 2600}; 2601 2602} 2603 2604bool MBlazeABIInfo::isPromotableIntegerType(QualType Ty) const { 2605 // MBlaze ABI requires all 8 and 16 bit quantities to be extended. 2606 if (const BuiltinType *BT = Ty->getAs<BuiltinType>()) 2607 switch (BT->getKind()) { 2608 case BuiltinType::Bool: 2609 case BuiltinType::Char_S: 2610 case BuiltinType::Char_U: 2611 case BuiltinType::SChar: 2612 case BuiltinType::UChar: 2613 case BuiltinType::Short: 2614 case BuiltinType::UShort: 2615 return true; 2616 default: 2617 return false; 2618 } 2619 return false; 2620} 2621 2622llvm::Value *MBlazeABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 2623 CodeGenFunction &CGF) const { 2624 // FIXME: Implement 2625 return 0; 2626} 2627 2628 2629ABIArgInfo MBlazeABIInfo::classifyReturnType(QualType RetTy) const { 2630 if (RetTy->isVoidType()) 2631 return ABIArgInfo::getIgnore(); 2632 if (isAggregateTypeForABI(RetTy)) 2633 return ABIArgInfo::getIndirect(0); 2634 2635 return (isPromotableIntegerType(RetTy) ? 2636 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 2637} 2638 2639ABIArgInfo MBlazeABIInfo::classifyArgumentType(QualType Ty) const { 2640 if (isAggregateTypeForABI(Ty)) 2641 return ABIArgInfo::getIndirect(0); 2642 2643 return (isPromotableIntegerType(Ty) ? 2644 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 2645} 2646 2647void MBlazeTargetCodeGenInfo::SetTargetAttributes(const Decl *D, 2648 llvm::GlobalValue *GV, 2649 CodeGen::CodeGenModule &M) 2650 const { 2651 const FunctionDecl *FD = dyn_cast<FunctionDecl>(D); 2652 if (!FD) return; 2653 2654 llvm::CallingConv::ID CC = llvm::CallingConv::C; 2655 if (FD->hasAttr<MBlazeInterruptHandlerAttr>()) 2656 CC = llvm::CallingConv::MBLAZE_INTR; 2657 else if (FD->hasAttr<MBlazeSaveVolatilesAttr>()) 2658 CC = llvm::CallingConv::MBLAZE_SVOL; 2659 2660 if (CC != llvm::CallingConv::C) { 2661 // Handle 'interrupt_handler' attribute: 2662 llvm::Function *F = cast<llvm::Function>(GV); 2663 2664 // Step 1: Set ISR calling convention. 2665 F->setCallingConv(CC); 2666 2667 // Step 2: Add attributes goodness. 2668 F->addFnAttr(llvm::Attribute::NoInline); 2669 } 2670 2671 // Step 3: Emit _interrupt_handler alias. 2672 if (CC == llvm::CallingConv::MBLAZE_INTR) 2673 new llvm::GlobalAlias(GV->getType(), llvm::Function::ExternalLinkage, 2674 "_interrupt_handler", GV, &M.getModule()); 2675} 2676 2677 2678//===----------------------------------------------------------------------===// 2679// MSP430 ABI Implementation 2680//===----------------------------------------------------------------------===// 2681 2682namespace { 2683 2684class MSP430TargetCodeGenInfo : public TargetCodeGenInfo { 2685public: 2686 MSP430TargetCodeGenInfo(CodeGenTypes &CGT) 2687 : TargetCodeGenInfo(new DefaultABIInfo(CGT)) {} 2688 void SetTargetAttributes(const Decl *D, llvm::GlobalValue *GV, 2689 CodeGen::CodeGenModule &M) const; 2690}; 2691 2692} 2693 2694void MSP430TargetCodeGenInfo::SetTargetAttributes(const Decl *D, 2695 llvm::GlobalValue *GV, 2696 CodeGen::CodeGenModule &M) const { 2697 if (const FunctionDecl *FD = dyn_cast<FunctionDecl>(D)) { 2698 if (const MSP430InterruptAttr *attr = FD->getAttr<MSP430InterruptAttr>()) { 2699 // Handle 'interrupt' attribute: 2700 llvm::Function *F = cast<llvm::Function>(GV); 2701 2702 // Step 1: Set ISR calling convention. 2703 F->setCallingConv(llvm::CallingConv::MSP430_INTR); 2704 2705 // Step 2: Add attributes goodness. 2706 F->addFnAttr(llvm::Attribute::NoInline); 2707 2708 // Step 3: Emit ISR vector alias. 2709 unsigned Num = attr->getNumber() + 0xffe0; 2710 new llvm::GlobalAlias(GV->getType(), llvm::Function::ExternalLinkage, 2711 "vector_" + llvm::Twine::utohexstr(Num), 2712 GV, &M.getModule()); 2713 } 2714 } 2715} 2716 2717//===----------------------------------------------------------------------===// 2718// MIPS ABI Implementation. This works for both little-endian and 2719// big-endian variants. 2720//===----------------------------------------------------------------------===// 2721 2722namespace { 2723class MIPSTargetCodeGenInfo : public TargetCodeGenInfo { 2724public: 2725 MIPSTargetCodeGenInfo(CodeGenTypes &CGT) 2726 : TargetCodeGenInfo(new DefaultABIInfo(CGT)) {} 2727 2728 int getDwarfEHStackPointer(CodeGen::CodeGenModule &CGM) const { 2729 return 29; 2730 } 2731 2732 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 2733 llvm::Value *Address) const; 2734}; 2735} 2736 2737bool 2738MIPSTargetCodeGenInfo::initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 2739 llvm::Value *Address) const { 2740 // This information comes from gcc's implementation, which seems to 2741 // as canonical as it gets. 2742 2743 CodeGen::CGBuilderTy &Builder = CGF.Builder; 2744 llvm::LLVMContext &Context = CGF.getLLVMContext(); 2745 2746 // Everything on MIPS is 4 bytes. Double-precision FP registers 2747 // are aliased to pairs of single-precision FP registers. 2748 const llvm::IntegerType *i8 = llvm::Type::getInt8Ty(Context); 2749 llvm::Value *Four8 = llvm::ConstantInt::get(i8, 4); 2750 2751 // 0-31 are the general purpose registers, $0 - $31. 2752 // 32-63 are the floating-point registers, $f0 - $f31. 2753 // 64 and 65 are the multiply/divide registers, $hi and $lo. 2754 // 66 is the (notional, I think) register for signal-handler return. 2755 AssignToArrayRange(Builder, Address, Four8, 0, 65); 2756 2757 // 67-74 are the floating-point status registers, $fcc0 - $fcc7. 2758 // They are one bit wide and ignored here. 2759 2760 // 80-111 are the coprocessor 0 registers, $c0r0 - $c0r31. 2761 // (coprocessor 1 is the FP unit) 2762 // 112-143 are the coprocessor 2 registers, $c2r0 - $c2r31. 2763 // 144-175 are the coprocessor 3 registers, $c3r0 - $c3r31. 2764 // 176-181 are the DSP accumulator registers. 2765 AssignToArrayRange(Builder, Address, Four8, 80, 181); 2766 2767 return false; 2768} 2769 2770 2771const TargetCodeGenInfo &CodeGenModule::getTargetCodeGenInfo() { 2772 if (TheTargetCodeGenInfo) 2773 return *TheTargetCodeGenInfo; 2774 2775 // For now we just cache the TargetCodeGenInfo in CodeGenModule and don't 2776 // free it. 2777 2778 const llvm::Triple &Triple = getContext().Target.getTriple(); 2779 switch (Triple.getArch()) { 2780 default: 2781 return *(TheTargetCodeGenInfo = new DefaultTargetCodeGenInfo(Types)); 2782 2783 case llvm::Triple::mips: 2784 case llvm::Triple::mipsel: 2785 return *(TheTargetCodeGenInfo = new MIPSTargetCodeGenInfo(Types)); 2786 2787 case llvm::Triple::arm: 2788 case llvm::Triple::thumb: 2789 // FIXME: We want to know the float calling convention as well. 2790 if (strcmp(getContext().Target.getABI(), "apcs-gnu") == 0) 2791 return *(TheTargetCodeGenInfo = 2792 new ARMTargetCodeGenInfo(Types, ARMABIInfo::APCS)); 2793 2794 return *(TheTargetCodeGenInfo = 2795 new ARMTargetCodeGenInfo(Types, ARMABIInfo::AAPCS)); 2796 2797 case llvm::Triple::ppc: 2798 return *(TheTargetCodeGenInfo = new PPC32TargetCodeGenInfo(Types)); 2799 2800 case llvm::Triple::systemz: 2801 return *(TheTargetCodeGenInfo = new SystemZTargetCodeGenInfo(Types)); 2802 2803 case llvm::Triple::mblaze: 2804 return *(TheTargetCodeGenInfo = new MBlazeTargetCodeGenInfo(Types)); 2805 2806 case llvm::Triple::msp430: 2807 return *(TheTargetCodeGenInfo = new MSP430TargetCodeGenInfo(Types)); 2808 2809 case llvm::Triple::x86: 2810 switch (Triple.getOS()) { 2811 case llvm::Triple::Darwin: 2812 return *(TheTargetCodeGenInfo = 2813 new X86_32TargetCodeGenInfo(Types, true, true)); 2814 case llvm::Triple::Cygwin: 2815 case llvm::Triple::MinGW32: 2816 case llvm::Triple::AuroraUX: 2817 case llvm::Triple::DragonFly: 2818 case llvm::Triple::FreeBSD: 2819 case llvm::Triple::OpenBSD: 2820 case llvm::Triple::NetBSD: 2821 return *(TheTargetCodeGenInfo = 2822 new X86_32TargetCodeGenInfo(Types, false, true)); 2823 2824 default: 2825 return *(TheTargetCodeGenInfo = 2826 new X86_32TargetCodeGenInfo(Types, false, false)); 2827 } 2828 2829 case llvm::Triple::x86_64: 2830 switch (Triple.getOS()) { 2831 case llvm::Triple::Win32: 2832 case llvm::Triple::MinGW64: 2833 case llvm::Triple::Cygwin: 2834 return *(TheTargetCodeGenInfo = new WinX86_64TargetCodeGenInfo(Types)); 2835 default: 2836 return *(TheTargetCodeGenInfo = new X86_64TargetCodeGenInfo(Types)); 2837 } 2838 } 2839} 2840