TargetInfo.cpp revision a34e92116581531f7325527d952a9ffcc819d905
1//===---- TargetInfo.cpp - Encapsulate target details -----------*- C++ -*-===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// These classes wrap the information about a call or function 11// definition used to handle ABI compliancy. 12// 13//===----------------------------------------------------------------------===// 14 15#include "TargetInfo.h" 16#include "ABIInfo.h" 17#include "CodeGenFunction.h" 18#include "clang/AST/RecordLayout.h" 19#include "clang/Frontend/CodeGenOptions.h" 20#include "llvm/Type.h" 21#include "llvm/Target/TargetData.h" 22#include "llvm/ADT/Triple.h" 23#include "llvm/Support/raw_ostream.h" 24using namespace clang; 25using namespace CodeGen; 26 27static void AssignToArrayRange(CodeGen::CGBuilderTy &Builder, 28 llvm::Value *Array, 29 llvm::Value *Value, 30 unsigned FirstIndex, 31 unsigned LastIndex) { 32 // Alternatively, we could emit this as a loop in the source. 33 for (unsigned I = FirstIndex; I <= LastIndex; ++I) { 34 llvm::Value *Cell = Builder.CreateConstInBoundsGEP1_32(Array, I); 35 Builder.CreateStore(Value, Cell); 36 } 37} 38 39static bool isAggregateTypeForABI(QualType T) { 40 return CodeGenFunction::hasAggregateLLVMType(T) || 41 T->isMemberFunctionPointerType(); 42} 43 44ABIInfo::~ABIInfo() {} 45 46ASTContext &ABIInfo::getContext() const { 47 return CGT.getContext(); 48} 49 50llvm::LLVMContext &ABIInfo::getVMContext() const { 51 return CGT.getLLVMContext(); 52} 53 54const llvm::TargetData &ABIInfo::getTargetData() const { 55 return CGT.getTargetData(); 56} 57 58 59void ABIArgInfo::dump() const { 60 raw_ostream &OS = llvm::errs(); 61 OS << "(ABIArgInfo Kind="; 62 switch (TheKind) { 63 case Direct: 64 OS << "Direct Type="; 65 if (llvm::Type *Ty = getCoerceToType()) 66 Ty->print(OS); 67 else 68 OS << "null"; 69 break; 70 case Extend: 71 OS << "Extend"; 72 break; 73 case Ignore: 74 OS << "Ignore"; 75 break; 76 case Indirect: 77 OS << "Indirect Align=" << getIndirectAlign() 78 << " ByVal=" << getIndirectByVal() 79 << " Realign=" << getIndirectRealign(); 80 break; 81 case Expand: 82 OS << "Expand"; 83 break; 84 } 85 OS << ")\n"; 86} 87 88TargetCodeGenInfo::~TargetCodeGenInfo() { delete Info; } 89 90// If someone can figure out a general rule for this, that would be great. 91// It's probably just doomed to be platform-dependent, though. 92unsigned TargetCodeGenInfo::getSizeOfUnwindException() const { 93 // Verified for: 94 // x86-64 FreeBSD, Linux, Darwin 95 // x86-32 FreeBSD, Linux, Darwin 96 // PowerPC Linux, Darwin 97 // ARM Darwin (*not* EABI) 98 return 32; 99} 100 101bool TargetCodeGenInfo::isNoProtoCallVariadic( 102 const CodeGen::CGFunctionInfo &) const { 103 // The following conventions are known to require this to be false: 104 // x86_stdcall 105 // MIPS 106 // For everything else, we just prefer false unless we opt out. 107 return false; 108} 109 110static bool isEmptyRecord(ASTContext &Context, QualType T, bool AllowArrays); 111 112/// isEmptyField - Return true iff a the field is "empty", that is it 113/// is an unnamed bit-field or an (array of) empty record(s). 114static bool isEmptyField(ASTContext &Context, const FieldDecl *FD, 115 bool AllowArrays) { 116 if (FD->isUnnamedBitfield()) 117 return true; 118 119 QualType FT = FD->getType(); 120 121 // Constant arrays of empty records count as empty, strip them off. 122 // Constant arrays of zero length always count as empty. 123 if (AllowArrays) 124 while (const ConstantArrayType *AT = Context.getAsConstantArrayType(FT)) { 125 if (AT->getSize() == 0) 126 return true; 127 FT = AT->getElementType(); 128 } 129 130 const RecordType *RT = FT->getAs<RecordType>(); 131 if (!RT) 132 return false; 133 134 // C++ record fields are never empty, at least in the Itanium ABI. 135 // 136 // FIXME: We should use a predicate for whether this behavior is true in the 137 // current ABI. 138 if (isa<CXXRecordDecl>(RT->getDecl())) 139 return false; 140 141 return isEmptyRecord(Context, FT, AllowArrays); 142} 143 144/// isEmptyRecord - Return true iff a structure contains only empty 145/// fields. Note that a structure with a flexible array member is not 146/// considered empty. 147static bool isEmptyRecord(ASTContext &Context, QualType T, bool AllowArrays) { 148 const RecordType *RT = T->getAs<RecordType>(); 149 if (!RT) 150 return 0; 151 const RecordDecl *RD = RT->getDecl(); 152 if (RD->hasFlexibleArrayMember()) 153 return false; 154 155 // If this is a C++ record, check the bases first. 156 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) 157 for (CXXRecordDecl::base_class_const_iterator i = CXXRD->bases_begin(), 158 e = CXXRD->bases_end(); i != e; ++i) 159 if (!isEmptyRecord(Context, i->getType(), true)) 160 return false; 161 162 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 163 i != e; ++i) 164 if (!isEmptyField(Context, *i, AllowArrays)) 165 return false; 166 return true; 167} 168 169/// hasNonTrivialDestructorOrCopyConstructor - Determine if a type has either 170/// a non-trivial destructor or a non-trivial copy constructor. 171static bool hasNonTrivialDestructorOrCopyConstructor(const RecordType *RT) { 172 const CXXRecordDecl *RD = dyn_cast<CXXRecordDecl>(RT->getDecl()); 173 if (!RD) 174 return false; 175 176 return !RD->hasTrivialDestructor() || !RD->hasTrivialCopyConstructor(); 177} 178 179/// isRecordWithNonTrivialDestructorOrCopyConstructor - Determine if a type is 180/// a record type with either a non-trivial destructor or a non-trivial copy 181/// constructor. 182static bool isRecordWithNonTrivialDestructorOrCopyConstructor(QualType T) { 183 const RecordType *RT = T->getAs<RecordType>(); 184 if (!RT) 185 return false; 186 187 return hasNonTrivialDestructorOrCopyConstructor(RT); 188} 189 190/// isSingleElementStruct - Determine if a structure is a "single 191/// element struct", i.e. it has exactly one non-empty field or 192/// exactly one field which is itself a single element 193/// struct. Structures with flexible array members are never 194/// considered single element structs. 195/// 196/// \return The field declaration for the single non-empty field, if 197/// it exists. 198static const Type *isSingleElementStruct(QualType T, ASTContext &Context) { 199 const RecordType *RT = T->getAsStructureType(); 200 if (!RT) 201 return 0; 202 203 const RecordDecl *RD = RT->getDecl(); 204 if (RD->hasFlexibleArrayMember()) 205 return 0; 206 207 const Type *Found = 0; 208 209 // If this is a C++ record, check the bases first. 210 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) { 211 for (CXXRecordDecl::base_class_const_iterator i = CXXRD->bases_begin(), 212 e = CXXRD->bases_end(); i != e; ++i) { 213 // Ignore empty records. 214 if (isEmptyRecord(Context, i->getType(), true)) 215 continue; 216 217 // If we already found an element then this isn't a single-element struct. 218 if (Found) 219 return 0; 220 221 // If this is non-empty and not a single element struct, the composite 222 // cannot be a single element struct. 223 Found = isSingleElementStruct(i->getType(), Context); 224 if (!Found) 225 return 0; 226 } 227 } 228 229 // Check for single element. 230 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 231 i != e; ++i) { 232 const FieldDecl *FD = *i; 233 QualType FT = FD->getType(); 234 235 // Ignore empty fields. 236 if (isEmptyField(Context, FD, true)) 237 continue; 238 239 // If we already found an element then this isn't a single-element 240 // struct. 241 if (Found) 242 return 0; 243 244 // Treat single element arrays as the element. 245 while (const ConstantArrayType *AT = Context.getAsConstantArrayType(FT)) { 246 if (AT->getSize().getZExtValue() != 1) 247 break; 248 FT = AT->getElementType(); 249 } 250 251 if (!isAggregateTypeForABI(FT)) { 252 Found = FT.getTypePtr(); 253 } else { 254 Found = isSingleElementStruct(FT, Context); 255 if (!Found) 256 return 0; 257 } 258 } 259 260 // We don't consider a struct a single-element struct if it has 261 // padding beyond the element type. 262 if (Found && Context.getTypeSize(Found) != Context.getTypeSize(T)) 263 return 0; 264 265 return Found; 266} 267 268static bool is32Or64BitBasicType(QualType Ty, ASTContext &Context) { 269 if (!Ty->getAs<BuiltinType>() && !Ty->hasPointerRepresentation() && 270 !Ty->isAnyComplexType() && !Ty->isEnumeralType() && 271 !Ty->isBlockPointerType()) 272 return false; 273 274 uint64_t Size = Context.getTypeSize(Ty); 275 return Size == 32 || Size == 64; 276} 277 278/// canExpandIndirectArgument - Test whether an argument type which is to be 279/// passed indirectly (on the stack) would have the equivalent layout if it was 280/// expanded into separate arguments. If so, we prefer to do the latter to avoid 281/// inhibiting optimizations. 282/// 283// FIXME: This predicate is missing many cases, currently it just follows 284// llvm-gcc (checks that all fields are 32-bit or 64-bit primitive types). We 285// should probably make this smarter, or better yet make the LLVM backend 286// capable of handling it. 287static bool canExpandIndirectArgument(QualType Ty, ASTContext &Context) { 288 // We can only expand structure types. 289 const RecordType *RT = Ty->getAs<RecordType>(); 290 if (!RT) 291 return false; 292 293 // We can only expand (C) structures. 294 // 295 // FIXME: This needs to be generalized to handle classes as well. 296 const RecordDecl *RD = RT->getDecl(); 297 if (!RD->isStruct() || isa<CXXRecordDecl>(RD)) 298 return false; 299 300 uint64_t Size = 0; 301 302 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 303 i != e; ++i) { 304 const FieldDecl *FD = *i; 305 306 if (!is32Or64BitBasicType(FD->getType(), Context)) 307 return false; 308 309 // FIXME: Reject bit-fields wholesale; there are two problems, we don't know 310 // how to expand them yet, and the predicate for telling if a bitfield still 311 // counts as "basic" is more complicated than what we were doing previously. 312 if (FD->isBitField()) 313 return false; 314 315 Size += Context.getTypeSize(FD->getType()); 316 } 317 318 // Make sure there are not any holes in the struct. 319 if (Size != Context.getTypeSize(Ty)) 320 return false; 321 322 return true; 323} 324 325namespace { 326/// DefaultABIInfo - The default implementation for ABI specific 327/// details. This implementation provides information which results in 328/// self-consistent and sensible LLVM IR generation, but does not 329/// conform to any particular ABI. 330class DefaultABIInfo : public ABIInfo { 331public: 332 DefaultABIInfo(CodeGen::CodeGenTypes &CGT) : ABIInfo(CGT) {} 333 334 ABIArgInfo classifyReturnType(QualType RetTy) const; 335 ABIArgInfo classifyArgumentType(QualType RetTy) const; 336 337 virtual void computeInfo(CGFunctionInfo &FI) const { 338 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 339 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 340 it != ie; ++it) 341 it->info = classifyArgumentType(it->type); 342 } 343 344 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 345 CodeGenFunction &CGF) const; 346}; 347 348class DefaultTargetCodeGenInfo : public TargetCodeGenInfo { 349public: 350 DefaultTargetCodeGenInfo(CodeGen::CodeGenTypes &CGT) 351 : TargetCodeGenInfo(new DefaultABIInfo(CGT)) {} 352}; 353 354llvm::Value *DefaultABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 355 CodeGenFunction &CGF) const { 356 return 0; 357} 358 359ABIArgInfo DefaultABIInfo::classifyArgumentType(QualType Ty) const { 360 if (isAggregateTypeForABI(Ty)) { 361 // Records with non trivial destructors/constructors should not be passed 362 // by value. 363 if (isRecordWithNonTrivialDestructorOrCopyConstructor(Ty)) 364 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 365 366 return ABIArgInfo::getIndirect(0); 367 } 368 369 // Treat an enum type as its underlying type. 370 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 371 Ty = EnumTy->getDecl()->getIntegerType(); 372 373 return (Ty->isPromotableIntegerType() ? 374 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 375} 376 377ABIArgInfo DefaultABIInfo::classifyReturnType(QualType RetTy) const { 378 if (RetTy->isVoidType()) 379 return ABIArgInfo::getIgnore(); 380 381 if (isAggregateTypeForABI(RetTy)) 382 return ABIArgInfo::getIndirect(0); 383 384 // Treat an enum type as its underlying type. 385 if (const EnumType *EnumTy = RetTy->getAs<EnumType>()) 386 RetTy = EnumTy->getDecl()->getIntegerType(); 387 388 return (RetTy->isPromotableIntegerType() ? 389 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 390} 391 392/// UseX86_MMXType - Return true if this is an MMX type that should use the 393/// special x86_mmx type. 394bool UseX86_MMXType(llvm::Type *IRType) { 395 // If the type is an MMX type <2 x i32>, <4 x i16>, or <8 x i8>, use the 396 // special x86_mmx type. 397 return IRType->isVectorTy() && IRType->getPrimitiveSizeInBits() == 64 && 398 cast<llvm::VectorType>(IRType)->getElementType()->isIntegerTy() && 399 IRType->getScalarSizeInBits() != 64; 400} 401 402static llvm::Type* X86AdjustInlineAsmType(CodeGen::CodeGenFunction &CGF, 403 StringRef Constraint, 404 llvm::Type* Ty) { 405 if ((Constraint == "y" || Constraint == "&y") && Ty->isVectorTy()) 406 return llvm::Type::getX86_MMXTy(CGF.getLLVMContext()); 407 return Ty; 408} 409 410//===----------------------------------------------------------------------===// 411// X86-32 ABI Implementation 412//===----------------------------------------------------------------------===// 413 414/// X86_32ABIInfo - The X86-32 ABI information. 415class X86_32ABIInfo : public ABIInfo { 416 static const unsigned MinABIStackAlignInBytes = 4; 417 418 bool IsDarwinVectorABI; 419 bool IsSmallStructInRegABI; 420 bool IsMMXDisabled; 421 bool IsWin32FloatStructABI; 422 423 static bool isRegisterSize(unsigned Size) { 424 return (Size == 8 || Size == 16 || Size == 32 || Size == 64); 425 } 426 427 static bool shouldReturnTypeInRegister(QualType Ty, ASTContext &Context); 428 429 /// getIndirectResult - Give a source type \arg Ty, return a suitable result 430 /// such that the argument will be passed in memory. 431 ABIArgInfo getIndirectResult(QualType Ty, bool ByVal = true) const; 432 433 /// \brief Return the alignment to use for the given type on the stack. 434 unsigned getTypeStackAlignInBytes(QualType Ty, unsigned Align) const; 435 436public: 437 438 ABIArgInfo classifyReturnType(QualType RetTy) const; 439 ABIArgInfo classifyArgumentType(QualType RetTy) const; 440 441 virtual void computeInfo(CGFunctionInfo &FI) const { 442 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 443 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 444 it != ie; ++it) 445 it->info = classifyArgumentType(it->type); 446 } 447 448 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 449 CodeGenFunction &CGF) const; 450 451 X86_32ABIInfo(CodeGen::CodeGenTypes &CGT, bool d, bool p, bool m, bool w) 452 : ABIInfo(CGT), IsDarwinVectorABI(d), IsSmallStructInRegABI(p), 453 IsMMXDisabled(m), IsWin32FloatStructABI(w) {} 454}; 455 456class X86_32TargetCodeGenInfo : public TargetCodeGenInfo { 457public: 458 X86_32TargetCodeGenInfo(CodeGen::CodeGenTypes &CGT, 459 bool d, bool p, bool m, bool w) 460 :TargetCodeGenInfo(new X86_32ABIInfo(CGT, d, p, m, w)) {} 461 462 void SetTargetAttributes(const Decl *D, llvm::GlobalValue *GV, 463 CodeGen::CodeGenModule &CGM) const; 464 465 int getDwarfEHStackPointer(CodeGen::CodeGenModule &CGM) const { 466 // Darwin uses different dwarf register numbers for EH. 467 if (CGM.isTargetDarwin()) return 5; 468 469 return 4; 470 } 471 472 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 473 llvm::Value *Address) const; 474 475 llvm::Type* adjustInlineAsmType(CodeGen::CodeGenFunction &CGF, 476 StringRef Constraint, 477 llvm::Type* Ty) const { 478 return X86AdjustInlineAsmType(CGF, Constraint, Ty); 479 } 480 481}; 482 483} 484 485/// shouldReturnTypeInRegister - Determine if the given type should be 486/// passed in a register (for the Darwin ABI). 487bool X86_32ABIInfo::shouldReturnTypeInRegister(QualType Ty, 488 ASTContext &Context) { 489 uint64_t Size = Context.getTypeSize(Ty); 490 491 // Type must be register sized. 492 if (!isRegisterSize(Size)) 493 return false; 494 495 if (Ty->isVectorType()) { 496 // 64- and 128- bit vectors inside structures are not returned in 497 // registers. 498 if (Size == 64 || Size == 128) 499 return false; 500 501 return true; 502 } 503 504 // If this is a builtin, pointer, enum, complex type, member pointer, or 505 // member function pointer it is ok. 506 if (Ty->getAs<BuiltinType>() || Ty->hasPointerRepresentation() || 507 Ty->isAnyComplexType() || Ty->isEnumeralType() || 508 Ty->isBlockPointerType() || Ty->isMemberPointerType()) 509 return true; 510 511 // Arrays are treated like records. 512 if (const ConstantArrayType *AT = Context.getAsConstantArrayType(Ty)) 513 return shouldReturnTypeInRegister(AT->getElementType(), Context); 514 515 // Otherwise, it must be a record type. 516 const RecordType *RT = Ty->getAs<RecordType>(); 517 if (!RT) return false; 518 519 // FIXME: Traverse bases here too. 520 521 // Structure types are passed in register if all fields would be 522 // passed in a register. 523 for (RecordDecl::field_iterator i = RT->getDecl()->field_begin(), 524 e = RT->getDecl()->field_end(); i != e; ++i) { 525 const FieldDecl *FD = *i; 526 527 // Empty fields are ignored. 528 if (isEmptyField(Context, FD, true)) 529 continue; 530 531 // Check fields recursively. 532 if (!shouldReturnTypeInRegister(FD->getType(), Context)) 533 return false; 534 } 535 536 return true; 537} 538 539ABIArgInfo X86_32ABIInfo::classifyReturnType(QualType RetTy) const { 540 if (RetTy->isVoidType()) 541 return ABIArgInfo::getIgnore(); 542 543 if (const VectorType *VT = RetTy->getAs<VectorType>()) { 544 // On Darwin, some vectors are returned in registers. 545 if (IsDarwinVectorABI) { 546 uint64_t Size = getContext().getTypeSize(RetTy); 547 548 // 128-bit vectors are a special case; they are returned in 549 // registers and we need to make sure to pick a type the LLVM 550 // backend will like. 551 if (Size == 128) 552 return ABIArgInfo::getDirect(llvm::VectorType::get( 553 llvm::Type::getInt64Ty(getVMContext()), 2)); 554 555 // Always return in register if it fits in a general purpose 556 // register, or if it is 64 bits and has a single element. 557 if ((Size == 8 || Size == 16 || Size == 32) || 558 (Size == 64 && VT->getNumElements() == 1)) 559 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(), 560 Size)); 561 562 return ABIArgInfo::getIndirect(0); 563 } 564 565 return ABIArgInfo::getDirect(); 566 } 567 568 if (isAggregateTypeForABI(RetTy)) { 569 if (const RecordType *RT = RetTy->getAs<RecordType>()) { 570 // Structures with either a non-trivial destructor or a non-trivial 571 // copy constructor are always indirect. 572 if (hasNonTrivialDestructorOrCopyConstructor(RT)) 573 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 574 575 // Structures with flexible arrays are always indirect. 576 if (RT->getDecl()->hasFlexibleArrayMember()) 577 return ABIArgInfo::getIndirect(0); 578 } 579 580 // If specified, structs and unions are always indirect. 581 if (!IsSmallStructInRegABI && !RetTy->isAnyComplexType()) 582 return ABIArgInfo::getIndirect(0); 583 584 // Small structures which are register sized are generally returned 585 // in a register. 586 if (X86_32ABIInfo::shouldReturnTypeInRegister(RetTy, getContext())) { 587 uint64_t Size = getContext().getTypeSize(RetTy); 588 589 // As a special-case, if the struct is a "single-element" struct, and 590 // the field is of type "float" or "double", return it in a 591 // floating-point register. (MSVC does not apply this special case.) 592 // We apply a similar transformation for pointer types to improve the 593 // quality of the generated IR. 594 if (const Type *SeltTy = isSingleElementStruct(RetTy, getContext())) 595 if ((!IsWin32FloatStructABI && SeltTy->isRealFloatingType()) 596 || SeltTy->hasPointerRepresentation()) 597 return ABIArgInfo::getDirect(CGT.ConvertType(QualType(SeltTy, 0))); 598 599 // FIXME: We should be able to narrow this integer in cases with dead 600 // padding. 601 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(),Size)); 602 } 603 604 return ABIArgInfo::getIndirect(0); 605 } 606 607 // Treat an enum type as its underlying type. 608 if (const EnumType *EnumTy = RetTy->getAs<EnumType>()) 609 RetTy = EnumTy->getDecl()->getIntegerType(); 610 611 return (RetTy->isPromotableIntegerType() ? 612 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 613} 614 615static bool isRecordWithSSEVectorType(ASTContext &Context, QualType Ty) { 616 const RecordType *RT = Ty->getAs<RecordType>(); 617 if (!RT) 618 return 0; 619 const RecordDecl *RD = RT->getDecl(); 620 621 // If this is a C++ record, check the bases first. 622 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) 623 for (CXXRecordDecl::base_class_const_iterator i = CXXRD->bases_begin(), 624 e = CXXRD->bases_end(); i != e; ++i) 625 if (!isRecordWithSSEVectorType(Context, i->getType())) 626 return false; 627 628 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 629 i != e; ++i) { 630 QualType FT = i->getType(); 631 632 if (FT->getAs<VectorType>() && Context.getTypeSize(FT) == 128) 633 return true; 634 635 if (isRecordWithSSEVectorType(Context, FT)) 636 return true; 637 } 638 639 return false; 640} 641 642unsigned X86_32ABIInfo::getTypeStackAlignInBytes(QualType Ty, 643 unsigned Align) const { 644 // Otherwise, if the alignment is less than or equal to the minimum ABI 645 // alignment, just use the default; the backend will handle this. 646 if (Align <= MinABIStackAlignInBytes) 647 return 0; // Use default alignment. 648 649 // On non-Darwin, the stack type alignment is always 4. 650 if (!IsDarwinVectorABI) { 651 // Set explicit alignment, since we may need to realign the top. 652 return MinABIStackAlignInBytes; 653 } 654 655 // Otherwise, if the type contains an SSE vector type, the alignment is 16. 656 if (Align >= 16 && isRecordWithSSEVectorType(getContext(), Ty)) 657 return 16; 658 659 return MinABIStackAlignInBytes; 660} 661 662ABIArgInfo X86_32ABIInfo::getIndirectResult(QualType Ty, bool ByVal) const { 663 if (!ByVal) 664 return ABIArgInfo::getIndirect(0, false); 665 666 // Compute the byval alignment. 667 unsigned TypeAlign = getContext().getTypeAlign(Ty) / 8; 668 unsigned StackAlign = getTypeStackAlignInBytes(Ty, TypeAlign); 669 if (StackAlign == 0) 670 return ABIArgInfo::getIndirect(4); 671 672 // If the stack alignment is less than the type alignment, realign the 673 // argument. 674 if (StackAlign < TypeAlign) 675 return ABIArgInfo::getIndirect(StackAlign, /*ByVal=*/true, 676 /*Realign=*/true); 677 678 return ABIArgInfo::getIndirect(StackAlign); 679} 680 681ABIArgInfo X86_32ABIInfo::classifyArgumentType(QualType Ty) const { 682 // FIXME: Set alignment on indirect arguments. 683 if (isAggregateTypeForABI(Ty)) { 684 // Structures with flexible arrays are always indirect. 685 if (const RecordType *RT = Ty->getAs<RecordType>()) { 686 // Structures with either a non-trivial destructor or a non-trivial 687 // copy constructor are always indirect. 688 if (hasNonTrivialDestructorOrCopyConstructor(RT)) 689 return getIndirectResult(Ty, /*ByVal=*/false); 690 691 if (RT->getDecl()->hasFlexibleArrayMember()) 692 return getIndirectResult(Ty); 693 } 694 695 // Ignore empty structs/unions. 696 if (isEmptyRecord(getContext(), Ty, true)) 697 return ABIArgInfo::getIgnore(); 698 699 // Expand small (<= 128-bit) record types when we know that the stack layout 700 // of those arguments will match the struct. This is important because the 701 // LLVM backend isn't smart enough to remove byval, which inhibits many 702 // optimizations. 703 if (getContext().getTypeSize(Ty) <= 4*32 && 704 canExpandIndirectArgument(Ty, getContext())) 705 return ABIArgInfo::getExpand(); 706 707 return getIndirectResult(Ty); 708 } 709 710 if (const VectorType *VT = Ty->getAs<VectorType>()) { 711 // On Darwin, some vectors are passed in memory, we handle this by passing 712 // it as an i8/i16/i32/i64. 713 if (IsDarwinVectorABI) { 714 uint64_t Size = getContext().getTypeSize(Ty); 715 if ((Size == 8 || Size == 16 || Size == 32) || 716 (Size == 64 && VT->getNumElements() == 1)) 717 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(), 718 Size)); 719 } 720 721 llvm::Type *IRType = CGT.ConvertType(Ty); 722 if (UseX86_MMXType(IRType)) { 723 if (IsMMXDisabled) 724 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(), 725 64)); 726 ABIArgInfo AAI = ABIArgInfo::getDirect(IRType); 727 AAI.setCoerceToType(llvm::Type::getX86_MMXTy(getVMContext())); 728 return AAI; 729 } 730 731 return ABIArgInfo::getDirect(); 732 } 733 734 735 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 736 Ty = EnumTy->getDecl()->getIntegerType(); 737 738 return (Ty->isPromotableIntegerType() ? 739 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 740} 741 742llvm::Value *X86_32ABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 743 CodeGenFunction &CGF) const { 744 llvm::Type *BPP = CGF.Int8PtrPtrTy; 745 746 CGBuilderTy &Builder = CGF.Builder; 747 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP, 748 "ap"); 749 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur"); 750 751 // Compute if the address needs to be aligned 752 unsigned Align = CGF.getContext().getTypeAlignInChars(Ty).getQuantity(); 753 Align = getTypeStackAlignInBytes(Ty, Align); 754 Align = std::max(Align, 4U); 755 if (Align > 4) { 756 // addr = (addr + align - 1) & -align; 757 llvm::Value *Offset = 758 llvm::ConstantInt::get(CGF.Int32Ty, Align - 1); 759 Addr = CGF.Builder.CreateGEP(Addr, Offset); 760 llvm::Value *AsInt = CGF.Builder.CreatePtrToInt(Addr, 761 CGF.Int32Ty); 762 llvm::Value *Mask = llvm::ConstantInt::get(CGF.Int32Ty, -Align); 763 Addr = CGF.Builder.CreateIntToPtr(CGF.Builder.CreateAnd(AsInt, Mask), 764 Addr->getType(), 765 "ap.cur.aligned"); 766 } 767 768 llvm::Type *PTy = 769 llvm::PointerType::getUnqual(CGF.ConvertType(Ty)); 770 llvm::Value *AddrTyped = Builder.CreateBitCast(Addr, PTy); 771 772 uint64_t Offset = 773 llvm::RoundUpToAlignment(CGF.getContext().getTypeSize(Ty) / 8, Align); 774 llvm::Value *NextAddr = 775 Builder.CreateGEP(Addr, llvm::ConstantInt::get(CGF.Int32Ty, Offset), 776 "ap.next"); 777 Builder.CreateStore(NextAddr, VAListAddrAsBPP); 778 779 return AddrTyped; 780} 781 782void X86_32TargetCodeGenInfo::SetTargetAttributes(const Decl *D, 783 llvm::GlobalValue *GV, 784 CodeGen::CodeGenModule &CGM) const { 785 if (const FunctionDecl *FD = dyn_cast<FunctionDecl>(D)) { 786 if (FD->hasAttr<X86ForceAlignArgPointerAttr>()) { 787 // Get the LLVM function. 788 llvm::Function *Fn = cast<llvm::Function>(GV); 789 790 // Now add the 'alignstack' attribute with a value of 16. 791 Fn->addFnAttr(llvm::Attribute::constructStackAlignmentFromInt(16)); 792 } 793 } 794} 795 796bool X86_32TargetCodeGenInfo::initDwarfEHRegSizeTable( 797 CodeGen::CodeGenFunction &CGF, 798 llvm::Value *Address) const { 799 CodeGen::CGBuilderTy &Builder = CGF.Builder; 800 801 llvm::Value *Four8 = llvm::ConstantInt::get(CGF.Int8Ty, 4); 802 803 // 0-7 are the eight integer registers; the order is different 804 // on Darwin (for EH), but the range is the same. 805 // 8 is %eip. 806 AssignToArrayRange(Builder, Address, Four8, 0, 8); 807 808 if (CGF.CGM.isTargetDarwin()) { 809 // 12-16 are st(0..4). Not sure why we stop at 4. 810 // These have size 16, which is sizeof(long double) on 811 // platforms with 8-byte alignment for that type. 812 llvm::Value *Sixteen8 = llvm::ConstantInt::get(CGF.Int8Ty, 16); 813 AssignToArrayRange(Builder, Address, Sixteen8, 12, 16); 814 815 } else { 816 // 9 is %eflags, which doesn't get a size on Darwin for some 817 // reason. 818 Builder.CreateStore(Four8, Builder.CreateConstInBoundsGEP1_32(Address, 9)); 819 820 // 11-16 are st(0..5). Not sure why we stop at 5. 821 // These have size 12, which is sizeof(long double) on 822 // platforms with 4-byte alignment for that type. 823 llvm::Value *Twelve8 = llvm::ConstantInt::get(CGF.Int8Ty, 12); 824 AssignToArrayRange(Builder, Address, Twelve8, 11, 16); 825 } 826 827 return false; 828} 829 830//===----------------------------------------------------------------------===// 831// X86-64 ABI Implementation 832//===----------------------------------------------------------------------===// 833 834 835namespace { 836/// X86_64ABIInfo - The X86_64 ABI information. 837class X86_64ABIInfo : public ABIInfo { 838 enum Class { 839 Integer = 0, 840 SSE, 841 SSEUp, 842 X87, 843 X87Up, 844 ComplexX87, 845 NoClass, 846 Memory 847 }; 848 849 /// merge - Implement the X86_64 ABI merging algorithm. 850 /// 851 /// Merge an accumulating classification \arg Accum with a field 852 /// classification \arg Field. 853 /// 854 /// \param Accum - The accumulating classification. This should 855 /// always be either NoClass or the result of a previous merge 856 /// call. In addition, this should never be Memory (the caller 857 /// should just return Memory for the aggregate). 858 static Class merge(Class Accum, Class Field); 859 860 /// postMerge - Implement the X86_64 ABI post merging algorithm. 861 /// 862 /// Post merger cleanup, reduces a malformed Hi and Lo pair to 863 /// final MEMORY or SSE classes when necessary. 864 /// 865 /// \param AggregateSize - The size of the current aggregate in 866 /// the classification process. 867 /// 868 /// \param Lo - The classification for the parts of the type 869 /// residing in the low word of the containing object. 870 /// 871 /// \param Hi - The classification for the parts of the type 872 /// residing in the higher words of the containing object. 873 /// 874 void postMerge(unsigned AggregateSize, Class &Lo, Class &Hi) const; 875 876 /// classify - Determine the x86_64 register classes in which the 877 /// given type T should be passed. 878 /// 879 /// \param Lo - The classification for the parts of the type 880 /// residing in the low word of the containing object. 881 /// 882 /// \param Hi - The classification for the parts of the type 883 /// residing in the high word of the containing object. 884 /// 885 /// \param OffsetBase - The bit offset of this type in the 886 /// containing object. Some parameters are classified different 887 /// depending on whether they straddle an eightbyte boundary. 888 /// 889 /// If a word is unused its result will be NoClass; if a type should 890 /// be passed in Memory then at least the classification of \arg Lo 891 /// will be Memory. 892 /// 893 /// The \arg Lo class will be NoClass iff the argument is ignored. 894 /// 895 /// If the \arg Lo class is ComplexX87, then the \arg Hi class will 896 /// also be ComplexX87. 897 void classify(QualType T, uint64_t OffsetBase, Class &Lo, Class &Hi) const; 898 899 llvm::Type *GetByteVectorType(QualType Ty) const; 900 llvm::Type *GetSSETypeAtOffset(llvm::Type *IRType, 901 unsigned IROffset, QualType SourceTy, 902 unsigned SourceOffset) const; 903 llvm::Type *GetINTEGERTypeAtOffset(llvm::Type *IRType, 904 unsigned IROffset, QualType SourceTy, 905 unsigned SourceOffset) const; 906 907 /// getIndirectResult - Give a source type \arg Ty, return a suitable result 908 /// such that the argument will be returned in memory. 909 ABIArgInfo getIndirectReturnResult(QualType Ty) const; 910 911 /// getIndirectResult - Give a source type \arg Ty, return a suitable result 912 /// such that the argument will be passed in memory. 913 ABIArgInfo getIndirectResult(QualType Ty) const; 914 915 ABIArgInfo classifyReturnType(QualType RetTy) const; 916 917 ABIArgInfo classifyArgumentType(QualType Ty, 918 unsigned &neededInt, 919 unsigned &neededSSE) const; 920 921 bool IsIllegalVectorType(QualType Ty) const; 922 923 /// The 0.98 ABI revision clarified a lot of ambiguities, 924 /// unfortunately in ways that were not always consistent with 925 /// certain previous compilers. In particular, platforms which 926 /// required strict binary compatibility with older versions of GCC 927 /// may need to exempt themselves. 928 bool honorsRevision0_98() const { 929 return !getContext().getTargetInfo().getTriple().isOSDarwin(); 930 } 931 932 bool HasAVX; 933 934public: 935 X86_64ABIInfo(CodeGen::CodeGenTypes &CGT, bool hasavx) : 936 ABIInfo(CGT), HasAVX(hasavx) {} 937 938 virtual void computeInfo(CGFunctionInfo &FI) const; 939 940 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 941 CodeGenFunction &CGF) const; 942}; 943 944/// WinX86_64ABIInfo - The Windows X86_64 ABI information. 945class WinX86_64ABIInfo : public ABIInfo { 946 947 ABIArgInfo classify(QualType Ty) const; 948 949public: 950 WinX86_64ABIInfo(CodeGen::CodeGenTypes &CGT) : ABIInfo(CGT) {} 951 952 virtual void computeInfo(CGFunctionInfo &FI) const; 953 954 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 955 CodeGenFunction &CGF) const; 956}; 957 958class X86_64TargetCodeGenInfo : public TargetCodeGenInfo { 959public: 960 X86_64TargetCodeGenInfo(CodeGen::CodeGenTypes &CGT, bool HasAVX) 961 : TargetCodeGenInfo(new X86_64ABIInfo(CGT, HasAVX)) {} 962 963 int getDwarfEHStackPointer(CodeGen::CodeGenModule &CGM) const { 964 return 7; 965 } 966 967 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 968 llvm::Value *Address) const { 969 llvm::Value *Eight8 = llvm::ConstantInt::get(CGF.Int8Ty, 8); 970 971 // 0-15 are the 16 integer registers. 972 // 16 is %rip. 973 AssignToArrayRange(CGF.Builder, Address, Eight8, 0, 16); 974 return false; 975 } 976 977 llvm::Type* adjustInlineAsmType(CodeGen::CodeGenFunction &CGF, 978 StringRef Constraint, 979 llvm::Type* Ty) const { 980 return X86AdjustInlineAsmType(CGF, Constraint, Ty); 981 } 982 983 bool isNoProtoCallVariadic(const CodeGen::CGFunctionInfo &FI) const { 984 // The default CC on x86-64 sets %al to the number of SSA 985 // registers used, and GCC sets this when calling an unprototyped 986 // function, so we override the default behavior. However, don't do 987 // that when AVX types are involved: the ABI explicitly states it is 988 // undefined, and it doesn't work in practice because of how the ABI 989 // defines varargs anyway. 990 if (FI.getCallingConvention() == llvm::CallingConv::C) { 991 bool HasAVXType = false; 992 for (CGFunctionInfo::const_arg_iterator it = FI.arg_begin(), 993 ie = FI.arg_end(); 994 it != ie; ++it) { 995 if (it->info.isDirect()) { 996 llvm::Type *Ty = it->info.getCoerceToType(); 997 if (llvm::VectorType *VTy = dyn_cast_or_null<llvm::VectorType>(Ty)) { 998 if (VTy->getBitWidth() > 128) { 999 HasAVXType = true; 1000 break; 1001 } 1002 } 1003 } 1004 } 1005 if (!HasAVXType) 1006 return true; 1007 } 1008 1009 return TargetCodeGenInfo::isNoProtoCallVariadic(FI); 1010 } 1011 1012}; 1013 1014class WinX86_64TargetCodeGenInfo : public TargetCodeGenInfo { 1015public: 1016 WinX86_64TargetCodeGenInfo(CodeGen::CodeGenTypes &CGT) 1017 : TargetCodeGenInfo(new WinX86_64ABIInfo(CGT)) {} 1018 1019 int getDwarfEHStackPointer(CodeGen::CodeGenModule &CGM) const { 1020 return 7; 1021 } 1022 1023 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 1024 llvm::Value *Address) const { 1025 llvm::Value *Eight8 = llvm::ConstantInt::get(CGF.Int8Ty, 8); 1026 1027 // 0-15 are the 16 integer registers. 1028 // 16 is %rip. 1029 AssignToArrayRange(CGF.Builder, Address, Eight8, 0, 16); 1030 return false; 1031 } 1032}; 1033 1034} 1035 1036void X86_64ABIInfo::postMerge(unsigned AggregateSize, Class &Lo, 1037 Class &Hi) const { 1038 // AMD64-ABI 3.2.3p2: Rule 5. Then a post merger cleanup is done: 1039 // 1040 // (a) If one of the classes is Memory, the whole argument is passed in 1041 // memory. 1042 // 1043 // (b) If X87UP is not preceded by X87, the whole argument is passed in 1044 // memory. 1045 // 1046 // (c) If the size of the aggregate exceeds two eightbytes and the first 1047 // eightbyte isn't SSE or any other eightbyte isn't SSEUP, the whole 1048 // argument is passed in memory. NOTE: This is necessary to keep the 1049 // ABI working for processors that don't support the __m256 type. 1050 // 1051 // (d) If SSEUP is not preceded by SSE or SSEUP, it is converted to SSE. 1052 // 1053 // Some of these are enforced by the merging logic. Others can arise 1054 // only with unions; for example: 1055 // union { _Complex double; unsigned; } 1056 // 1057 // Note that clauses (b) and (c) were added in 0.98. 1058 // 1059 if (Hi == Memory) 1060 Lo = Memory; 1061 if (Hi == X87Up && Lo != X87 && honorsRevision0_98()) 1062 Lo = Memory; 1063 if (AggregateSize > 128 && (Lo != SSE || Hi != SSEUp)) 1064 Lo = Memory; 1065 if (Hi == SSEUp && Lo != SSE) 1066 Hi = SSE; 1067} 1068 1069X86_64ABIInfo::Class X86_64ABIInfo::merge(Class Accum, Class Field) { 1070 // AMD64-ABI 3.2.3p2: Rule 4. Each field of an object is 1071 // classified recursively so that always two fields are 1072 // considered. The resulting class is calculated according to 1073 // the classes of the fields in the eightbyte: 1074 // 1075 // (a) If both classes are equal, this is the resulting class. 1076 // 1077 // (b) If one of the classes is NO_CLASS, the resulting class is 1078 // the other class. 1079 // 1080 // (c) If one of the classes is MEMORY, the result is the MEMORY 1081 // class. 1082 // 1083 // (d) If one of the classes is INTEGER, the result is the 1084 // INTEGER. 1085 // 1086 // (e) If one of the classes is X87, X87UP, COMPLEX_X87 class, 1087 // MEMORY is used as class. 1088 // 1089 // (f) Otherwise class SSE is used. 1090 1091 // Accum should never be memory (we should have returned) or 1092 // ComplexX87 (because this cannot be passed in a structure). 1093 assert((Accum != Memory && Accum != ComplexX87) && 1094 "Invalid accumulated classification during merge."); 1095 if (Accum == Field || Field == NoClass) 1096 return Accum; 1097 if (Field == Memory) 1098 return Memory; 1099 if (Accum == NoClass) 1100 return Field; 1101 if (Accum == Integer || Field == Integer) 1102 return Integer; 1103 if (Field == X87 || Field == X87Up || Field == ComplexX87 || 1104 Accum == X87 || Accum == X87Up) 1105 return Memory; 1106 return SSE; 1107} 1108 1109void X86_64ABIInfo::classify(QualType Ty, uint64_t OffsetBase, 1110 Class &Lo, Class &Hi) const { 1111 // FIXME: This code can be simplified by introducing a simple value class for 1112 // Class pairs with appropriate constructor methods for the various 1113 // situations. 1114 1115 // FIXME: Some of the split computations are wrong; unaligned vectors 1116 // shouldn't be passed in registers for example, so there is no chance they 1117 // can straddle an eightbyte. Verify & simplify. 1118 1119 Lo = Hi = NoClass; 1120 1121 Class &Current = OffsetBase < 64 ? Lo : Hi; 1122 Current = Memory; 1123 1124 if (const BuiltinType *BT = Ty->getAs<BuiltinType>()) { 1125 BuiltinType::Kind k = BT->getKind(); 1126 1127 if (k == BuiltinType::Void) { 1128 Current = NoClass; 1129 } else if (k == BuiltinType::Int128 || k == BuiltinType::UInt128) { 1130 Lo = Integer; 1131 Hi = Integer; 1132 } else if (k >= BuiltinType::Bool && k <= BuiltinType::LongLong) { 1133 Current = Integer; 1134 } else if (k == BuiltinType::Float || k == BuiltinType::Double) { 1135 Current = SSE; 1136 } else if (k == BuiltinType::LongDouble) { 1137 Lo = X87; 1138 Hi = X87Up; 1139 } 1140 // FIXME: _Decimal32 and _Decimal64 are SSE. 1141 // FIXME: _float128 and _Decimal128 are (SSE, SSEUp). 1142 return; 1143 } 1144 1145 if (const EnumType *ET = Ty->getAs<EnumType>()) { 1146 // Classify the underlying integer type. 1147 classify(ET->getDecl()->getIntegerType(), OffsetBase, Lo, Hi); 1148 return; 1149 } 1150 1151 if (Ty->hasPointerRepresentation()) { 1152 Current = Integer; 1153 return; 1154 } 1155 1156 if (Ty->isMemberPointerType()) { 1157 if (Ty->isMemberFunctionPointerType()) 1158 Lo = Hi = Integer; 1159 else 1160 Current = Integer; 1161 return; 1162 } 1163 1164 if (const VectorType *VT = Ty->getAs<VectorType>()) { 1165 uint64_t Size = getContext().getTypeSize(VT); 1166 if (Size == 32) { 1167 // gcc passes all <4 x char>, <2 x short>, <1 x int>, <1 x 1168 // float> as integer. 1169 Current = Integer; 1170 1171 // If this type crosses an eightbyte boundary, it should be 1172 // split. 1173 uint64_t EB_Real = (OffsetBase) / 64; 1174 uint64_t EB_Imag = (OffsetBase + Size - 1) / 64; 1175 if (EB_Real != EB_Imag) 1176 Hi = Lo; 1177 } else if (Size == 64) { 1178 // gcc passes <1 x double> in memory. :( 1179 if (VT->getElementType()->isSpecificBuiltinType(BuiltinType::Double)) 1180 return; 1181 1182 // gcc passes <1 x long long> as INTEGER. 1183 if (VT->getElementType()->isSpecificBuiltinType(BuiltinType::LongLong) || 1184 VT->getElementType()->isSpecificBuiltinType(BuiltinType::ULongLong) || 1185 VT->getElementType()->isSpecificBuiltinType(BuiltinType::Long) || 1186 VT->getElementType()->isSpecificBuiltinType(BuiltinType::ULong)) 1187 Current = Integer; 1188 else 1189 Current = SSE; 1190 1191 // If this type crosses an eightbyte boundary, it should be 1192 // split. 1193 if (OffsetBase && OffsetBase != 64) 1194 Hi = Lo; 1195 } else if (Size == 128 || (HasAVX && Size == 256)) { 1196 // Arguments of 256-bits are split into four eightbyte chunks. The 1197 // least significant one belongs to class SSE and all the others to class 1198 // SSEUP. The original Lo and Hi design considers that types can't be 1199 // greater than 128-bits, so a 64-bit split in Hi and Lo makes sense. 1200 // This design isn't correct for 256-bits, but since there're no cases 1201 // where the upper parts would need to be inspected, avoid adding 1202 // complexity and just consider Hi to match the 64-256 part. 1203 Lo = SSE; 1204 Hi = SSEUp; 1205 } 1206 return; 1207 } 1208 1209 if (const ComplexType *CT = Ty->getAs<ComplexType>()) { 1210 QualType ET = getContext().getCanonicalType(CT->getElementType()); 1211 1212 uint64_t Size = getContext().getTypeSize(Ty); 1213 if (ET->isIntegralOrEnumerationType()) { 1214 if (Size <= 64) 1215 Current = Integer; 1216 else if (Size <= 128) 1217 Lo = Hi = Integer; 1218 } else if (ET == getContext().FloatTy) 1219 Current = SSE; 1220 else if (ET == getContext().DoubleTy) 1221 Lo = Hi = SSE; 1222 else if (ET == getContext().LongDoubleTy) 1223 Current = ComplexX87; 1224 1225 // If this complex type crosses an eightbyte boundary then it 1226 // should be split. 1227 uint64_t EB_Real = (OffsetBase) / 64; 1228 uint64_t EB_Imag = (OffsetBase + getContext().getTypeSize(ET)) / 64; 1229 if (Hi == NoClass && EB_Real != EB_Imag) 1230 Hi = Lo; 1231 1232 return; 1233 } 1234 1235 if (const ConstantArrayType *AT = getContext().getAsConstantArrayType(Ty)) { 1236 // Arrays are treated like structures. 1237 1238 uint64_t Size = getContext().getTypeSize(Ty); 1239 1240 // AMD64-ABI 3.2.3p2: Rule 1. If the size of an object is larger 1241 // than four eightbytes, ..., it has class MEMORY. 1242 if (Size > 256) 1243 return; 1244 1245 // AMD64-ABI 3.2.3p2: Rule 1. If ..., or it contains unaligned 1246 // fields, it has class MEMORY. 1247 // 1248 // Only need to check alignment of array base. 1249 if (OffsetBase % getContext().getTypeAlign(AT->getElementType())) 1250 return; 1251 1252 // Otherwise implement simplified merge. We could be smarter about 1253 // this, but it isn't worth it and would be harder to verify. 1254 Current = NoClass; 1255 uint64_t EltSize = getContext().getTypeSize(AT->getElementType()); 1256 uint64_t ArraySize = AT->getSize().getZExtValue(); 1257 1258 // The only case a 256-bit wide vector could be used is when the array 1259 // contains a single 256-bit element. Since Lo and Hi logic isn't extended 1260 // to work for sizes wider than 128, early check and fallback to memory. 1261 if (Size > 128 && EltSize != 256) 1262 return; 1263 1264 for (uint64_t i=0, Offset=OffsetBase; i<ArraySize; ++i, Offset += EltSize) { 1265 Class FieldLo, FieldHi; 1266 classify(AT->getElementType(), Offset, FieldLo, FieldHi); 1267 Lo = merge(Lo, FieldLo); 1268 Hi = merge(Hi, FieldHi); 1269 if (Lo == Memory || Hi == Memory) 1270 break; 1271 } 1272 1273 postMerge(Size, Lo, Hi); 1274 assert((Hi != SSEUp || Lo == SSE) && "Invalid SSEUp array classification."); 1275 return; 1276 } 1277 1278 if (const RecordType *RT = Ty->getAs<RecordType>()) { 1279 uint64_t Size = getContext().getTypeSize(Ty); 1280 1281 // AMD64-ABI 3.2.3p2: Rule 1. If the size of an object is larger 1282 // than four eightbytes, ..., it has class MEMORY. 1283 if (Size > 256) 1284 return; 1285 1286 // AMD64-ABI 3.2.3p2: Rule 2. If a C++ object has either a non-trivial 1287 // copy constructor or a non-trivial destructor, it is passed by invisible 1288 // reference. 1289 if (hasNonTrivialDestructorOrCopyConstructor(RT)) 1290 return; 1291 1292 const RecordDecl *RD = RT->getDecl(); 1293 1294 // Assume variable sized types are passed in memory. 1295 if (RD->hasFlexibleArrayMember()) 1296 return; 1297 1298 const ASTRecordLayout &Layout = getContext().getASTRecordLayout(RD); 1299 1300 // Reset Lo class, this will be recomputed. 1301 Current = NoClass; 1302 1303 // If this is a C++ record, classify the bases first. 1304 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) { 1305 for (CXXRecordDecl::base_class_const_iterator i = CXXRD->bases_begin(), 1306 e = CXXRD->bases_end(); i != e; ++i) { 1307 assert(!i->isVirtual() && !i->getType()->isDependentType() && 1308 "Unexpected base class!"); 1309 const CXXRecordDecl *Base = 1310 cast<CXXRecordDecl>(i->getType()->getAs<RecordType>()->getDecl()); 1311 1312 // Classify this field. 1313 // 1314 // AMD64-ABI 3.2.3p2: Rule 3. If the size of the aggregate exceeds a 1315 // single eightbyte, each is classified separately. Each eightbyte gets 1316 // initialized to class NO_CLASS. 1317 Class FieldLo, FieldHi; 1318 uint64_t Offset = OffsetBase + Layout.getBaseClassOffsetInBits(Base); 1319 classify(i->getType(), Offset, FieldLo, FieldHi); 1320 Lo = merge(Lo, FieldLo); 1321 Hi = merge(Hi, FieldHi); 1322 if (Lo == Memory || Hi == Memory) 1323 break; 1324 } 1325 } 1326 1327 // Classify the fields one at a time, merging the results. 1328 unsigned idx = 0; 1329 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 1330 i != e; ++i, ++idx) { 1331 uint64_t Offset = OffsetBase + Layout.getFieldOffset(idx); 1332 bool BitField = i->isBitField(); 1333 1334 // AMD64-ABI 3.2.3p2: Rule 1. If the size of an object is larger than 1335 // four eightbytes, or it contains unaligned fields, it has class MEMORY. 1336 // 1337 // The only case a 256-bit wide vector could be used is when the struct 1338 // contains a single 256-bit element. Since Lo and Hi logic isn't extended 1339 // to work for sizes wider than 128, early check and fallback to memory. 1340 // 1341 if (Size > 128 && getContext().getTypeSize(i->getType()) != 256) { 1342 Lo = Memory; 1343 return; 1344 } 1345 // Note, skip this test for bit-fields, see below. 1346 if (!BitField && Offset % getContext().getTypeAlign(i->getType())) { 1347 Lo = Memory; 1348 return; 1349 } 1350 1351 // Classify this field. 1352 // 1353 // AMD64-ABI 3.2.3p2: Rule 3. If the size of the aggregate 1354 // exceeds a single eightbyte, each is classified 1355 // separately. Each eightbyte gets initialized to class 1356 // NO_CLASS. 1357 Class FieldLo, FieldHi; 1358 1359 // Bit-fields require special handling, they do not force the 1360 // structure to be passed in memory even if unaligned, and 1361 // therefore they can straddle an eightbyte. 1362 if (BitField) { 1363 // Ignore padding bit-fields. 1364 if (i->isUnnamedBitfield()) 1365 continue; 1366 1367 uint64_t Offset = OffsetBase + Layout.getFieldOffset(idx); 1368 uint64_t Size = i->getBitWidthValue(getContext()); 1369 1370 uint64_t EB_Lo = Offset / 64; 1371 uint64_t EB_Hi = (Offset + Size - 1) / 64; 1372 FieldLo = FieldHi = NoClass; 1373 if (EB_Lo) { 1374 assert(EB_Hi == EB_Lo && "Invalid classification, type > 16 bytes."); 1375 FieldLo = NoClass; 1376 FieldHi = Integer; 1377 } else { 1378 FieldLo = Integer; 1379 FieldHi = EB_Hi ? Integer : NoClass; 1380 } 1381 } else 1382 classify(i->getType(), Offset, FieldLo, FieldHi); 1383 Lo = merge(Lo, FieldLo); 1384 Hi = merge(Hi, FieldHi); 1385 if (Lo == Memory || Hi == Memory) 1386 break; 1387 } 1388 1389 postMerge(Size, Lo, Hi); 1390 } 1391} 1392 1393ABIArgInfo X86_64ABIInfo::getIndirectReturnResult(QualType Ty) const { 1394 // If this is a scalar LLVM value then assume LLVM will pass it in the right 1395 // place naturally. 1396 if (!isAggregateTypeForABI(Ty)) { 1397 // Treat an enum type as its underlying type. 1398 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 1399 Ty = EnumTy->getDecl()->getIntegerType(); 1400 1401 return (Ty->isPromotableIntegerType() ? 1402 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 1403 } 1404 1405 return ABIArgInfo::getIndirect(0); 1406} 1407 1408bool X86_64ABIInfo::IsIllegalVectorType(QualType Ty) const { 1409 if (const VectorType *VecTy = Ty->getAs<VectorType>()) { 1410 uint64_t Size = getContext().getTypeSize(VecTy); 1411 unsigned LargestVector = HasAVX ? 256 : 128; 1412 if (Size <= 64 || Size > LargestVector) 1413 return true; 1414 } 1415 1416 return false; 1417} 1418 1419ABIArgInfo X86_64ABIInfo::getIndirectResult(QualType Ty) const { 1420 // If this is a scalar LLVM value then assume LLVM will pass it in the right 1421 // place naturally. 1422 if (!isAggregateTypeForABI(Ty) && !IsIllegalVectorType(Ty)) { 1423 // Treat an enum type as its underlying type. 1424 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 1425 Ty = EnumTy->getDecl()->getIntegerType(); 1426 1427 return (Ty->isPromotableIntegerType() ? 1428 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 1429 } 1430 1431 if (isRecordWithNonTrivialDestructorOrCopyConstructor(Ty)) 1432 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 1433 1434 // Compute the byval alignment. We specify the alignment of the byval in all 1435 // cases so that the mid-level optimizer knows the alignment of the byval. 1436 unsigned Align = std::max(getContext().getTypeAlign(Ty) / 8, 8U); 1437 return ABIArgInfo::getIndirect(Align); 1438} 1439 1440/// GetByteVectorType - The ABI specifies that a value should be passed in an 1441/// full vector XMM/YMM register. Pick an LLVM IR type that will be passed as a 1442/// vector register. 1443llvm::Type *X86_64ABIInfo::GetByteVectorType(QualType Ty) const { 1444 llvm::Type *IRType = CGT.ConvertType(Ty); 1445 1446 // Wrapper structs that just contain vectors are passed just like vectors, 1447 // strip them off if present. 1448 llvm::StructType *STy = dyn_cast<llvm::StructType>(IRType); 1449 while (STy && STy->getNumElements() == 1) { 1450 IRType = STy->getElementType(0); 1451 STy = dyn_cast<llvm::StructType>(IRType); 1452 } 1453 1454 // If the preferred type is a 16-byte vector, prefer to pass it. 1455 if (llvm::VectorType *VT = dyn_cast<llvm::VectorType>(IRType)){ 1456 llvm::Type *EltTy = VT->getElementType(); 1457 unsigned BitWidth = VT->getBitWidth(); 1458 if ((BitWidth >= 128 && BitWidth <= 256) && 1459 (EltTy->isFloatTy() || EltTy->isDoubleTy() || 1460 EltTy->isIntegerTy(8) || EltTy->isIntegerTy(16) || 1461 EltTy->isIntegerTy(32) || EltTy->isIntegerTy(64) || 1462 EltTy->isIntegerTy(128))) 1463 return VT; 1464 } 1465 1466 return llvm::VectorType::get(llvm::Type::getDoubleTy(getVMContext()), 2); 1467} 1468 1469/// BitsContainNoUserData - Return true if the specified [start,end) bit range 1470/// is known to either be off the end of the specified type or being in 1471/// alignment padding. The user type specified is known to be at most 128 bits 1472/// in size, and have passed through X86_64ABIInfo::classify with a successful 1473/// classification that put one of the two halves in the INTEGER class. 1474/// 1475/// It is conservatively correct to return false. 1476static bool BitsContainNoUserData(QualType Ty, unsigned StartBit, 1477 unsigned EndBit, ASTContext &Context) { 1478 // If the bytes being queried are off the end of the type, there is no user 1479 // data hiding here. This handles analysis of builtins, vectors and other 1480 // types that don't contain interesting padding. 1481 unsigned TySize = (unsigned)Context.getTypeSize(Ty); 1482 if (TySize <= StartBit) 1483 return true; 1484 1485 if (const ConstantArrayType *AT = Context.getAsConstantArrayType(Ty)) { 1486 unsigned EltSize = (unsigned)Context.getTypeSize(AT->getElementType()); 1487 unsigned NumElts = (unsigned)AT->getSize().getZExtValue(); 1488 1489 // Check each element to see if the element overlaps with the queried range. 1490 for (unsigned i = 0; i != NumElts; ++i) { 1491 // If the element is after the span we care about, then we're done.. 1492 unsigned EltOffset = i*EltSize; 1493 if (EltOffset >= EndBit) break; 1494 1495 unsigned EltStart = EltOffset < StartBit ? StartBit-EltOffset :0; 1496 if (!BitsContainNoUserData(AT->getElementType(), EltStart, 1497 EndBit-EltOffset, Context)) 1498 return false; 1499 } 1500 // If it overlaps no elements, then it is safe to process as padding. 1501 return true; 1502 } 1503 1504 if (const RecordType *RT = Ty->getAs<RecordType>()) { 1505 const RecordDecl *RD = RT->getDecl(); 1506 const ASTRecordLayout &Layout = Context.getASTRecordLayout(RD); 1507 1508 // If this is a C++ record, check the bases first. 1509 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) { 1510 for (CXXRecordDecl::base_class_const_iterator i = CXXRD->bases_begin(), 1511 e = CXXRD->bases_end(); i != e; ++i) { 1512 assert(!i->isVirtual() && !i->getType()->isDependentType() && 1513 "Unexpected base class!"); 1514 const CXXRecordDecl *Base = 1515 cast<CXXRecordDecl>(i->getType()->getAs<RecordType>()->getDecl()); 1516 1517 // If the base is after the span we care about, ignore it. 1518 unsigned BaseOffset = (unsigned)Layout.getBaseClassOffsetInBits(Base); 1519 if (BaseOffset >= EndBit) continue; 1520 1521 unsigned BaseStart = BaseOffset < StartBit ? StartBit-BaseOffset :0; 1522 if (!BitsContainNoUserData(i->getType(), BaseStart, 1523 EndBit-BaseOffset, Context)) 1524 return false; 1525 } 1526 } 1527 1528 // Verify that no field has data that overlaps the region of interest. Yes 1529 // this could be sped up a lot by being smarter about queried fields, 1530 // however we're only looking at structs up to 16 bytes, so we don't care 1531 // much. 1532 unsigned idx = 0; 1533 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 1534 i != e; ++i, ++idx) { 1535 unsigned FieldOffset = (unsigned)Layout.getFieldOffset(idx); 1536 1537 // If we found a field after the region we care about, then we're done. 1538 if (FieldOffset >= EndBit) break; 1539 1540 unsigned FieldStart = FieldOffset < StartBit ? StartBit-FieldOffset :0; 1541 if (!BitsContainNoUserData(i->getType(), FieldStart, EndBit-FieldOffset, 1542 Context)) 1543 return false; 1544 } 1545 1546 // If nothing in this record overlapped the area of interest, then we're 1547 // clean. 1548 return true; 1549 } 1550 1551 return false; 1552} 1553 1554/// ContainsFloatAtOffset - Return true if the specified LLVM IR type has a 1555/// float member at the specified offset. For example, {int,{float}} has a 1556/// float at offset 4. It is conservatively correct for this routine to return 1557/// false. 1558static bool ContainsFloatAtOffset(llvm::Type *IRType, unsigned IROffset, 1559 const llvm::TargetData &TD) { 1560 // Base case if we find a float. 1561 if (IROffset == 0 && IRType->isFloatTy()) 1562 return true; 1563 1564 // If this is a struct, recurse into the field at the specified offset. 1565 if (llvm::StructType *STy = dyn_cast<llvm::StructType>(IRType)) { 1566 const llvm::StructLayout *SL = TD.getStructLayout(STy); 1567 unsigned Elt = SL->getElementContainingOffset(IROffset); 1568 IROffset -= SL->getElementOffset(Elt); 1569 return ContainsFloatAtOffset(STy->getElementType(Elt), IROffset, TD); 1570 } 1571 1572 // If this is an array, recurse into the field at the specified offset. 1573 if (llvm::ArrayType *ATy = dyn_cast<llvm::ArrayType>(IRType)) { 1574 llvm::Type *EltTy = ATy->getElementType(); 1575 unsigned EltSize = TD.getTypeAllocSize(EltTy); 1576 IROffset -= IROffset/EltSize*EltSize; 1577 return ContainsFloatAtOffset(EltTy, IROffset, TD); 1578 } 1579 1580 return false; 1581} 1582 1583 1584/// GetSSETypeAtOffset - Return a type that will be passed by the backend in the 1585/// low 8 bytes of an XMM register, corresponding to the SSE class. 1586llvm::Type *X86_64ABIInfo:: 1587GetSSETypeAtOffset(llvm::Type *IRType, unsigned IROffset, 1588 QualType SourceTy, unsigned SourceOffset) const { 1589 // The only three choices we have are either double, <2 x float>, or float. We 1590 // pass as float if the last 4 bytes is just padding. This happens for 1591 // structs that contain 3 floats. 1592 if (BitsContainNoUserData(SourceTy, SourceOffset*8+32, 1593 SourceOffset*8+64, getContext())) 1594 return llvm::Type::getFloatTy(getVMContext()); 1595 1596 // We want to pass as <2 x float> if the LLVM IR type contains a float at 1597 // offset+0 and offset+4. Walk the LLVM IR type to find out if this is the 1598 // case. 1599 if (ContainsFloatAtOffset(IRType, IROffset, getTargetData()) && 1600 ContainsFloatAtOffset(IRType, IROffset+4, getTargetData())) 1601 return llvm::VectorType::get(llvm::Type::getFloatTy(getVMContext()), 2); 1602 1603 return llvm::Type::getDoubleTy(getVMContext()); 1604} 1605 1606 1607/// GetINTEGERTypeAtOffset - The ABI specifies that a value should be passed in 1608/// an 8-byte GPR. This means that we either have a scalar or we are talking 1609/// about the high or low part of an up-to-16-byte struct. This routine picks 1610/// the best LLVM IR type to represent this, which may be i64 or may be anything 1611/// else that the backend will pass in a GPR that works better (e.g. i8, %foo*, 1612/// etc). 1613/// 1614/// PrefType is an LLVM IR type that corresponds to (part of) the IR type for 1615/// the source type. IROffset is an offset in bytes into the LLVM IR type that 1616/// the 8-byte value references. PrefType may be null. 1617/// 1618/// SourceTy is the source level type for the entire argument. SourceOffset is 1619/// an offset into this that we're processing (which is always either 0 or 8). 1620/// 1621llvm::Type *X86_64ABIInfo:: 1622GetINTEGERTypeAtOffset(llvm::Type *IRType, unsigned IROffset, 1623 QualType SourceTy, unsigned SourceOffset) const { 1624 // If we're dealing with an un-offset LLVM IR type, then it means that we're 1625 // returning an 8-byte unit starting with it. See if we can safely use it. 1626 if (IROffset == 0) { 1627 // Pointers and int64's always fill the 8-byte unit. 1628 if (isa<llvm::PointerType>(IRType) || IRType->isIntegerTy(64)) 1629 return IRType; 1630 1631 // If we have a 1/2/4-byte integer, we can use it only if the rest of the 1632 // goodness in the source type is just tail padding. This is allowed to 1633 // kick in for struct {double,int} on the int, but not on 1634 // struct{double,int,int} because we wouldn't return the second int. We 1635 // have to do this analysis on the source type because we can't depend on 1636 // unions being lowered a specific way etc. 1637 if (IRType->isIntegerTy(8) || IRType->isIntegerTy(16) || 1638 IRType->isIntegerTy(32)) { 1639 unsigned BitWidth = cast<llvm::IntegerType>(IRType)->getBitWidth(); 1640 1641 if (BitsContainNoUserData(SourceTy, SourceOffset*8+BitWidth, 1642 SourceOffset*8+64, getContext())) 1643 return IRType; 1644 } 1645 } 1646 1647 if (llvm::StructType *STy = dyn_cast<llvm::StructType>(IRType)) { 1648 // If this is a struct, recurse into the field at the specified offset. 1649 const llvm::StructLayout *SL = getTargetData().getStructLayout(STy); 1650 if (IROffset < SL->getSizeInBytes()) { 1651 unsigned FieldIdx = SL->getElementContainingOffset(IROffset); 1652 IROffset -= SL->getElementOffset(FieldIdx); 1653 1654 return GetINTEGERTypeAtOffset(STy->getElementType(FieldIdx), IROffset, 1655 SourceTy, SourceOffset); 1656 } 1657 } 1658 1659 if (llvm::ArrayType *ATy = dyn_cast<llvm::ArrayType>(IRType)) { 1660 llvm::Type *EltTy = ATy->getElementType(); 1661 unsigned EltSize = getTargetData().getTypeAllocSize(EltTy); 1662 unsigned EltOffset = IROffset/EltSize*EltSize; 1663 return GetINTEGERTypeAtOffset(EltTy, IROffset-EltOffset, SourceTy, 1664 SourceOffset); 1665 } 1666 1667 // Okay, we don't have any better idea of what to pass, so we pass this in an 1668 // integer register that isn't too big to fit the rest of the struct. 1669 unsigned TySizeInBytes = 1670 (unsigned)getContext().getTypeSizeInChars(SourceTy).getQuantity(); 1671 1672 assert(TySizeInBytes != SourceOffset && "Empty field?"); 1673 1674 // It is always safe to classify this as an integer type up to i64 that 1675 // isn't larger than the structure. 1676 return llvm::IntegerType::get(getVMContext(), 1677 std::min(TySizeInBytes-SourceOffset, 8U)*8); 1678} 1679 1680 1681/// GetX86_64ByValArgumentPair - Given a high and low type that can ideally 1682/// be used as elements of a two register pair to pass or return, return a 1683/// first class aggregate to represent them. For example, if the low part of 1684/// a by-value argument should be passed as i32* and the high part as float, 1685/// return {i32*, float}. 1686static llvm::Type * 1687GetX86_64ByValArgumentPair(llvm::Type *Lo, llvm::Type *Hi, 1688 const llvm::TargetData &TD) { 1689 // In order to correctly satisfy the ABI, we need to the high part to start 1690 // at offset 8. If the high and low parts we inferred are both 4-byte types 1691 // (e.g. i32 and i32) then the resultant struct type ({i32,i32}) won't have 1692 // the second element at offset 8. Check for this: 1693 unsigned LoSize = (unsigned)TD.getTypeAllocSize(Lo); 1694 unsigned HiAlign = TD.getABITypeAlignment(Hi); 1695 unsigned HiStart = llvm::TargetData::RoundUpAlignment(LoSize, HiAlign); 1696 assert(HiStart != 0 && HiStart <= 8 && "Invalid x86-64 argument pair!"); 1697 1698 // To handle this, we have to increase the size of the low part so that the 1699 // second element will start at an 8 byte offset. We can't increase the size 1700 // of the second element because it might make us access off the end of the 1701 // struct. 1702 if (HiStart != 8) { 1703 // There are only two sorts of types the ABI generation code can produce for 1704 // the low part of a pair that aren't 8 bytes in size: float or i8/i16/i32. 1705 // Promote these to a larger type. 1706 if (Lo->isFloatTy()) 1707 Lo = llvm::Type::getDoubleTy(Lo->getContext()); 1708 else { 1709 assert(Lo->isIntegerTy() && "Invalid/unknown lo type"); 1710 Lo = llvm::Type::getInt64Ty(Lo->getContext()); 1711 } 1712 } 1713 1714 llvm::StructType *Result = llvm::StructType::get(Lo, Hi, NULL); 1715 1716 1717 // Verify that the second element is at an 8-byte offset. 1718 assert(TD.getStructLayout(Result)->getElementOffset(1) == 8 && 1719 "Invalid x86-64 argument pair!"); 1720 return Result; 1721} 1722 1723ABIArgInfo X86_64ABIInfo:: 1724classifyReturnType(QualType RetTy) const { 1725 // AMD64-ABI 3.2.3p4: Rule 1. Classify the return type with the 1726 // classification algorithm. 1727 X86_64ABIInfo::Class Lo, Hi; 1728 classify(RetTy, 0, Lo, Hi); 1729 1730 // Check some invariants. 1731 assert((Hi != Memory || Lo == Memory) && "Invalid memory classification."); 1732 assert((Hi != SSEUp || Lo == SSE) && "Invalid SSEUp classification."); 1733 1734 llvm::Type *ResType = 0; 1735 switch (Lo) { 1736 case NoClass: 1737 if (Hi == NoClass) 1738 return ABIArgInfo::getIgnore(); 1739 // If the low part is just padding, it takes no register, leave ResType 1740 // null. 1741 assert((Hi == SSE || Hi == Integer || Hi == X87Up) && 1742 "Unknown missing lo part"); 1743 break; 1744 1745 case SSEUp: 1746 case X87Up: 1747 llvm_unreachable("Invalid classification for lo word."); 1748 1749 // AMD64-ABI 3.2.3p4: Rule 2. Types of class memory are returned via 1750 // hidden argument. 1751 case Memory: 1752 return getIndirectReturnResult(RetTy); 1753 1754 // AMD64-ABI 3.2.3p4: Rule 3. If the class is INTEGER, the next 1755 // available register of the sequence %rax, %rdx is used. 1756 case Integer: 1757 ResType = GetINTEGERTypeAtOffset(CGT.ConvertType(RetTy), 0, RetTy, 0); 1758 1759 // If we have a sign or zero extended integer, make sure to return Extend 1760 // so that the parameter gets the right LLVM IR attributes. 1761 if (Hi == NoClass && isa<llvm::IntegerType>(ResType)) { 1762 // Treat an enum type as its underlying type. 1763 if (const EnumType *EnumTy = RetTy->getAs<EnumType>()) 1764 RetTy = EnumTy->getDecl()->getIntegerType(); 1765 1766 if (RetTy->isIntegralOrEnumerationType() && 1767 RetTy->isPromotableIntegerType()) 1768 return ABIArgInfo::getExtend(); 1769 } 1770 break; 1771 1772 // AMD64-ABI 3.2.3p4: Rule 4. If the class is SSE, the next 1773 // available SSE register of the sequence %xmm0, %xmm1 is used. 1774 case SSE: 1775 ResType = GetSSETypeAtOffset(CGT.ConvertType(RetTy), 0, RetTy, 0); 1776 break; 1777 1778 // AMD64-ABI 3.2.3p4: Rule 6. If the class is X87, the value is 1779 // returned on the X87 stack in %st0 as 80-bit x87 number. 1780 case X87: 1781 ResType = llvm::Type::getX86_FP80Ty(getVMContext()); 1782 break; 1783 1784 // AMD64-ABI 3.2.3p4: Rule 8. If the class is COMPLEX_X87, the real 1785 // part of the value is returned in %st0 and the imaginary part in 1786 // %st1. 1787 case ComplexX87: 1788 assert(Hi == ComplexX87 && "Unexpected ComplexX87 classification."); 1789 ResType = llvm::StructType::get(llvm::Type::getX86_FP80Ty(getVMContext()), 1790 llvm::Type::getX86_FP80Ty(getVMContext()), 1791 NULL); 1792 break; 1793 } 1794 1795 llvm::Type *HighPart = 0; 1796 switch (Hi) { 1797 // Memory was handled previously and X87 should 1798 // never occur as a hi class. 1799 case Memory: 1800 case X87: 1801 llvm_unreachable("Invalid classification for hi word."); 1802 1803 case ComplexX87: // Previously handled. 1804 case NoClass: 1805 break; 1806 1807 case Integer: 1808 HighPart = GetINTEGERTypeAtOffset(CGT.ConvertType(RetTy), 8, RetTy, 8); 1809 if (Lo == NoClass) // Return HighPart at offset 8 in memory. 1810 return ABIArgInfo::getDirect(HighPart, 8); 1811 break; 1812 case SSE: 1813 HighPart = GetSSETypeAtOffset(CGT.ConvertType(RetTy), 8, RetTy, 8); 1814 if (Lo == NoClass) // Return HighPart at offset 8 in memory. 1815 return ABIArgInfo::getDirect(HighPart, 8); 1816 break; 1817 1818 // AMD64-ABI 3.2.3p4: Rule 5. If the class is SSEUP, the eightbyte 1819 // is passed in the next available eightbyte chunk if the last used 1820 // vector register. 1821 // 1822 // SSEUP should always be preceded by SSE, just widen. 1823 case SSEUp: 1824 assert(Lo == SSE && "Unexpected SSEUp classification."); 1825 ResType = GetByteVectorType(RetTy); 1826 break; 1827 1828 // AMD64-ABI 3.2.3p4: Rule 7. If the class is X87UP, the value is 1829 // returned together with the previous X87 value in %st0. 1830 case X87Up: 1831 // If X87Up is preceded by X87, we don't need to do 1832 // anything. However, in some cases with unions it may not be 1833 // preceded by X87. In such situations we follow gcc and pass the 1834 // extra bits in an SSE reg. 1835 if (Lo != X87) { 1836 HighPart = GetSSETypeAtOffset(CGT.ConvertType(RetTy), 8, RetTy, 8); 1837 if (Lo == NoClass) // Return HighPart at offset 8 in memory. 1838 return ABIArgInfo::getDirect(HighPart, 8); 1839 } 1840 break; 1841 } 1842 1843 // If a high part was specified, merge it together with the low part. It is 1844 // known to pass in the high eightbyte of the result. We do this by forming a 1845 // first class struct aggregate with the high and low part: {low, high} 1846 if (HighPart) 1847 ResType = GetX86_64ByValArgumentPair(ResType, HighPart, getTargetData()); 1848 1849 return ABIArgInfo::getDirect(ResType); 1850} 1851 1852ABIArgInfo X86_64ABIInfo::classifyArgumentType(QualType Ty, unsigned &neededInt, 1853 unsigned &neededSSE) const { 1854 X86_64ABIInfo::Class Lo, Hi; 1855 classify(Ty, 0, Lo, Hi); 1856 1857 // Check some invariants. 1858 // FIXME: Enforce these by construction. 1859 assert((Hi != Memory || Lo == Memory) && "Invalid memory classification."); 1860 assert((Hi != SSEUp || Lo == SSE) && "Invalid SSEUp classification."); 1861 1862 neededInt = 0; 1863 neededSSE = 0; 1864 llvm::Type *ResType = 0; 1865 switch (Lo) { 1866 case NoClass: 1867 if (Hi == NoClass) 1868 return ABIArgInfo::getIgnore(); 1869 // If the low part is just padding, it takes no register, leave ResType 1870 // null. 1871 assert((Hi == SSE || Hi == Integer || Hi == X87Up) && 1872 "Unknown missing lo part"); 1873 break; 1874 1875 // AMD64-ABI 3.2.3p3: Rule 1. If the class is MEMORY, pass the argument 1876 // on the stack. 1877 case Memory: 1878 1879 // AMD64-ABI 3.2.3p3: Rule 5. If the class is X87, X87UP or 1880 // COMPLEX_X87, it is passed in memory. 1881 case X87: 1882 case ComplexX87: 1883 if (isRecordWithNonTrivialDestructorOrCopyConstructor(Ty)) 1884 ++neededInt; 1885 return getIndirectResult(Ty); 1886 1887 case SSEUp: 1888 case X87Up: 1889 llvm_unreachable("Invalid classification for lo word."); 1890 1891 // AMD64-ABI 3.2.3p3: Rule 2. If the class is INTEGER, the next 1892 // available register of the sequence %rdi, %rsi, %rdx, %rcx, %r8 1893 // and %r9 is used. 1894 case Integer: 1895 ++neededInt; 1896 1897 // Pick an 8-byte type based on the preferred type. 1898 ResType = GetINTEGERTypeAtOffset(CGT.ConvertType(Ty), 0, Ty, 0); 1899 1900 // If we have a sign or zero extended integer, make sure to return Extend 1901 // so that the parameter gets the right LLVM IR attributes. 1902 if (Hi == NoClass && isa<llvm::IntegerType>(ResType)) { 1903 // Treat an enum type as its underlying type. 1904 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 1905 Ty = EnumTy->getDecl()->getIntegerType(); 1906 1907 if (Ty->isIntegralOrEnumerationType() && 1908 Ty->isPromotableIntegerType()) 1909 return ABIArgInfo::getExtend(); 1910 } 1911 1912 break; 1913 1914 // AMD64-ABI 3.2.3p3: Rule 3. If the class is SSE, the next 1915 // available SSE register is used, the registers are taken in the 1916 // order from %xmm0 to %xmm7. 1917 case SSE: { 1918 llvm::Type *IRType = CGT.ConvertType(Ty); 1919 ResType = GetSSETypeAtOffset(IRType, 0, Ty, 0); 1920 ++neededSSE; 1921 break; 1922 } 1923 } 1924 1925 llvm::Type *HighPart = 0; 1926 switch (Hi) { 1927 // Memory was handled previously, ComplexX87 and X87 should 1928 // never occur as hi classes, and X87Up must be preceded by X87, 1929 // which is passed in memory. 1930 case Memory: 1931 case X87: 1932 case ComplexX87: 1933 llvm_unreachable("Invalid classification for hi word."); 1934 1935 case NoClass: break; 1936 1937 case Integer: 1938 ++neededInt; 1939 // Pick an 8-byte type based on the preferred type. 1940 HighPart = GetINTEGERTypeAtOffset(CGT.ConvertType(Ty), 8, Ty, 8); 1941 1942 if (Lo == NoClass) // Pass HighPart at offset 8 in memory. 1943 return ABIArgInfo::getDirect(HighPart, 8); 1944 break; 1945 1946 // X87Up generally doesn't occur here (long double is passed in 1947 // memory), except in situations involving unions. 1948 case X87Up: 1949 case SSE: 1950 HighPart = GetSSETypeAtOffset(CGT.ConvertType(Ty), 8, Ty, 8); 1951 1952 if (Lo == NoClass) // Pass HighPart at offset 8 in memory. 1953 return ABIArgInfo::getDirect(HighPart, 8); 1954 1955 ++neededSSE; 1956 break; 1957 1958 // AMD64-ABI 3.2.3p3: Rule 4. If the class is SSEUP, the 1959 // eightbyte is passed in the upper half of the last used SSE 1960 // register. This only happens when 128-bit vectors are passed. 1961 case SSEUp: 1962 assert(Lo == SSE && "Unexpected SSEUp classification"); 1963 ResType = GetByteVectorType(Ty); 1964 break; 1965 } 1966 1967 // If a high part was specified, merge it together with the low part. It is 1968 // known to pass in the high eightbyte of the result. We do this by forming a 1969 // first class struct aggregate with the high and low part: {low, high} 1970 if (HighPart) 1971 ResType = GetX86_64ByValArgumentPair(ResType, HighPart, getTargetData()); 1972 1973 return ABIArgInfo::getDirect(ResType); 1974} 1975 1976void X86_64ABIInfo::computeInfo(CGFunctionInfo &FI) const { 1977 1978 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 1979 1980 // Keep track of the number of assigned registers. 1981 unsigned freeIntRegs = 6, freeSSERegs = 8; 1982 1983 // If the return value is indirect, then the hidden argument is consuming one 1984 // integer register. 1985 if (FI.getReturnInfo().isIndirect()) 1986 --freeIntRegs; 1987 1988 // AMD64-ABI 3.2.3p3: Once arguments are classified, the registers 1989 // get assigned (in left-to-right order) for passing as follows... 1990 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 1991 it != ie; ++it) { 1992 unsigned neededInt, neededSSE; 1993 it->info = classifyArgumentType(it->type, neededInt, neededSSE); 1994 1995 // AMD64-ABI 3.2.3p3: If there are no registers available for any 1996 // eightbyte of an argument, the whole argument is passed on the 1997 // stack. If registers have already been assigned for some 1998 // eightbytes of such an argument, the assignments get reverted. 1999 if (freeIntRegs >= neededInt && freeSSERegs >= neededSSE) { 2000 freeIntRegs -= neededInt; 2001 freeSSERegs -= neededSSE; 2002 } else { 2003 it->info = getIndirectResult(it->type); 2004 } 2005 } 2006} 2007 2008static llvm::Value *EmitVAArgFromMemory(llvm::Value *VAListAddr, 2009 QualType Ty, 2010 CodeGenFunction &CGF) { 2011 llvm::Value *overflow_arg_area_p = 2012 CGF.Builder.CreateStructGEP(VAListAddr, 2, "overflow_arg_area_p"); 2013 llvm::Value *overflow_arg_area = 2014 CGF.Builder.CreateLoad(overflow_arg_area_p, "overflow_arg_area"); 2015 2016 // AMD64-ABI 3.5.7p5: Step 7. Align l->overflow_arg_area upwards to a 16 2017 // byte boundary if alignment needed by type exceeds 8 byte boundary. 2018 // It isn't stated explicitly in the standard, but in practice we use 2019 // alignment greater than 16 where necessary. 2020 uint64_t Align = CGF.getContext().getTypeAlign(Ty) / 8; 2021 if (Align > 8) { 2022 // overflow_arg_area = (overflow_arg_area + align - 1) & -align; 2023 llvm::Value *Offset = 2024 llvm::ConstantInt::get(CGF.Int64Ty, Align - 1); 2025 overflow_arg_area = CGF.Builder.CreateGEP(overflow_arg_area, Offset); 2026 llvm::Value *AsInt = CGF.Builder.CreatePtrToInt(overflow_arg_area, 2027 CGF.Int64Ty); 2028 llvm::Value *Mask = llvm::ConstantInt::get(CGF.Int64Ty, -(uint64_t)Align); 2029 overflow_arg_area = 2030 CGF.Builder.CreateIntToPtr(CGF.Builder.CreateAnd(AsInt, Mask), 2031 overflow_arg_area->getType(), 2032 "overflow_arg_area.align"); 2033 } 2034 2035 // AMD64-ABI 3.5.7p5: Step 8. Fetch type from l->overflow_arg_area. 2036 llvm::Type *LTy = CGF.ConvertTypeForMem(Ty); 2037 llvm::Value *Res = 2038 CGF.Builder.CreateBitCast(overflow_arg_area, 2039 llvm::PointerType::getUnqual(LTy)); 2040 2041 // AMD64-ABI 3.5.7p5: Step 9. Set l->overflow_arg_area to: 2042 // l->overflow_arg_area + sizeof(type). 2043 // AMD64-ABI 3.5.7p5: Step 10. Align l->overflow_arg_area upwards to 2044 // an 8 byte boundary. 2045 2046 uint64_t SizeInBytes = (CGF.getContext().getTypeSize(Ty) + 7) / 8; 2047 llvm::Value *Offset = 2048 llvm::ConstantInt::get(CGF.Int32Ty, (SizeInBytes + 7) & ~7); 2049 overflow_arg_area = CGF.Builder.CreateGEP(overflow_arg_area, Offset, 2050 "overflow_arg_area.next"); 2051 CGF.Builder.CreateStore(overflow_arg_area, overflow_arg_area_p); 2052 2053 // AMD64-ABI 3.5.7p5: Step 11. Return the fetched type. 2054 return Res; 2055} 2056 2057llvm::Value *X86_64ABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 2058 CodeGenFunction &CGF) const { 2059 // Assume that va_list type is correct; should be pointer to LLVM type: 2060 // struct { 2061 // i32 gp_offset; 2062 // i32 fp_offset; 2063 // i8* overflow_arg_area; 2064 // i8* reg_save_area; 2065 // }; 2066 unsigned neededInt, neededSSE; 2067 2068 Ty = CGF.getContext().getCanonicalType(Ty); 2069 ABIArgInfo AI = classifyArgumentType(Ty, neededInt, neededSSE); 2070 2071 // AMD64-ABI 3.5.7p5: Step 1. Determine whether type may be passed 2072 // in the registers. If not go to step 7. 2073 if (!neededInt && !neededSSE) 2074 return EmitVAArgFromMemory(VAListAddr, Ty, CGF); 2075 2076 // AMD64-ABI 3.5.7p5: Step 2. Compute num_gp to hold the number of 2077 // general purpose registers needed to pass type and num_fp to hold 2078 // the number of floating point registers needed. 2079 2080 // AMD64-ABI 3.5.7p5: Step 3. Verify whether arguments fit into 2081 // registers. In the case: l->gp_offset > 48 - num_gp * 8 or 2082 // l->fp_offset > 304 - num_fp * 16 go to step 7. 2083 // 2084 // NOTE: 304 is a typo, there are (6 * 8 + 8 * 16) = 176 bytes of 2085 // register save space). 2086 2087 llvm::Value *InRegs = 0; 2088 llvm::Value *gp_offset_p = 0, *gp_offset = 0; 2089 llvm::Value *fp_offset_p = 0, *fp_offset = 0; 2090 if (neededInt) { 2091 gp_offset_p = CGF.Builder.CreateStructGEP(VAListAddr, 0, "gp_offset_p"); 2092 gp_offset = CGF.Builder.CreateLoad(gp_offset_p, "gp_offset"); 2093 InRegs = llvm::ConstantInt::get(CGF.Int32Ty, 48 - neededInt * 8); 2094 InRegs = CGF.Builder.CreateICmpULE(gp_offset, InRegs, "fits_in_gp"); 2095 } 2096 2097 if (neededSSE) { 2098 fp_offset_p = CGF.Builder.CreateStructGEP(VAListAddr, 1, "fp_offset_p"); 2099 fp_offset = CGF.Builder.CreateLoad(fp_offset_p, "fp_offset"); 2100 llvm::Value *FitsInFP = 2101 llvm::ConstantInt::get(CGF.Int32Ty, 176 - neededSSE * 16); 2102 FitsInFP = CGF.Builder.CreateICmpULE(fp_offset, FitsInFP, "fits_in_fp"); 2103 InRegs = InRegs ? CGF.Builder.CreateAnd(InRegs, FitsInFP) : FitsInFP; 2104 } 2105 2106 llvm::BasicBlock *InRegBlock = CGF.createBasicBlock("vaarg.in_reg"); 2107 llvm::BasicBlock *InMemBlock = CGF.createBasicBlock("vaarg.in_mem"); 2108 llvm::BasicBlock *ContBlock = CGF.createBasicBlock("vaarg.end"); 2109 CGF.Builder.CreateCondBr(InRegs, InRegBlock, InMemBlock); 2110 2111 // Emit code to load the value if it was passed in registers. 2112 2113 CGF.EmitBlock(InRegBlock); 2114 2115 // AMD64-ABI 3.5.7p5: Step 4. Fetch type from l->reg_save_area with 2116 // an offset of l->gp_offset and/or l->fp_offset. This may require 2117 // copying to a temporary location in case the parameter is passed 2118 // in different register classes or requires an alignment greater 2119 // than 8 for general purpose registers and 16 for XMM registers. 2120 // 2121 // FIXME: This really results in shameful code when we end up needing to 2122 // collect arguments from different places; often what should result in a 2123 // simple assembling of a structure from scattered addresses has many more 2124 // loads than necessary. Can we clean this up? 2125 llvm::Type *LTy = CGF.ConvertTypeForMem(Ty); 2126 llvm::Value *RegAddr = 2127 CGF.Builder.CreateLoad(CGF.Builder.CreateStructGEP(VAListAddr, 3), 2128 "reg_save_area"); 2129 if (neededInt && neededSSE) { 2130 // FIXME: Cleanup. 2131 assert(AI.isDirect() && "Unexpected ABI info for mixed regs"); 2132 llvm::StructType *ST = cast<llvm::StructType>(AI.getCoerceToType()); 2133 llvm::Value *Tmp = CGF.CreateTempAlloca(ST); 2134 assert(ST->getNumElements() == 2 && "Unexpected ABI info for mixed regs"); 2135 llvm::Type *TyLo = ST->getElementType(0); 2136 llvm::Type *TyHi = ST->getElementType(1); 2137 assert((TyLo->isFPOrFPVectorTy() ^ TyHi->isFPOrFPVectorTy()) && 2138 "Unexpected ABI info for mixed regs"); 2139 llvm::Type *PTyLo = llvm::PointerType::getUnqual(TyLo); 2140 llvm::Type *PTyHi = llvm::PointerType::getUnqual(TyHi); 2141 llvm::Value *GPAddr = CGF.Builder.CreateGEP(RegAddr, gp_offset); 2142 llvm::Value *FPAddr = CGF.Builder.CreateGEP(RegAddr, fp_offset); 2143 llvm::Value *RegLoAddr = TyLo->isFloatingPointTy() ? FPAddr : GPAddr; 2144 llvm::Value *RegHiAddr = TyLo->isFloatingPointTy() ? GPAddr : FPAddr; 2145 llvm::Value *V = 2146 CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegLoAddr, PTyLo)); 2147 CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 0)); 2148 V = CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegHiAddr, PTyHi)); 2149 CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 1)); 2150 2151 RegAddr = CGF.Builder.CreateBitCast(Tmp, 2152 llvm::PointerType::getUnqual(LTy)); 2153 } else if (neededInt) { 2154 RegAddr = CGF.Builder.CreateGEP(RegAddr, gp_offset); 2155 RegAddr = CGF.Builder.CreateBitCast(RegAddr, 2156 llvm::PointerType::getUnqual(LTy)); 2157 } else if (neededSSE == 1) { 2158 RegAddr = CGF.Builder.CreateGEP(RegAddr, fp_offset); 2159 RegAddr = CGF.Builder.CreateBitCast(RegAddr, 2160 llvm::PointerType::getUnqual(LTy)); 2161 } else { 2162 assert(neededSSE == 2 && "Invalid number of needed registers!"); 2163 // SSE registers are spaced 16 bytes apart in the register save 2164 // area, we need to collect the two eightbytes together. 2165 llvm::Value *RegAddrLo = CGF.Builder.CreateGEP(RegAddr, fp_offset); 2166 llvm::Value *RegAddrHi = CGF.Builder.CreateConstGEP1_32(RegAddrLo, 16); 2167 llvm::Type *DoubleTy = CGF.DoubleTy; 2168 llvm::Type *DblPtrTy = 2169 llvm::PointerType::getUnqual(DoubleTy); 2170 llvm::StructType *ST = llvm::StructType::get(DoubleTy, 2171 DoubleTy, NULL); 2172 llvm::Value *V, *Tmp = CGF.CreateTempAlloca(ST); 2173 V = CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegAddrLo, 2174 DblPtrTy)); 2175 CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 0)); 2176 V = CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegAddrHi, 2177 DblPtrTy)); 2178 CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 1)); 2179 RegAddr = CGF.Builder.CreateBitCast(Tmp, 2180 llvm::PointerType::getUnqual(LTy)); 2181 } 2182 2183 // AMD64-ABI 3.5.7p5: Step 5. Set: 2184 // l->gp_offset = l->gp_offset + num_gp * 8 2185 // l->fp_offset = l->fp_offset + num_fp * 16. 2186 if (neededInt) { 2187 llvm::Value *Offset = llvm::ConstantInt::get(CGF.Int32Ty, neededInt * 8); 2188 CGF.Builder.CreateStore(CGF.Builder.CreateAdd(gp_offset, Offset), 2189 gp_offset_p); 2190 } 2191 if (neededSSE) { 2192 llvm::Value *Offset = llvm::ConstantInt::get(CGF.Int32Ty, neededSSE * 16); 2193 CGF.Builder.CreateStore(CGF.Builder.CreateAdd(fp_offset, Offset), 2194 fp_offset_p); 2195 } 2196 CGF.EmitBranch(ContBlock); 2197 2198 // Emit code to load the value if it was passed in memory. 2199 2200 CGF.EmitBlock(InMemBlock); 2201 llvm::Value *MemAddr = EmitVAArgFromMemory(VAListAddr, Ty, CGF); 2202 2203 // Return the appropriate result. 2204 2205 CGF.EmitBlock(ContBlock); 2206 llvm::PHINode *ResAddr = CGF.Builder.CreatePHI(RegAddr->getType(), 2, 2207 "vaarg.addr"); 2208 ResAddr->addIncoming(RegAddr, InRegBlock); 2209 ResAddr->addIncoming(MemAddr, InMemBlock); 2210 return ResAddr; 2211} 2212 2213ABIArgInfo WinX86_64ABIInfo::classify(QualType Ty) const { 2214 2215 if (Ty->isVoidType()) 2216 return ABIArgInfo::getIgnore(); 2217 2218 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 2219 Ty = EnumTy->getDecl()->getIntegerType(); 2220 2221 uint64_t Size = getContext().getTypeSize(Ty); 2222 2223 if (const RecordType *RT = Ty->getAs<RecordType>()) { 2224 if (hasNonTrivialDestructorOrCopyConstructor(RT) || 2225 RT->getDecl()->hasFlexibleArrayMember()) 2226 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 2227 2228 // FIXME: mingw-w64-gcc emits 128-bit struct as i128 2229 if (Size == 128 && 2230 getContext().getTargetInfo().getTriple().getOS() 2231 == llvm::Triple::MinGW32) 2232 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(), 2233 Size)); 2234 2235 // MS x64 ABI requirement: "Any argument that doesn't fit in 8 bytes, or is 2236 // not 1, 2, 4, or 8 bytes, must be passed by reference." 2237 if (Size <= 64 && 2238 (Size & (Size - 1)) == 0) 2239 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(), 2240 Size)); 2241 2242 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 2243 } 2244 2245 if (Ty->isPromotableIntegerType()) 2246 return ABIArgInfo::getExtend(); 2247 2248 return ABIArgInfo::getDirect(); 2249} 2250 2251void WinX86_64ABIInfo::computeInfo(CGFunctionInfo &FI) const { 2252 2253 QualType RetTy = FI.getReturnType(); 2254 FI.getReturnInfo() = classify(RetTy); 2255 2256 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 2257 it != ie; ++it) 2258 it->info = classify(it->type); 2259} 2260 2261llvm::Value *WinX86_64ABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 2262 CodeGenFunction &CGF) const { 2263 llvm::Type *BPP = CGF.Int8PtrPtrTy; 2264 2265 CGBuilderTy &Builder = CGF.Builder; 2266 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP, 2267 "ap"); 2268 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur"); 2269 llvm::Type *PTy = 2270 llvm::PointerType::getUnqual(CGF.ConvertType(Ty)); 2271 llvm::Value *AddrTyped = Builder.CreateBitCast(Addr, PTy); 2272 2273 uint64_t Offset = 2274 llvm::RoundUpToAlignment(CGF.getContext().getTypeSize(Ty) / 8, 8); 2275 llvm::Value *NextAddr = 2276 Builder.CreateGEP(Addr, llvm::ConstantInt::get(CGF.Int32Ty, Offset), 2277 "ap.next"); 2278 Builder.CreateStore(NextAddr, VAListAddrAsBPP); 2279 2280 return AddrTyped; 2281} 2282 2283// PowerPC-32 2284 2285namespace { 2286class PPC32TargetCodeGenInfo : public DefaultTargetCodeGenInfo { 2287public: 2288 PPC32TargetCodeGenInfo(CodeGenTypes &CGT) : DefaultTargetCodeGenInfo(CGT) {} 2289 2290 int getDwarfEHStackPointer(CodeGen::CodeGenModule &M) const { 2291 // This is recovered from gcc output. 2292 return 1; // r1 is the dedicated stack pointer 2293 } 2294 2295 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 2296 llvm::Value *Address) const; 2297}; 2298 2299} 2300 2301bool 2302PPC32TargetCodeGenInfo::initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 2303 llvm::Value *Address) const { 2304 // This is calculated from the LLVM and GCC tables and verified 2305 // against gcc output. AFAIK all ABIs use the same encoding. 2306 2307 CodeGen::CGBuilderTy &Builder = CGF.Builder; 2308 2309 llvm::IntegerType *i8 = CGF.Int8Ty; 2310 llvm::Value *Four8 = llvm::ConstantInt::get(i8, 4); 2311 llvm::Value *Eight8 = llvm::ConstantInt::get(i8, 8); 2312 llvm::Value *Sixteen8 = llvm::ConstantInt::get(i8, 16); 2313 2314 // 0-31: r0-31, the 4-byte general-purpose registers 2315 AssignToArrayRange(Builder, Address, Four8, 0, 31); 2316 2317 // 32-63: fp0-31, the 8-byte floating-point registers 2318 AssignToArrayRange(Builder, Address, Eight8, 32, 63); 2319 2320 // 64-76 are various 4-byte special-purpose registers: 2321 // 64: mq 2322 // 65: lr 2323 // 66: ctr 2324 // 67: ap 2325 // 68-75 cr0-7 2326 // 76: xer 2327 AssignToArrayRange(Builder, Address, Four8, 64, 76); 2328 2329 // 77-108: v0-31, the 16-byte vector registers 2330 AssignToArrayRange(Builder, Address, Sixteen8, 77, 108); 2331 2332 // 109: vrsave 2333 // 110: vscr 2334 // 111: spe_acc 2335 // 112: spefscr 2336 // 113: sfp 2337 AssignToArrayRange(Builder, Address, Four8, 109, 113); 2338 2339 return false; 2340} 2341 2342 2343//===----------------------------------------------------------------------===// 2344// ARM ABI Implementation 2345//===----------------------------------------------------------------------===// 2346 2347namespace { 2348 2349class ARMABIInfo : public ABIInfo { 2350public: 2351 enum ABIKind { 2352 APCS = 0, 2353 AAPCS = 1, 2354 AAPCS_VFP 2355 }; 2356 2357private: 2358 ABIKind Kind; 2359 2360public: 2361 ARMABIInfo(CodeGenTypes &CGT, ABIKind _Kind) : ABIInfo(CGT), Kind(_Kind) {} 2362 2363 bool isEABI() const { 2364 StringRef Env = 2365 getContext().getTargetInfo().getTriple().getEnvironmentName(); 2366 return (Env == "gnueabi" || Env == "eabi" || Env == "androideabi"); 2367 } 2368 2369private: 2370 ABIKind getABIKind() const { return Kind; } 2371 2372 ABIArgInfo classifyReturnType(QualType RetTy) const; 2373 ABIArgInfo classifyArgumentType(QualType RetTy) const; 2374 2375 virtual void computeInfo(CGFunctionInfo &FI) const; 2376 2377 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 2378 CodeGenFunction &CGF) const; 2379}; 2380 2381class ARMTargetCodeGenInfo : public TargetCodeGenInfo { 2382public: 2383 ARMTargetCodeGenInfo(CodeGenTypes &CGT, ARMABIInfo::ABIKind K) 2384 :TargetCodeGenInfo(new ARMABIInfo(CGT, K)) {} 2385 2386 const ARMABIInfo &getABIInfo() const { 2387 return static_cast<const ARMABIInfo&>(TargetCodeGenInfo::getABIInfo()); 2388 } 2389 2390 int getDwarfEHStackPointer(CodeGen::CodeGenModule &M) const { 2391 return 13; 2392 } 2393 2394 StringRef getARCRetainAutoreleasedReturnValueMarker() const { 2395 return "mov\tr7, r7\t\t@ marker for objc_retainAutoreleaseReturnValue"; 2396 } 2397 2398 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 2399 llvm::Value *Address) const { 2400 llvm::Value *Four8 = llvm::ConstantInt::get(CGF.Int8Ty, 4); 2401 2402 // 0-15 are the 16 integer registers. 2403 AssignToArrayRange(CGF.Builder, Address, Four8, 0, 15); 2404 return false; 2405 } 2406 2407 unsigned getSizeOfUnwindException() const { 2408 if (getABIInfo().isEABI()) return 88; 2409 return TargetCodeGenInfo::getSizeOfUnwindException(); 2410 } 2411}; 2412 2413} 2414 2415void ARMABIInfo::computeInfo(CGFunctionInfo &FI) const { 2416 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 2417 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 2418 it != ie; ++it) 2419 it->info = classifyArgumentType(it->type); 2420 2421 // Always honor user-specified calling convention. 2422 if (FI.getCallingConvention() != llvm::CallingConv::C) 2423 return; 2424 2425 // Calling convention as default by an ABI. 2426 llvm::CallingConv::ID DefaultCC; 2427 if (isEABI()) 2428 DefaultCC = llvm::CallingConv::ARM_AAPCS; 2429 else 2430 DefaultCC = llvm::CallingConv::ARM_APCS; 2431 2432 // If user did not ask for specific calling convention explicitly (e.g. via 2433 // pcs attribute), set effective calling convention if it's different than ABI 2434 // default. 2435 switch (getABIKind()) { 2436 case APCS: 2437 if (DefaultCC != llvm::CallingConv::ARM_APCS) 2438 FI.setEffectiveCallingConvention(llvm::CallingConv::ARM_APCS); 2439 break; 2440 case AAPCS: 2441 if (DefaultCC != llvm::CallingConv::ARM_AAPCS) 2442 FI.setEffectiveCallingConvention(llvm::CallingConv::ARM_AAPCS); 2443 break; 2444 case AAPCS_VFP: 2445 if (DefaultCC != llvm::CallingConv::ARM_AAPCS_VFP) 2446 FI.setEffectiveCallingConvention(llvm::CallingConv::ARM_AAPCS_VFP); 2447 break; 2448 } 2449} 2450 2451/// isHomogeneousAggregate - Return true if a type is an AAPCS-VFP homogeneous 2452/// aggregate. If HAMembers is non-null, the number of base elements 2453/// contained in the type is returned through it; this is used for the 2454/// recursive calls that check aggregate component types. 2455static bool isHomogeneousAggregate(QualType Ty, const Type *&Base, 2456 ASTContext &Context, 2457 uint64_t *HAMembers = 0) { 2458 uint64_t Members; 2459 if (const ConstantArrayType *AT = Context.getAsConstantArrayType(Ty)) { 2460 if (!isHomogeneousAggregate(AT->getElementType(), Base, Context, &Members)) 2461 return false; 2462 Members *= AT->getSize().getZExtValue(); 2463 } else if (const RecordType *RT = Ty->getAs<RecordType>()) { 2464 const RecordDecl *RD = RT->getDecl(); 2465 if (RD->isUnion() || RD->hasFlexibleArrayMember()) 2466 return false; 2467 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) { 2468 if (!CXXRD->isAggregate()) 2469 return false; 2470 } 2471 Members = 0; 2472 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 2473 i != e; ++i) { 2474 const FieldDecl *FD = *i; 2475 uint64_t FldMembers; 2476 if (!isHomogeneousAggregate(FD->getType(), Base, Context, &FldMembers)) 2477 return false; 2478 Members += FldMembers; 2479 } 2480 } else { 2481 Members = 1; 2482 if (const ComplexType *CT = Ty->getAs<ComplexType>()) { 2483 Members = 2; 2484 Ty = CT->getElementType(); 2485 } 2486 2487 // Homogeneous aggregates for AAPCS-VFP must have base types of float, 2488 // double, or 64-bit or 128-bit vectors. 2489 if (const BuiltinType *BT = Ty->getAs<BuiltinType>()) { 2490 if (BT->getKind() != BuiltinType::Float && 2491 BT->getKind() != BuiltinType::Double) 2492 return false; 2493 } else if (const VectorType *VT = Ty->getAs<VectorType>()) { 2494 unsigned VecSize = Context.getTypeSize(VT); 2495 if (VecSize != 64 && VecSize != 128) 2496 return false; 2497 } else { 2498 return false; 2499 } 2500 2501 // The base type must be the same for all members. Vector types of the 2502 // same total size are treated as being equivalent here. 2503 const Type *TyPtr = Ty.getTypePtr(); 2504 if (!Base) 2505 Base = TyPtr; 2506 if (Base != TyPtr && 2507 (!Base->isVectorType() || !TyPtr->isVectorType() || 2508 Context.getTypeSize(Base) != Context.getTypeSize(TyPtr))) 2509 return false; 2510 } 2511 2512 // Homogeneous Aggregates can have at most 4 members of the base type. 2513 if (HAMembers) 2514 *HAMembers = Members; 2515 return (Members <= 4); 2516} 2517 2518ABIArgInfo ARMABIInfo::classifyArgumentType(QualType Ty) const { 2519 if (!isAggregateTypeForABI(Ty)) { 2520 // Treat an enum type as its underlying type. 2521 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 2522 Ty = EnumTy->getDecl()->getIntegerType(); 2523 2524 return (Ty->isPromotableIntegerType() ? 2525 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 2526 } 2527 2528 // Ignore empty records. 2529 if (isEmptyRecord(getContext(), Ty, true)) 2530 return ABIArgInfo::getIgnore(); 2531 2532 // Structures with either a non-trivial destructor or a non-trivial 2533 // copy constructor are always indirect. 2534 if (isRecordWithNonTrivialDestructorOrCopyConstructor(Ty)) 2535 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 2536 2537 if (getABIKind() == ARMABIInfo::AAPCS_VFP) { 2538 // Homogeneous Aggregates need to be expanded. 2539 const Type *Base = 0; 2540 if (isHomogeneousAggregate(Ty, Base, getContext())) 2541 return ABIArgInfo::getExpand(); 2542 } 2543 2544 // Otherwise, pass by coercing to a structure of the appropriate size. 2545 // 2546 // FIXME: This is kind of nasty... but there isn't much choice because the ARM 2547 // backend doesn't support byval. 2548 // FIXME: This doesn't handle alignment > 64 bits. 2549 llvm::Type* ElemTy; 2550 unsigned SizeRegs; 2551 if (getContext().getTypeAlign(Ty) > 32) { 2552 ElemTy = llvm::Type::getInt64Ty(getVMContext()); 2553 SizeRegs = (getContext().getTypeSize(Ty) + 63) / 64; 2554 } else { 2555 ElemTy = llvm::Type::getInt32Ty(getVMContext()); 2556 SizeRegs = (getContext().getTypeSize(Ty) + 31) / 32; 2557 } 2558 2559 llvm::Type *STy = 2560 llvm::StructType::get(llvm::ArrayType::get(ElemTy, SizeRegs), NULL); 2561 return ABIArgInfo::getDirect(STy); 2562} 2563 2564static bool isIntegerLikeType(QualType Ty, ASTContext &Context, 2565 llvm::LLVMContext &VMContext) { 2566 // APCS, C Language Calling Conventions, Non-Simple Return Values: A structure 2567 // is called integer-like if its size is less than or equal to one word, and 2568 // the offset of each of its addressable sub-fields is zero. 2569 2570 uint64_t Size = Context.getTypeSize(Ty); 2571 2572 // Check that the type fits in a word. 2573 if (Size > 32) 2574 return false; 2575 2576 // FIXME: Handle vector types! 2577 if (Ty->isVectorType()) 2578 return false; 2579 2580 // Float types are never treated as "integer like". 2581 if (Ty->isRealFloatingType()) 2582 return false; 2583 2584 // If this is a builtin or pointer type then it is ok. 2585 if (Ty->getAs<BuiltinType>() || Ty->isPointerType()) 2586 return true; 2587 2588 // Small complex integer types are "integer like". 2589 if (const ComplexType *CT = Ty->getAs<ComplexType>()) 2590 return isIntegerLikeType(CT->getElementType(), Context, VMContext); 2591 2592 // Single element and zero sized arrays should be allowed, by the definition 2593 // above, but they are not. 2594 2595 // Otherwise, it must be a record type. 2596 const RecordType *RT = Ty->getAs<RecordType>(); 2597 if (!RT) return false; 2598 2599 // Ignore records with flexible arrays. 2600 const RecordDecl *RD = RT->getDecl(); 2601 if (RD->hasFlexibleArrayMember()) 2602 return false; 2603 2604 // Check that all sub-fields are at offset 0, and are themselves "integer 2605 // like". 2606 const ASTRecordLayout &Layout = Context.getASTRecordLayout(RD); 2607 2608 bool HadField = false; 2609 unsigned idx = 0; 2610 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 2611 i != e; ++i, ++idx) { 2612 const FieldDecl *FD = *i; 2613 2614 // Bit-fields are not addressable, we only need to verify they are "integer 2615 // like". We still have to disallow a subsequent non-bitfield, for example: 2616 // struct { int : 0; int x } 2617 // is non-integer like according to gcc. 2618 if (FD->isBitField()) { 2619 if (!RD->isUnion()) 2620 HadField = true; 2621 2622 if (!isIntegerLikeType(FD->getType(), Context, VMContext)) 2623 return false; 2624 2625 continue; 2626 } 2627 2628 // Check if this field is at offset 0. 2629 if (Layout.getFieldOffset(idx) != 0) 2630 return false; 2631 2632 if (!isIntegerLikeType(FD->getType(), Context, VMContext)) 2633 return false; 2634 2635 // Only allow at most one field in a structure. This doesn't match the 2636 // wording above, but follows gcc in situations with a field following an 2637 // empty structure. 2638 if (!RD->isUnion()) { 2639 if (HadField) 2640 return false; 2641 2642 HadField = true; 2643 } 2644 } 2645 2646 return true; 2647} 2648 2649ABIArgInfo ARMABIInfo::classifyReturnType(QualType RetTy) const { 2650 if (RetTy->isVoidType()) 2651 return ABIArgInfo::getIgnore(); 2652 2653 // Large vector types should be returned via memory. 2654 if (RetTy->isVectorType() && getContext().getTypeSize(RetTy) > 128) 2655 return ABIArgInfo::getIndirect(0); 2656 2657 if (!isAggregateTypeForABI(RetTy)) { 2658 // Treat an enum type as its underlying type. 2659 if (const EnumType *EnumTy = RetTy->getAs<EnumType>()) 2660 RetTy = EnumTy->getDecl()->getIntegerType(); 2661 2662 return (RetTy->isPromotableIntegerType() ? 2663 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 2664 } 2665 2666 // Structures with either a non-trivial destructor or a non-trivial 2667 // copy constructor are always indirect. 2668 if (isRecordWithNonTrivialDestructorOrCopyConstructor(RetTy)) 2669 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 2670 2671 // Are we following APCS? 2672 if (getABIKind() == APCS) { 2673 if (isEmptyRecord(getContext(), RetTy, false)) 2674 return ABIArgInfo::getIgnore(); 2675 2676 // Complex types are all returned as packed integers. 2677 // 2678 // FIXME: Consider using 2 x vector types if the back end handles them 2679 // correctly. 2680 if (RetTy->isAnyComplexType()) 2681 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(), 2682 getContext().getTypeSize(RetTy))); 2683 2684 // Integer like structures are returned in r0. 2685 if (isIntegerLikeType(RetTy, getContext(), getVMContext())) { 2686 // Return in the smallest viable integer type. 2687 uint64_t Size = getContext().getTypeSize(RetTy); 2688 if (Size <= 8) 2689 return ABIArgInfo::getDirect(llvm::Type::getInt8Ty(getVMContext())); 2690 if (Size <= 16) 2691 return ABIArgInfo::getDirect(llvm::Type::getInt16Ty(getVMContext())); 2692 return ABIArgInfo::getDirect(llvm::Type::getInt32Ty(getVMContext())); 2693 } 2694 2695 // Otherwise return in memory. 2696 return ABIArgInfo::getIndirect(0); 2697 } 2698 2699 // Otherwise this is an AAPCS variant. 2700 2701 if (isEmptyRecord(getContext(), RetTy, true)) 2702 return ABIArgInfo::getIgnore(); 2703 2704 // Check for homogeneous aggregates with AAPCS-VFP. 2705 if (getABIKind() == AAPCS_VFP) { 2706 const Type *Base = 0; 2707 if (isHomogeneousAggregate(RetTy, Base, getContext())) 2708 // Homogeneous Aggregates are returned directly. 2709 return ABIArgInfo::getDirect(); 2710 } 2711 2712 // Aggregates <= 4 bytes are returned in r0; other aggregates 2713 // are returned indirectly. 2714 uint64_t Size = getContext().getTypeSize(RetTy); 2715 if (Size <= 32) { 2716 // Return in the smallest viable integer type. 2717 if (Size <= 8) 2718 return ABIArgInfo::getDirect(llvm::Type::getInt8Ty(getVMContext())); 2719 if (Size <= 16) 2720 return ABIArgInfo::getDirect(llvm::Type::getInt16Ty(getVMContext())); 2721 return ABIArgInfo::getDirect(llvm::Type::getInt32Ty(getVMContext())); 2722 } 2723 2724 return ABIArgInfo::getIndirect(0); 2725} 2726 2727llvm::Value *ARMABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 2728 CodeGenFunction &CGF) const { 2729 llvm::Type *BP = CGF.Int8PtrTy; 2730 llvm::Type *BPP = CGF.Int8PtrPtrTy; 2731 2732 CGBuilderTy &Builder = CGF.Builder; 2733 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP, "ap"); 2734 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur"); 2735 // Handle address alignment for type alignment > 32 bits 2736 uint64_t TyAlign = CGF.getContext().getTypeAlign(Ty) / 8; 2737 if (TyAlign > 4) { 2738 assert((TyAlign & (TyAlign - 1)) == 0 && 2739 "Alignment is not power of 2!"); 2740 llvm::Value *AddrAsInt = Builder.CreatePtrToInt(Addr, CGF.Int32Ty); 2741 AddrAsInt = Builder.CreateAdd(AddrAsInt, Builder.getInt32(TyAlign - 1)); 2742 AddrAsInt = Builder.CreateAnd(AddrAsInt, Builder.getInt32(~(TyAlign - 1))); 2743 Addr = Builder.CreateIntToPtr(AddrAsInt, BP); 2744 } 2745 llvm::Type *PTy = 2746 llvm::PointerType::getUnqual(CGF.ConvertType(Ty)); 2747 llvm::Value *AddrTyped = Builder.CreateBitCast(Addr, PTy); 2748 2749 uint64_t Offset = 2750 llvm::RoundUpToAlignment(CGF.getContext().getTypeSize(Ty) / 8, 4); 2751 llvm::Value *NextAddr = 2752 Builder.CreateGEP(Addr, llvm::ConstantInt::get(CGF.Int32Ty, Offset), 2753 "ap.next"); 2754 Builder.CreateStore(NextAddr, VAListAddrAsBPP); 2755 2756 return AddrTyped; 2757} 2758 2759//===----------------------------------------------------------------------===// 2760// PTX ABI Implementation 2761//===----------------------------------------------------------------------===// 2762 2763namespace { 2764 2765class PTXABIInfo : public ABIInfo { 2766public: 2767 PTXABIInfo(CodeGenTypes &CGT) : ABIInfo(CGT) {} 2768 2769 ABIArgInfo classifyReturnType(QualType RetTy) const; 2770 ABIArgInfo classifyArgumentType(QualType Ty) const; 2771 2772 virtual void computeInfo(CGFunctionInfo &FI) const; 2773 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 2774 CodeGenFunction &CFG) const; 2775}; 2776 2777class PTXTargetCodeGenInfo : public TargetCodeGenInfo { 2778public: 2779 PTXTargetCodeGenInfo(CodeGenTypes &CGT) 2780 : TargetCodeGenInfo(new PTXABIInfo(CGT)) {} 2781 2782 virtual void SetTargetAttributes(const Decl *D, llvm::GlobalValue *GV, 2783 CodeGen::CodeGenModule &M) const; 2784}; 2785 2786ABIArgInfo PTXABIInfo::classifyReturnType(QualType RetTy) const { 2787 if (RetTy->isVoidType()) 2788 return ABIArgInfo::getIgnore(); 2789 if (isAggregateTypeForABI(RetTy)) 2790 return ABIArgInfo::getIndirect(0); 2791 return ABIArgInfo::getDirect(); 2792} 2793 2794ABIArgInfo PTXABIInfo::classifyArgumentType(QualType Ty) const { 2795 if (isAggregateTypeForABI(Ty)) 2796 return ABIArgInfo::getIndirect(0); 2797 2798 return ABIArgInfo::getDirect(); 2799} 2800 2801void PTXABIInfo::computeInfo(CGFunctionInfo &FI) const { 2802 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 2803 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 2804 it != ie; ++it) 2805 it->info = classifyArgumentType(it->type); 2806 2807 // Always honor user-specified calling convention. 2808 if (FI.getCallingConvention() != llvm::CallingConv::C) 2809 return; 2810 2811 // Calling convention as default by an ABI. 2812 llvm::CallingConv::ID DefaultCC; 2813 const LangOptions &LangOpts = getContext().getLangOptions(); 2814 if (LangOpts.OpenCL || LangOpts.CUDA) { 2815 // If we are in OpenCL or CUDA mode, then default to device functions 2816 DefaultCC = llvm::CallingConv::PTX_Device; 2817 } else { 2818 // If we are in standard C/C++ mode, use the triple to decide on the default 2819 StringRef Env = 2820 getContext().getTargetInfo().getTriple().getEnvironmentName(); 2821 if (Env == "device") 2822 DefaultCC = llvm::CallingConv::PTX_Device; 2823 else 2824 DefaultCC = llvm::CallingConv::PTX_Kernel; 2825 } 2826 FI.setEffectiveCallingConvention(DefaultCC); 2827 2828} 2829 2830llvm::Value *PTXABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 2831 CodeGenFunction &CFG) const { 2832 llvm_unreachable("PTX does not support varargs"); 2833} 2834 2835void PTXTargetCodeGenInfo::SetTargetAttributes(const Decl *D, 2836 llvm::GlobalValue *GV, 2837 CodeGen::CodeGenModule &M) const{ 2838 const FunctionDecl *FD = dyn_cast<FunctionDecl>(D); 2839 if (!FD) return; 2840 2841 llvm::Function *F = cast<llvm::Function>(GV); 2842 2843 // Perform special handling in OpenCL mode 2844 if (M.getLangOptions().OpenCL) { 2845 // Use OpenCL function attributes to set proper calling conventions 2846 // By default, all functions are device functions 2847 if (FD->hasAttr<OpenCLKernelAttr>()) { 2848 // OpenCL __kernel functions get a kernel calling convention 2849 F->setCallingConv(llvm::CallingConv::PTX_Kernel); 2850 // And kernel functions are not subject to inlining 2851 F->addFnAttr(llvm::Attribute::NoInline); 2852 } 2853 } 2854 2855 // Perform special handling in CUDA mode. 2856 if (M.getLangOptions().CUDA) { 2857 // CUDA __global__ functions get a kernel calling convention. Since 2858 // __global__ functions cannot be called from the device, we do not 2859 // need to set the noinline attribute. 2860 if (FD->getAttr<CUDAGlobalAttr>()) 2861 F->setCallingConv(llvm::CallingConv::PTX_Kernel); 2862 } 2863} 2864 2865} 2866 2867//===----------------------------------------------------------------------===// 2868// MBlaze ABI Implementation 2869//===----------------------------------------------------------------------===// 2870 2871namespace { 2872 2873class MBlazeABIInfo : public ABIInfo { 2874public: 2875 MBlazeABIInfo(CodeGenTypes &CGT) : ABIInfo(CGT) {} 2876 2877 bool isPromotableIntegerType(QualType Ty) const; 2878 2879 ABIArgInfo classifyReturnType(QualType RetTy) const; 2880 ABIArgInfo classifyArgumentType(QualType RetTy) const; 2881 2882 virtual void computeInfo(CGFunctionInfo &FI) const { 2883 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 2884 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 2885 it != ie; ++it) 2886 it->info = classifyArgumentType(it->type); 2887 } 2888 2889 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 2890 CodeGenFunction &CGF) const; 2891}; 2892 2893class MBlazeTargetCodeGenInfo : public TargetCodeGenInfo { 2894public: 2895 MBlazeTargetCodeGenInfo(CodeGenTypes &CGT) 2896 : TargetCodeGenInfo(new MBlazeABIInfo(CGT)) {} 2897 void SetTargetAttributes(const Decl *D, llvm::GlobalValue *GV, 2898 CodeGen::CodeGenModule &M) const; 2899}; 2900 2901} 2902 2903bool MBlazeABIInfo::isPromotableIntegerType(QualType Ty) const { 2904 // MBlaze ABI requires all 8 and 16 bit quantities to be extended. 2905 if (const BuiltinType *BT = Ty->getAs<BuiltinType>()) 2906 switch (BT->getKind()) { 2907 case BuiltinType::Bool: 2908 case BuiltinType::Char_S: 2909 case BuiltinType::Char_U: 2910 case BuiltinType::SChar: 2911 case BuiltinType::UChar: 2912 case BuiltinType::Short: 2913 case BuiltinType::UShort: 2914 return true; 2915 default: 2916 return false; 2917 } 2918 return false; 2919} 2920 2921llvm::Value *MBlazeABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 2922 CodeGenFunction &CGF) const { 2923 // FIXME: Implement 2924 return 0; 2925} 2926 2927 2928ABIArgInfo MBlazeABIInfo::classifyReturnType(QualType RetTy) const { 2929 if (RetTy->isVoidType()) 2930 return ABIArgInfo::getIgnore(); 2931 if (isAggregateTypeForABI(RetTy)) 2932 return ABIArgInfo::getIndirect(0); 2933 2934 return (isPromotableIntegerType(RetTy) ? 2935 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 2936} 2937 2938ABIArgInfo MBlazeABIInfo::classifyArgumentType(QualType Ty) const { 2939 if (isAggregateTypeForABI(Ty)) 2940 return ABIArgInfo::getIndirect(0); 2941 2942 return (isPromotableIntegerType(Ty) ? 2943 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 2944} 2945 2946void MBlazeTargetCodeGenInfo::SetTargetAttributes(const Decl *D, 2947 llvm::GlobalValue *GV, 2948 CodeGen::CodeGenModule &M) 2949 const { 2950 const FunctionDecl *FD = dyn_cast<FunctionDecl>(D); 2951 if (!FD) return; 2952 2953 llvm::CallingConv::ID CC = llvm::CallingConv::C; 2954 if (FD->hasAttr<MBlazeInterruptHandlerAttr>()) 2955 CC = llvm::CallingConv::MBLAZE_INTR; 2956 else if (FD->hasAttr<MBlazeSaveVolatilesAttr>()) 2957 CC = llvm::CallingConv::MBLAZE_SVOL; 2958 2959 if (CC != llvm::CallingConv::C) { 2960 // Handle 'interrupt_handler' attribute: 2961 llvm::Function *F = cast<llvm::Function>(GV); 2962 2963 // Step 1: Set ISR calling convention. 2964 F->setCallingConv(CC); 2965 2966 // Step 2: Add attributes goodness. 2967 F->addFnAttr(llvm::Attribute::NoInline); 2968 } 2969 2970 // Step 3: Emit _interrupt_handler alias. 2971 if (CC == llvm::CallingConv::MBLAZE_INTR) 2972 new llvm::GlobalAlias(GV->getType(), llvm::Function::ExternalLinkage, 2973 "_interrupt_handler", GV, &M.getModule()); 2974} 2975 2976 2977//===----------------------------------------------------------------------===// 2978// MSP430 ABI Implementation 2979//===----------------------------------------------------------------------===// 2980 2981namespace { 2982 2983class MSP430TargetCodeGenInfo : public TargetCodeGenInfo { 2984public: 2985 MSP430TargetCodeGenInfo(CodeGenTypes &CGT) 2986 : TargetCodeGenInfo(new DefaultABIInfo(CGT)) {} 2987 void SetTargetAttributes(const Decl *D, llvm::GlobalValue *GV, 2988 CodeGen::CodeGenModule &M) const; 2989}; 2990 2991} 2992 2993void MSP430TargetCodeGenInfo::SetTargetAttributes(const Decl *D, 2994 llvm::GlobalValue *GV, 2995 CodeGen::CodeGenModule &M) const { 2996 if (const FunctionDecl *FD = dyn_cast<FunctionDecl>(D)) { 2997 if (const MSP430InterruptAttr *attr = FD->getAttr<MSP430InterruptAttr>()) { 2998 // Handle 'interrupt' attribute: 2999 llvm::Function *F = cast<llvm::Function>(GV); 3000 3001 // Step 1: Set ISR calling convention. 3002 F->setCallingConv(llvm::CallingConv::MSP430_INTR); 3003 3004 // Step 2: Add attributes goodness. 3005 F->addFnAttr(llvm::Attribute::NoInline); 3006 3007 // Step 3: Emit ISR vector alias. 3008 unsigned Num = attr->getNumber() + 0xffe0; 3009 new llvm::GlobalAlias(GV->getType(), llvm::Function::ExternalLinkage, 3010 "vector_" + Twine::utohexstr(Num), 3011 GV, &M.getModule()); 3012 } 3013 } 3014} 3015 3016//===----------------------------------------------------------------------===// 3017// MIPS ABI Implementation. This works for both little-endian and 3018// big-endian variants. 3019//===----------------------------------------------------------------------===// 3020 3021namespace { 3022class MipsABIInfo : public ABIInfo { 3023 bool IsO32; 3024 unsigned MinABIStackAlignInBytes; 3025 llvm::Type* HandleAggregates(QualType Ty) const; 3026 llvm::Type* returnAggregateInRegs(QualType RetTy, uint64_t Size) const; 3027 llvm::Type* getPaddingType(uint64_t Align, uint64_t Offset) const; 3028public: 3029 MipsABIInfo(CodeGenTypes &CGT, bool _IsO32) : 3030 ABIInfo(CGT), IsO32(_IsO32), MinABIStackAlignInBytes(IsO32 ? 4 : 8) {} 3031 3032 ABIArgInfo classifyReturnType(QualType RetTy) const; 3033 ABIArgInfo classifyArgumentType(QualType RetTy, uint64_t &Offset) const; 3034 virtual void computeInfo(CGFunctionInfo &FI) const; 3035 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 3036 CodeGenFunction &CGF) const; 3037}; 3038 3039class MIPSTargetCodeGenInfo : public TargetCodeGenInfo { 3040 unsigned SizeOfUnwindException; 3041public: 3042 MIPSTargetCodeGenInfo(CodeGenTypes &CGT, bool IsO32) 3043 : TargetCodeGenInfo(new MipsABIInfo(CGT, IsO32)), 3044 SizeOfUnwindException(IsO32 ? 24 : 32) {} 3045 3046 int getDwarfEHStackPointer(CodeGen::CodeGenModule &CGM) const { 3047 return 29; 3048 } 3049 3050 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 3051 llvm::Value *Address) const; 3052 3053 unsigned getSizeOfUnwindException() const { 3054 return SizeOfUnwindException; 3055 } 3056}; 3057} 3058 3059// In N32/64, an aligned double precision floating point field is passed in 3060// a register. 3061llvm::Type* MipsABIInfo::HandleAggregates(QualType Ty) const { 3062 if (IsO32) 3063 return 0; 3064 3065 if (Ty->isComplexType()) 3066 return CGT.ConvertType(Ty); 3067 3068 const RecordType *RT = Ty->getAs<RecordType>(); 3069 3070 // Unions are passed in integer registers. 3071 if (!RT || !RT->isStructureOrClassType()) 3072 return 0; 3073 3074 const RecordDecl *RD = RT->getDecl(); 3075 const ASTRecordLayout &Layout = getContext().getASTRecordLayout(RD); 3076 uint64_t StructSize = getContext().getTypeSize(Ty); 3077 assert(!(StructSize % 8) && "Size of structure must be multiple of 8."); 3078 3079 uint64_t LastOffset = 0; 3080 unsigned idx = 0; 3081 llvm::IntegerType *I64 = llvm::IntegerType::get(getVMContext(), 64); 3082 SmallVector<llvm::Type*, 8> ArgList; 3083 3084 // Iterate over fields in the struct/class and check if there are any aligned 3085 // double fields. 3086 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end(); 3087 i != e; ++i, ++idx) { 3088 const QualType Ty = (*i)->getType(); 3089 const BuiltinType *BT = Ty->getAs<BuiltinType>(); 3090 3091 if (!BT || BT->getKind() != BuiltinType::Double) 3092 continue; 3093 3094 uint64_t Offset = Layout.getFieldOffset(idx); 3095 if (Offset % 64) // Ignore doubles that are not aligned. 3096 continue; 3097 3098 // Add ((Offset - LastOffset) / 64) args of type i64. 3099 for (unsigned j = (Offset - LastOffset) / 64; j > 0; --j) 3100 ArgList.push_back(I64); 3101 3102 // Add double type. 3103 ArgList.push_back(llvm::Type::getDoubleTy(getVMContext())); 3104 LastOffset = Offset + 64; 3105 } 3106 3107 // This struct/class doesn't have an aligned double field. 3108 if (!LastOffset) 3109 return 0; 3110 3111 // Add ((StructSize - LastOffset) / 64) args of type i64. 3112 for (unsigned N = (StructSize - LastOffset) / 64; N; --N) 3113 ArgList.push_back(I64); 3114 3115 // If the size of the remainder is not zero, add one more integer type to 3116 // ArgList. 3117 unsigned R = (StructSize - LastOffset) % 64; 3118 if (R) 3119 ArgList.push_back(llvm::IntegerType::get(getVMContext(), R)); 3120 3121 return llvm::StructType::get(getVMContext(), ArgList); 3122} 3123 3124llvm::Type *MipsABIInfo::getPaddingType(uint64_t Align, uint64_t Offset) const { 3125 // Padding is inserted only for N32/64. 3126 if (IsO32) 3127 return 0; 3128 3129 assert(Align <= 16 && "Alignment larger than 16 not handled."); 3130 return (Align == 16 && Offset & 0xf) ? 3131 llvm::IntegerType::get(getVMContext(), 64) : 0; 3132} 3133 3134ABIArgInfo 3135MipsABIInfo::classifyArgumentType(QualType Ty, uint64_t &Offset) const { 3136 uint64_t OrigOffset = Offset; 3137 uint64_t TySize = 3138 llvm::RoundUpToAlignment(getContext().getTypeSize(Ty), 64) / 8; 3139 uint64_t Align = getContext().getTypeAlign(Ty) / 8; 3140 Offset = llvm::RoundUpToAlignment(Offset, std::max(Align, (uint64_t)8)); 3141 Offset += TySize; 3142 3143 if (isAggregateTypeForABI(Ty)) { 3144 // Ignore empty aggregates. 3145 if (TySize == 0) 3146 return ABIArgInfo::getIgnore(); 3147 3148 // Records with non trivial destructors/constructors should not be passed 3149 // by value. 3150 if (isRecordWithNonTrivialDestructorOrCopyConstructor(Ty)) { 3151 Offset = OrigOffset + 8; 3152 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 3153 } 3154 3155 // If we have reached here, aggregates are passed either indirectly via a 3156 // byval pointer or directly by coercing to another structure type. In the 3157 // latter case, padding is inserted if the offset of the aggregate is 3158 // unaligned. 3159 llvm::Type *ResType = HandleAggregates(Ty); 3160 3161 if (!ResType) 3162 return ABIArgInfo::getIndirect(0); 3163 3164 return ABIArgInfo::getDirect(ResType, 0, getPaddingType(Align, OrigOffset)); 3165 } 3166 3167 // Treat an enum type as its underlying type. 3168 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 3169 Ty = EnumTy->getDecl()->getIntegerType(); 3170 3171 if (Ty->isPromotableIntegerType()) 3172 return ABIArgInfo::getExtend(); 3173 3174 return ABIArgInfo::getDirect(0, 0, getPaddingType(Align, OrigOffset)); 3175} 3176 3177llvm::Type* 3178MipsABIInfo::returnAggregateInRegs(QualType RetTy, uint64_t Size) const { 3179 const RecordType *RT = RetTy->getAs<RecordType>(); 3180 SmallVector<llvm::Type*, 2> RTList; 3181 3182 if (RT && RT->isStructureOrClassType()) { 3183 const RecordDecl *RD = RT->getDecl(); 3184 const ASTRecordLayout &Layout = getContext().getASTRecordLayout(RD); 3185 unsigned FieldCnt = Layout.getFieldCount(); 3186 3187 // N32/64 returns struct/classes in floating point registers if the 3188 // following conditions are met: 3189 // 1. The size of the struct/class is no larger than 128-bit. 3190 // 2. The struct/class has one or two fields all of which are floating 3191 // point types. 3192 // 3. The offset of the first field is zero (this follows what gcc does). 3193 // 3194 // Any other composite results are returned in integer registers. 3195 // 3196 if (FieldCnt && (FieldCnt <= 2) && !Layout.getFieldOffset(0)) { 3197 RecordDecl::field_iterator b = RD->field_begin(), e = RD->field_end(); 3198 for (; b != e; ++b) { 3199 const BuiltinType *BT = (*b)->getType()->getAs<BuiltinType>(); 3200 3201 if (!BT || !BT->isFloatingPoint()) 3202 break; 3203 3204 RTList.push_back(CGT.ConvertType((*b)->getType())); 3205 } 3206 3207 if (b == e) 3208 return llvm::StructType::get(getVMContext(), RTList, 3209 RD->hasAttr<PackedAttr>()); 3210 3211 RTList.clear(); 3212 } 3213 } 3214 3215 RTList.push_back(llvm::IntegerType::get(getVMContext(), 3216 std::min(Size, (uint64_t)64))); 3217 if (Size > 64) 3218 RTList.push_back(llvm::IntegerType::get(getVMContext(), Size - 64)); 3219 3220 return llvm::StructType::get(getVMContext(), RTList); 3221} 3222 3223ABIArgInfo MipsABIInfo::classifyReturnType(QualType RetTy) const { 3224 uint64_t Size = getContext().getTypeSize(RetTy); 3225 3226 if (RetTy->isVoidType() || Size == 0) 3227 return ABIArgInfo::getIgnore(); 3228 3229 if (isAggregateTypeForABI(RetTy)) { 3230 if (Size <= 128) { 3231 if (RetTy->isAnyComplexType()) 3232 return ABIArgInfo::getDirect(); 3233 3234 if (!IsO32 && !isRecordWithNonTrivialDestructorOrCopyConstructor(RetTy)) 3235 return ABIArgInfo::getDirect(returnAggregateInRegs(RetTy, Size)); 3236 } 3237 3238 return ABIArgInfo::getIndirect(0); 3239 } 3240 3241 // Treat an enum type as its underlying type. 3242 if (const EnumType *EnumTy = RetTy->getAs<EnumType>()) 3243 RetTy = EnumTy->getDecl()->getIntegerType(); 3244 3245 return (RetTy->isPromotableIntegerType() ? 3246 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 3247} 3248 3249void MipsABIInfo::computeInfo(CGFunctionInfo &FI) const { 3250 ABIArgInfo &RetInfo = FI.getReturnInfo(); 3251 RetInfo = classifyReturnType(FI.getReturnType()); 3252 3253 // Check if a pointer to an aggregate is passed as a hidden argument. 3254 uint64_t Offset = RetInfo.isIndirect() ? 8 : 0; 3255 3256 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 3257 it != ie; ++it) 3258 it->info = classifyArgumentType(it->type, Offset); 3259} 3260 3261llvm::Value* MipsABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 3262 CodeGenFunction &CGF) const { 3263 llvm::Type *BP = CGF.Int8PtrTy; 3264 llvm::Type *BPP = CGF.Int8PtrPtrTy; 3265 3266 CGBuilderTy &Builder = CGF.Builder; 3267 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP, "ap"); 3268 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur"); 3269 int64_t TypeAlign = getContext().getTypeAlign(Ty) / 8; 3270 llvm::Type *PTy = llvm::PointerType::getUnqual(CGF.ConvertType(Ty)); 3271 llvm::Value *AddrTyped; 3272 unsigned PtrWidth = getContext().getTargetInfo().getPointerWidth(0); 3273 llvm::IntegerType *IntTy = (PtrWidth == 32) ? CGF.Int32Ty : CGF.Int64Ty; 3274 3275 if (TypeAlign > MinABIStackAlignInBytes) { 3276 llvm::Value *AddrAsInt = CGF.Builder.CreatePtrToInt(Addr, IntTy); 3277 llvm::Value *Inc = llvm::ConstantInt::get(IntTy, TypeAlign - 1); 3278 llvm::Value *Mask = llvm::ConstantInt::get(IntTy, -TypeAlign); 3279 llvm::Value *Add = CGF.Builder.CreateAdd(AddrAsInt, Inc); 3280 llvm::Value *And = CGF.Builder.CreateAnd(Add, Mask); 3281 AddrTyped = CGF.Builder.CreateIntToPtr(And, PTy); 3282 } 3283 else 3284 AddrTyped = Builder.CreateBitCast(Addr, PTy); 3285 3286 llvm::Value *AlignedAddr = Builder.CreateBitCast(AddrTyped, BP); 3287 TypeAlign = std::max((unsigned)TypeAlign, MinABIStackAlignInBytes); 3288 uint64_t Offset = 3289 llvm::RoundUpToAlignment(CGF.getContext().getTypeSize(Ty) / 8, TypeAlign); 3290 llvm::Value *NextAddr = 3291 Builder.CreateGEP(AlignedAddr, llvm::ConstantInt::get(IntTy, Offset), 3292 "ap.next"); 3293 Builder.CreateStore(NextAddr, VAListAddrAsBPP); 3294 3295 return AddrTyped; 3296} 3297 3298bool 3299MIPSTargetCodeGenInfo::initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF, 3300 llvm::Value *Address) const { 3301 // This information comes from gcc's implementation, which seems to 3302 // as canonical as it gets. 3303 3304 // Everything on MIPS is 4 bytes. Double-precision FP registers 3305 // are aliased to pairs of single-precision FP registers. 3306 llvm::Value *Four8 = llvm::ConstantInt::get(CGF.Int8Ty, 4); 3307 3308 // 0-31 are the general purpose registers, $0 - $31. 3309 // 32-63 are the floating-point registers, $f0 - $f31. 3310 // 64 and 65 are the multiply/divide registers, $hi and $lo. 3311 // 66 is the (notional, I think) register for signal-handler return. 3312 AssignToArrayRange(CGF.Builder, Address, Four8, 0, 65); 3313 3314 // 67-74 are the floating-point status registers, $fcc0 - $fcc7. 3315 // They are one bit wide and ignored here. 3316 3317 // 80-111 are the coprocessor 0 registers, $c0r0 - $c0r31. 3318 // (coprocessor 1 is the FP unit) 3319 // 112-143 are the coprocessor 2 registers, $c2r0 - $c2r31. 3320 // 144-175 are the coprocessor 3 registers, $c3r0 - $c3r31. 3321 // 176-181 are the DSP accumulator registers. 3322 AssignToArrayRange(CGF.Builder, Address, Four8, 80, 181); 3323 return false; 3324} 3325 3326//===----------------------------------------------------------------------===// 3327// TCE ABI Implementation (see http://tce.cs.tut.fi). Uses mostly the defaults. 3328// Currently subclassed only to implement custom OpenCL C function attribute 3329// handling. 3330//===----------------------------------------------------------------------===// 3331 3332namespace { 3333 3334class TCETargetCodeGenInfo : public DefaultTargetCodeGenInfo { 3335public: 3336 TCETargetCodeGenInfo(CodeGenTypes &CGT) 3337 : DefaultTargetCodeGenInfo(CGT) {} 3338 3339 virtual void SetTargetAttributes(const Decl *D, llvm::GlobalValue *GV, 3340 CodeGen::CodeGenModule &M) const; 3341}; 3342 3343void TCETargetCodeGenInfo::SetTargetAttributes(const Decl *D, 3344 llvm::GlobalValue *GV, 3345 CodeGen::CodeGenModule &M) const { 3346 const FunctionDecl *FD = dyn_cast<FunctionDecl>(D); 3347 if (!FD) return; 3348 3349 llvm::Function *F = cast<llvm::Function>(GV); 3350 3351 if (M.getLangOptions().OpenCL) { 3352 if (FD->hasAttr<OpenCLKernelAttr>()) { 3353 // OpenCL C Kernel functions are not subject to inlining 3354 F->addFnAttr(llvm::Attribute::NoInline); 3355 3356 if (FD->hasAttr<ReqdWorkGroupSizeAttr>()) { 3357 3358 // Convert the reqd_work_group_size() attributes to metadata. 3359 llvm::LLVMContext &Context = F->getContext(); 3360 llvm::NamedMDNode *OpenCLMetadata = 3361 M.getModule().getOrInsertNamedMetadata("opencl.kernel_wg_size_info"); 3362 3363 SmallVector<llvm::Value*, 5> Operands; 3364 Operands.push_back(F); 3365 3366 Operands.push_back(llvm::Constant::getIntegerValue(M.Int32Ty, 3367 llvm::APInt(32, 3368 FD->getAttr<ReqdWorkGroupSizeAttr>()->getXDim()))); 3369 Operands.push_back(llvm::Constant::getIntegerValue(M.Int32Ty, 3370 llvm::APInt(32, 3371 FD->getAttr<ReqdWorkGroupSizeAttr>()->getYDim()))); 3372 Operands.push_back(llvm::Constant::getIntegerValue(M.Int32Ty, 3373 llvm::APInt(32, 3374 FD->getAttr<ReqdWorkGroupSizeAttr>()->getZDim()))); 3375 3376 // Add a boolean constant operand for "required" (true) or "hint" (false) 3377 // for implementing the work_group_size_hint attr later. Currently 3378 // always true as the hint is not yet implemented. 3379 Operands.push_back(llvm::ConstantInt::getTrue(Context)); 3380 OpenCLMetadata->addOperand(llvm::MDNode::get(Context, Operands)); 3381 } 3382 } 3383 } 3384} 3385 3386} 3387 3388//===----------------------------------------------------------------------===// 3389// Hexagon ABI Implementation 3390//===----------------------------------------------------------------------===// 3391 3392namespace { 3393 3394class HexagonABIInfo : public ABIInfo { 3395 3396 3397public: 3398 HexagonABIInfo(CodeGenTypes &CGT) : ABIInfo(CGT) {} 3399 3400private: 3401 3402 ABIArgInfo classifyReturnType(QualType RetTy) const; 3403 ABIArgInfo classifyArgumentType(QualType RetTy) const; 3404 3405 virtual void computeInfo(CGFunctionInfo &FI) const; 3406 3407 virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 3408 CodeGenFunction &CGF) const; 3409}; 3410 3411class HexagonTargetCodeGenInfo : public TargetCodeGenInfo { 3412public: 3413 HexagonTargetCodeGenInfo(CodeGenTypes &CGT) 3414 :TargetCodeGenInfo(new HexagonABIInfo(CGT)) {} 3415 3416 int getDwarfEHStackPointer(CodeGen::CodeGenModule &M) const { 3417 return 29; 3418 } 3419}; 3420 3421} 3422 3423void HexagonABIInfo::computeInfo(CGFunctionInfo &FI) const { 3424 FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); 3425 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end(); 3426 it != ie; ++it) 3427 it->info = classifyArgumentType(it->type); 3428} 3429 3430ABIArgInfo HexagonABIInfo::classifyArgumentType(QualType Ty) const { 3431 if (!isAggregateTypeForABI(Ty)) { 3432 // Treat an enum type as its underlying type. 3433 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) 3434 Ty = EnumTy->getDecl()->getIntegerType(); 3435 3436 return (Ty->isPromotableIntegerType() ? 3437 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 3438 } 3439 3440 // Ignore empty records. 3441 if (isEmptyRecord(getContext(), Ty, true)) 3442 return ABIArgInfo::getIgnore(); 3443 3444 // Structures with either a non-trivial destructor or a non-trivial 3445 // copy constructor are always indirect. 3446 if (isRecordWithNonTrivialDestructorOrCopyConstructor(Ty)) 3447 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 3448 3449 uint64_t Size = getContext().getTypeSize(Ty); 3450 if (Size > 64) 3451 return ABIArgInfo::getIndirect(0, /*ByVal=*/true); 3452 // Pass in the smallest viable integer type. 3453 else if (Size > 32) 3454 return ABIArgInfo::getDirect(llvm::Type::getInt64Ty(getVMContext())); 3455 else if (Size > 16) 3456 return ABIArgInfo::getDirect(llvm::Type::getInt32Ty(getVMContext())); 3457 else if (Size > 8) 3458 return ABIArgInfo::getDirect(llvm::Type::getInt16Ty(getVMContext())); 3459 else 3460 return ABIArgInfo::getDirect(llvm::Type::getInt8Ty(getVMContext())); 3461} 3462 3463ABIArgInfo HexagonABIInfo::classifyReturnType(QualType RetTy) const { 3464 if (RetTy->isVoidType()) 3465 return ABIArgInfo::getIgnore(); 3466 3467 // Large vector types should be returned via memory. 3468 if (RetTy->isVectorType() && getContext().getTypeSize(RetTy) > 64) 3469 return ABIArgInfo::getIndirect(0); 3470 3471 if (!isAggregateTypeForABI(RetTy)) { 3472 // Treat an enum type as its underlying type. 3473 if (const EnumType *EnumTy = RetTy->getAs<EnumType>()) 3474 RetTy = EnumTy->getDecl()->getIntegerType(); 3475 3476 return (RetTy->isPromotableIntegerType() ? 3477 ABIArgInfo::getExtend() : ABIArgInfo::getDirect()); 3478 } 3479 3480 // Structures with either a non-trivial destructor or a non-trivial 3481 // copy constructor are always indirect. 3482 if (isRecordWithNonTrivialDestructorOrCopyConstructor(RetTy)) 3483 return ABIArgInfo::getIndirect(0, /*ByVal=*/false); 3484 3485 if (isEmptyRecord(getContext(), RetTy, true)) 3486 return ABIArgInfo::getIgnore(); 3487 3488 // Aggregates <= 8 bytes are returned in r0; other aggregates 3489 // are returned indirectly. 3490 uint64_t Size = getContext().getTypeSize(RetTy); 3491 if (Size <= 64) { 3492 // Return in the smallest viable integer type. 3493 if (Size <= 8) 3494 return ABIArgInfo::getDirect(llvm::Type::getInt8Ty(getVMContext())); 3495 if (Size <= 16) 3496 return ABIArgInfo::getDirect(llvm::Type::getInt16Ty(getVMContext())); 3497 if (Size <= 32) 3498 return ABIArgInfo::getDirect(llvm::Type::getInt32Ty(getVMContext())); 3499 return ABIArgInfo::getDirect(llvm::Type::getInt64Ty(getVMContext())); 3500 } 3501 3502 return ABIArgInfo::getIndirect(0, /*ByVal=*/true); 3503} 3504 3505llvm::Value *HexagonABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty, 3506 CodeGenFunction &CGF) const { 3507 // FIXME: Need to handle alignment 3508 llvm::Type *BPP = CGF.Int8PtrPtrTy; 3509 3510 CGBuilderTy &Builder = CGF.Builder; 3511 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP, 3512 "ap"); 3513 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur"); 3514 llvm::Type *PTy = 3515 llvm::PointerType::getUnqual(CGF.ConvertType(Ty)); 3516 llvm::Value *AddrTyped = Builder.CreateBitCast(Addr, PTy); 3517 3518 uint64_t Offset = 3519 llvm::RoundUpToAlignment(CGF.getContext().getTypeSize(Ty) / 8, 4); 3520 llvm::Value *NextAddr = 3521 Builder.CreateGEP(Addr, llvm::ConstantInt::get(CGF.Int32Ty, Offset), 3522 "ap.next"); 3523 Builder.CreateStore(NextAddr, VAListAddrAsBPP); 3524 3525 return AddrTyped; 3526} 3527 3528 3529const TargetCodeGenInfo &CodeGenModule::getTargetCodeGenInfo() { 3530 if (TheTargetCodeGenInfo) 3531 return *TheTargetCodeGenInfo; 3532 3533 const llvm::Triple &Triple = getContext().getTargetInfo().getTriple(); 3534 switch (Triple.getArch()) { 3535 default: 3536 return *(TheTargetCodeGenInfo = new DefaultTargetCodeGenInfo(Types)); 3537 3538 case llvm::Triple::mips: 3539 case llvm::Triple::mipsel: 3540 return *(TheTargetCodeGenInfo = new MIPSTargetCodeGenInfo(Types, true)); 3541 3542 case llvm::Triple::mips64: 3543 case llvm::Triple::mips64el: 3544 return *(TheTargetCodeGenInfo = new MIPSTargetCodeGenInfo(Types, false)); 3545 3546 case llvm::Triple::arm: 3547 case llvm::Triple::thumb: 3548 { 3549 ARMABIInfo::ABIKind Kind = ARMABIInfo::AAPCS; 3550 3551 if (strcmp(getContext().getTargetInfo().getABI(), "apcs-gnu") == 0) 3552 Kind = ARMABIInfo::APCS; 3553 else if (CodeGenOpts.FloatABI == "hard") 3554 Kind = ARMABIInfo::AAPCS_VFP; 3555 3556 return *(TheTargetCodeGenInfo = new ARMTargetCodeGenInfo(Types, Kind)); 3557 } 3558 3559 case llvm::Triple::ppc: 3560 return *(TheTargetCodeGenInfo = new PPC32TargetCodeGenInfo(Types)); 3561 3562 case llvm::Triple::ptx32: 3563 case llvm::Triple::ptx64: 3564 return *(TheTargetCodeGenInfo = new PTXTargetCodeGenInfo(Types)); 3565 3566 case llvm::Triple::mblaze: 3567 return *(TheTargetCodeGenInfo = new MBlazeTargetCodeGenInfo(Types)); 3568 3569 case llvm::Triple::msp430: 3570 return *(TheTargetCodeGenInfo = new MSP430TargetCodeGenInfo(Types)); 3571 3572 case llvm::Triple::tce: 3573 return *(TheTargetCodeGenInfo = new TCETargetCodeGenInfo(Types)); 3574 3575 case llvm::Triple::x86: { 3576 bool DisableMMX = strcmp(getContext().getTargetInfo().getABI(), "no-mmx") == 0; 3577 3578 if (Triple.isOSDarwin()) 3579 return *(TheTargetCodeGenInfo = 3580 new X86_32TargetCodeGenInfo( 3581 Types, true, true, DisableMMX, false)); 3582 3583 switch (Triple.getOS()) { 3584 case llvm::Triple::Cygwin: 3585 case llvm::Triple::MinGW32: 3586 case llvm::Triple::AuroraUX: 3587 case llvm::Triple::DragonFly: 3588 case llvm::Triple::FreeBSD: 3589 case llvm::Triple::OpenBSD: 3590 return *(TheTargetCodeGenInfo = 3591 new X86_32TargetCodeGenInfo( 3592 Types, false, true, DisableMMX, false)); 3593 3594 case llvm::Triple::Win32: 3595 return *(TheTargetCodeGenInfo = 3596 new X86_32TargetCodeGenInfo( 3597 Types, false, true, DisableMMX, true)); 3598 3599 default: 3600 return *(TheTargetCodeGenInfo = 3601 new X86_32TargetCodeGenInfo( 3602 Types, false, false, DisableMMX, false)); 3603 } 3604 } 3605 3606 case llvm::Triple::x86_64: { 3607 bool HasAVX = strcmp(getContext().getTargetInfo().getABI(), "avx") == 0; 3608 3609 switch (Triple.getOS()) { 3610 case llvm::Triple::Win32: 3611 case llvm::Triple::MinGW32: 3612 case llvm::Triple::Cygwin: 3613 return *(TheTargetCodeGenInfo = new WinX86_64TargetCodeGenInfo(Types)); 3614 default: 3615 return *(TheTargetCodeGenInfo = new X86_64TargetCodeGenInfo(Types, 3616 HasAVX)); 3617 } 3618 } 3619 case llvm::Triple::hexagon: 3620 return *(TheTargetCodeGenInfo = new HexagonTargetCodeGenInfo(Types)); 3621 } 3622} 3623