1f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard//===-- R600ISelLowering.h - R600 DAG Lowering Interface -*- C++ -*--------===// 2f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard// 3f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard// The LLVM Compiler Infrastructure 4f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard// 5f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard// This file is distributed under the University of Illinois Open Source 6f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard// License. See LICENSE.TXT for details. 7f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard// 8f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard//===----------------------------------------------------------------------===// 9f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard// 10f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard/// \file 11f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard/// \brief R600 DAG Lowering interface definition 12f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard// 13f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard//===----------------------------------------------------------------------===// 14f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 1537ed9c199ca639565f6ce88105f9e39e898d82d0Stephen Hines#ifndef LLVM_LIB_TARGET_R600_R600ISELLOWERING_H 1637ed9c199ca639565f6ce88105f9e39e898d82d0Stephen Hines#define LLVM_LIB_TARGET_R600_R600ISELLOWERING_H 17f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 18f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard#include "AMDGPUISelLowering.h" 19f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 20f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellardnamespace llvm { 21f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 22f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellardclass R600InstrInfo; 23f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 24f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellardclass R600TargetLowering : public AMDGPUTargetLowering { 25f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellardpublic: 26ebe69fe11e48d322045d5949c83283927a0d790bStephen Hines R600TargetLowering(TargetMachine &TM, const AMDGPUSubtarget &STI); 27dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MachineBasicBlock * EmitInstrWithCustomInserter(MachineInstr *MI, 28dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines MachineBasicBlock * BB) const override; 29dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override; 30dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override; 31dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines void ReplaceNodeResults(SDNode * N, 32dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SmallVectorImpl<SDValue> &Results, 33dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SelectionDAG &DAG) const override; 34dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue LowerFormalArguments( 35dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDValue Chain, 36dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines CallingConv::ID CallConv, 37dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines bool isVarArg, 38dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines const SmallVectorImpl<ISD::InputArg> &Ins, 39dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDLoc DL, SelectionDAG &DAG, 40dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SmallVectorImpl<SDValue> &InVals) const override; 41cddc3e03e4ec99c0268c03a126195173e519ed58Pirama Arumuga Nainar EVT getSetCCResultType(const DataLayout &DL, LLVMContext &, 42cddc3e03e4ec99c0268c03a126195173e519ed58Pirama Arumuga Nainar EVT VT) const override; 43cddc3e03e4ec99c0268c03a126195173e519ed58Pirama Arumuga Nainar 44f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellardprivate: 45c6f13db656c7649f933c74c4f90c09ff74de52a8Vincent Lejeune unsigned Gen; 46f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard /// Each OpenCL kernel has nine implicit parameters that are stored in the 47f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard /// first nine dwords of a Vertex Buffer. These implicit parameters are 4836b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines /// lowered to load instructions which retrieve the values from the Vertex 49f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard /// Buffer. 50f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard SDValue LowerImplicitParameter(SelectionDAG &DAG, EVT VT, 51ac6d9bec671252dd1e596fa71180ff6b39d06b5dAndrew Trick SDLoc DL, unsigned DwordOffset) const; 52f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 53f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard void lowerImplicitParameter(MachineInstr *MI, MachineBasicBlock &BB, 54f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard MachineRegisterInfo & MRI, unsigned dword_offset) const; 556948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar SDValue OptimizeSwizzle(SDValue BuildVector, SDValue Swz[], SelectionDAG &DAG, 566948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar SDLoc DL) const; 57c6a4f5e819217e1e12c458aed8e7b122e23a3a58Stephen Hines SDValue vectorToVerticalVector(SelectionDAG &DAG, SDValue Vector) const; 58f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 59c6a4f5e819217e1e12c458aed8e7b122e23a3a58Stephen Hines SDValue LowerEXTRACT_VECTOR_ELT(SDValue Op, SelectionDAG &DAG) const; 60c6a4f5e819217e1e12c458aed8e7b122e23a3a58Stephen Hines SDValue LowerINSERT_VECTOR_ELT(SDValue Op, SelectionDAG &DAG) const; 61f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard SDValue LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const; 62f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard SDValue LowerSTORE(SDValue Op, SelectionDAG &DAG) const; 63f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard SDValue LowerFPTOUINT(SDValue Op, SelectionDAG &DAG) const; 649f7818d9bdfce2e9c7a2cbe31490a135aa6d1211Tom Stellard SDValue LowerLOAD(SDValue Op, SelectionDAG &DAG) const; 65c6a4f5e819217e1e12c458aed8e7b122e23a3a58Stephen Hines SDValue LowerBRCOND(SDValue Op, SelectionDAG &DAG) const; 66c6f13db656c7649f933c74c4f90c09ff74de52a8Vincent Lejeune SDValue LowerTrig(SDValue Op, SelectionDAG &DAG) const; 67c6a4f5e819217e1e12c458aed8e7b122e23a3a58Stephen Hines SDValue LowerSHLParts(SDValue Op, SelectionDAG &DAG) const; 68c6a4f5e819217e1e12c458aed8e7b122e23a3a58Stephen Hines SDValue LowerSRXParts(SDValue Op, SelectionDAG &DAG) const; 696948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar SDValue LowerUADDSUBO(SDValue Op, SelectionDAG &DAG, 706948897e478cbd66626159776a8017b3c18579b9Pirama Arumuga Nainar unsigned mainop, unsigned ovf) const; 71c0b0c677a1138f0a5ce1435fc1e70cef38fd95c8Tom Stellard 72c0b0c677a1138f0a5ce1435fc1e70cef38fd95c8Tom Stellard SDValue stackPtrToRegIndex(SDValue Ptr, unsigned StackWidth, 73c0b0c677a1138f0a5ce1435fc1e70cef38fd95c8Tom Stellard SelectionDAG &DAG) const; 74c0b0c677a1138f0a5ce1435fc1e70cef38fd95c8Tom Stellard void getStackAddress(unsigned StackWidth, unsigned ElemIdx, 75c0b0c677a1138f0a5ce1435fc1e70cef38fd95c8Tom Stellard unsigned &Channel, unsigned &PtrIncr) const; 76f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard bool isZero(SDValue Op) const; 77dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines SDNode *PostISelFolding(MachineSDNode *N, SelectionDAG &DAG) const override; 78f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard}; 79f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 80f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard} // End namespace llvm; 81f98f2ce29e6e2996fa58f38979143eceaa818335Tom Stellard 8237ed9c199ca639565f6ce88105f9e39e898d82d0Stephen Hines#endif 83