MSP430InstrInfo.h revision 34dcc6fadca0a1117cdbd0e9b35c991a55b6e556
1//===- MSP430InstrInfo.h - MSP430 Instruction Information -------*- C++ -*-===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file contains the MSP430 implementation of the TargetInstrInfo class. 11// 12//===----------------------------------------------------------------------===// 13 14#ifndef LLVM_TARGET_MSP430INSTRINFO_H 15#define LLVM_TARGET_MSP430INSTRINFO_H 16 17#include "llvm/Target/TargetInstrInfo.h" 18#include "MSP430RegisterInfo.h" 19 20namespace llvm { 21 22class MSP430TargetMachine; 23 24/// MSP430II - This namespace holds all of the target specific flags that 25/// instruction info tracks. 26/// 27namespace MSP430II { 28 enum { 29 SizeShift = 2, 30 SizeMask = 7 << SizeShift, 31 32 SizeUnknown = 0 << SizeShift, 33 SizeSpecial = 1 << SizeShift, 34 Size2Bytes = 2 << SizeShift, 35 Size4Bytes = 3 << SizeShift, 36 Size6Bytes = 4 << SizeShift 37 }; 38} 39 40class MSP430InstrInfo : public TargetInstrInfoImpl { 41 const MSP430RegisterInfo RI; 42 MSP430TargetMachine &TM; 43public: 44 explicit MSP430InstrInfo(MSP430TargetMachine &TM); 45 46 /// getRegisterInfo - TargetInstrInfo is a superset of MRegister info. As 47 /// such, whenever a client has an instance of instruction info, it should 48 /// always be able to get register info as well (through this method). 49 /// 50 virtual const TargetRegisterInfo &getRegisterInfo() const { return RI; } 51 52 bool copyRegToReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, 53 unsigned DestReg, unsigned SrcReg, 54 const TargetRegisterClass *DestRC, 55 const TargetRegisterClass *SrcRC, 56 DebugLoc DL) const; 57 58 bool isMoveInstr(const MachineInstr& MI, 59 unsigned &SrcReg, unsigned &DstReg, 60 unsigned &SrcSubIdx, unsigned &DstSubIdx) const; 61 62 virtual void storeRegToStackSlot(MachineBasicBlock &MBB, 63 MachineBasicBlock::iterator MI, 64 unsigned SrcReg, bool isKill, 65 int FrameIndex, 66 const TargetRegisterClass *RC, 67 const TargetRegisterInfo *TRI) const; 68 virtual void loadRegFromStackSlot(MachineBasicBlock &MBB, 69 MachineBasicBlock::iterator MI, 70 unsigned DestReg, int FrameIdx, 71 const TargetRegisterClass *RC, 72 const TargetRegisterInfo *TRI) const; 73 74 virtual bool spillCalleeSavedRegisters(MachineBasicBlock &MBB, 75 MachineBasicBlock::iterator MI, 76 const std::vector<CalleeSavedInfo> &CSI) const; 77 virtual bool restoreCalleeSavedRegisters(MachineBasicBlock &MBB, 78 MachineBasicBlock::iterator MI, 79 const std::vector<CalleeSavedInfo> &CSI) const; 80 81 unsigned GetInstSizeInBytes(const MachineInstr *MI) const; 82 83 // Branch folding goodness 84 bool ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const; 85 bool isUnpredicatedTerminator(const MachineInstr *MI) const; 86 bool AnalyzeBranch(MachineBasicBlock &MBB, 87 MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, 88 SmallVectorImpl<MachineOperand> &Cond, 89 bool AllowModify) const; 90 91 unsigned RemoveBranch(MachineBasicBlock &MBB) const; 92 unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, 93 MachineBasicBlock *FBB, 94 const SmallVectorImpl<MachineOperand> &Cond) const; 95 96}; 97 98} 99 100#endif 101