X86Subtarget.h revision e4df756289b6d80dcfd67b9f97fd464f62fd4902
1//=====---- X86Subtarget.h - Define Subtarget for the X86 -----*- C++ -*--====// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file declares the X86 specific subclass of TargetSubtarget. 11// 12//===----------------------------------------------------------------------===// 13 14#ifndef X86SUBTARGET_H 15#define X86SUBTARGET_H 16 17#include "llvm/Target/TargetSubtarget.h" 18#include <string> 19 20namespace llvm { 21class Module; 22class GlobalValue; 23class TargetMachine; 24 25/// PICStyles - The X86 backend supports a number of different styles of PIC. 26/// 27namespace PICStyles { 28enum Style { 29 Stub, // Used on i386-darwin 30 GOT, // Used on many 32-bit unices. 31 RIPRel, // Used on X86-64 when not in -static mode. 32 None // Set when in -static mode (not PIC or DynamicNoPIC mode). 33}; 34} 35 36class X86Subtarget : public TargetSubtarget { 37public: 38 enum AsmWriterFlavorTy { 39 // Note: This numbering has to match the GCC assembler dialects for inline 40 // asm alternatives to work right. 41 ATT = 0, Intel = 1, Unset 42 }; 43protected: 44 enum X86SSEEnum { 45 NoMMXSSE, MMX, SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42 46 }; 47 48 enum X863DNowEnum { 49 NoThreeDNow, ThreeDNow, ThreeDNowA 50 }; 51 52 /// AsmFlavor - Which x86 asm dialect to use. 53 /// 54 AsmWriterFlavorTy AsmFlavor; 55 56 /// PICStyle - Which PIC style to use 57 /// 58 PICStyles::Style PICStyle; 59 60 /// X86SSELevel - MMX, SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42, or 61 /// none supported. 62 X86SSEEnum X86SSELevel; 63 64 /// X863DNowLevel - 3DNow or 3DNow Athlon, or none supported. 65 /// 66 X863DNowEnum X863DNowLevel; 67 68 /// HasX86_64 - True if the processor supports X86-64 instructions. 69 /// 70 bool HasX86_64; 71 72 /// HasSSE4A - True if the processor supports SSE4A instructions. 73 bool HasSSE4A; 74 75 /// HasAVX - Target has AVX instructions 76 bool HasAVX; 77 78 /// HasFMA3 - Target has 3-operand fused multiply-add 79 bool HasFMA3; 80 81 /// HasFMA4 - Target has 4-operand fused multiply-add 82 bool HasFMA4; 83 84 /// IsBTMemSlow - True if BT (bit test) of memory instructions are slow. 85 bool IsBTMemSlow; 86 87 /// DarwinVers - Nonzero if this is a darwin platform: the numeric 88 /// version of the platform, e.g. 8 = 10.4 (Tiger), 9 = 10.5 (Leopard), etc. 89 unsigned char DarwinVers; // Is any darwin-x86 platform. 90 91 /// isLinux - true if this is a "linux" platform. 92 bool IsLinux; 93 94 /// stackAlignment - The minimum alignment known to hold of the stack frame on 95 /// entry to the function and which must be maintained by every function. 96 unsigned stackAlignment; 97 98 /// Max. memset / memcpy size that is turned into rep/movs, rep/stos ops. 99 /// 100 unsigned MaxInlineSizeThreshold; 101 102private: 103 /// Is64Bit - True if the processor supports 64-bit instructions and module 104 /// pointer size is 64 bit. 105 bool Is64Bit; 106 107public: 108 enum { 109 isELF, isCygwin, isDarwin, isWindows, isMingw 110 } TargetType; 111 112 /// This constructor initializes the data members to match that 113 /// of the specified module. 114 /// 115 X86Subtarget(const Module &M, const std::string &FS, bool is64Bit); 116 117 /// getStackAlignment - Returns the minimum alignment known to hold of the 118 /// stack frame on entry to the function and which must be maintained by every 119 /// function for this subtarget. 120 unsigned getStackAlignment() const { return stackAlignment; } 121 122 /// getMaxInlineSizeThreshold - Returns the maximum memset / memcpy size 123 /// that still makes it profitable to inline the call. 124 unsigned getMaxInlineSizeThreshold() const { return MaxInlineSizeThreshold; } 125 126 /// ParseSubtargetFeatures - Parses features string setting specified 127 /// subtarget options. Definition of function is auto generated by tblgen. 128 std::string ParseSubtargetFeatures(const std::string &FS, 129 const std::string &CPU); 130 131 /// AutoDetectSubtargetFeatures - Auto-detect CPU features using CPUID 132 /// instruction. 133 void AutoDetectSubtargetFeatures(); 134 135 bool is64Bit() const { return Is64Bit; } 136 137 PICStyles::Style getPICStyle() const { return PICStyle; } 138 void setPICStyle(PICStyles::Style Style) { PICStyle = Style; } 139 140 bool hasMMX() const { return X86SSELevel >= MMX; } 141 bool hasSSE1() const { return X86SSELevel >= SSE1; } 142 bool hasSSE2() const { return X86SSELevel >= SSE2; } 143 bool hasSSE3() const { return X86SSELevel >= SSE3; } 144 bool hasSSSE3() const { return X86SSELevel >= SSSE3; } 145 bool hasSSE41() const { return X86SSELevel >= SSE41; } 146 bool hasSSE42() const { return X86SSELevel >= SSE42; } 147 bool hasSSE4A() const { return HasSSE4A; } 148 bool has3DNow() const { return X863DNowLevel >= ThreeDNow; } 149 bool has3DNowA() const { return X863DNowLevel >= ThreeDNowA; } 150 bool hasAVX() const { return HasAVX; } 151 bool hasFMA3() const { return HasFMA3; } 152 bool hasFMA4() const { return HasFMA4; } 153 154 bool isBTMemSlow() const { return IsBTMemSlow; } 155 156 unsigned getAsmFlavor() const { 157 return AsmFlavor != Unset ? unsigned(AsmFlavor) : 0; 158 } 159 160 bool isFlavorAtt() const { return AsmFlavor == ATT; } 161 bool isFlavorIntel() const { return AsmFlavor == Intel; } 162 163 bool isTargetDarwin() const { return TargetType == isDarwin; } 164 bool isTargetELF() const { 165 return TargetType == isELF; 166 } 167 bool isTargetWindows() const { return TargetType == isWindows; } 168 bool isTargetMingw() const { return TargetType == isMingw; } 169 bool isTargetCygMing() const { return (TargetType == isMingw || 170 TargetType == isCygwin); } 171 bool isTargetCygwin() const { return TargetType == isCygwin; } 172 bool isTargetWin64() const { 173 return (Is64Bit && (TargetType == isMingw || TargetType == isWindows)); 174 } 175 176 std::string getDataLayout() const { 177 const char *p; 178 if (is64Bit()) 179 p = "e-p:64:64-s:64-f64:64:64-i64:64:64-f80:128:128"; 180 else { 181 if (isTargetDarwin()) 182 p = "e-p:32:32-f64:32:64-i64:32:64-f80:128:128"; 183 else 184 p = "e-p:32:32-f64:32:64-i64:32:64-f80:32:32"; 185 } 186 return std::string(p); 187 } 188 189 bool isPICStyleSet() const { return PICStyle != PICStyles::None; } 190 bool isPICStyleGOT() const { return PICStyle == PICStyles::GOT; } 191 bool isPICStyleStub() const { return PICStyle == PICStyles::Stub; } 192 bool isPICStyleRIPRel() const { return PICStyle == PICStyles::RIPRel; } 193 194 /// getDarwinVers - Return the darwin version number, 8 = tiger, 9 = leopard. 195 unsigned getDarwinVers() const { return DarwinVers; } 196 197 /// isLinux - Return true if the target is "Linux". 198 bool isLinux() const { return IsLinux; } 199 200 /// True if accessing the GV requires an extra load. For Windows, dllimported 201 /// symbols are indirect, loading the value at address GV rather then the 202 /// value of GV itself. This means that the GlobalAddress must be in the base 203 /// or index register of the address, not the GV offset field. 204 bool GVRequiresExtraLoad(const GlobalValue* GV, const TargetMachine& TM, 205 bool isDirectCall) const; 206 207 /// True if accessing the GV requires a register. This is a superset of the 208 /// cases where GVRequiresExtraLoad is true. Some variations of PIC require 209 /// a register, but not an extra load. 210 bool GVRequiresRegister(const GlobalValue* GV, const TargetMachine& TM, 211 bool isDirectCall) const; 212 213 /// IsLegalToCallImmediateAddr - Return true if the subtarget allows calls 214 /// to immediate address. 215 bool IsLegalToCallImmediateAddr(const TargetMachine &TM) const; 216 217 /// This function returns the name of a function which has an interface 218 /// like the non-standard bzero function, if such a function exists on 219 /// the current subtarget and it is considered prefereable over 220 /// memset with zero passed as the second argument. Otherwise it 221 /// returns null. 222 const char *getBZeroEntry() const; 223 224 /// getSpecialAddressLatency - For targets where it is beneficial to 225 /// backschedule instructions that compute addresses, return a value 226 /// indicating the number of scheduling cycles of backscheduling that 227 /// should be attempted. 228 unsigned getSpecialAddressLatency() const; 229}; 230 231namespace X86 { 232 /// GetCpuIDAndInfo - Execute the specified cpuid and return the 4 values in 233 /// the specified arguments. If we can't run cpuid on the host, return true. 234 bool GetCpuIDAndInfo(unsigned value, unsigned *rEAX, unsigned *rEBX, 235 unsigned *rECX, unsigned *rEDX); 236} 237 238} // End llvm namespace 239 240#endif 241