1fa63f976522bd4faf19249e8c9ac4d3edda498d9Tom Stellard//===-- AMDGPURegisterInfo.h - AMDGPURegisterInfo Interface -*- C++ -*-----===// 2a75c6163e605f35b14f26930dd9227e4f337ec9eTom Stellard// 3a75c6163e605f35b14f26930dd9227e4f337ec9eTom Stellard// The LLVM Compiler Infrastructure 4a75c6163e605f35b14f26930dd9227e4f337ec9eTom Stellard// 5a75c6163e605f35b14f26930dd9227e4f337ec9eTom Stellard// This file is distributed under the University of Illinois Open Source 6a75c6163e605f35b14f26930dd9227e4f337ec9eTom Stellard// License. See LICENSE.TXT for details. 7a75c6163e605f35b14f26930dd9227e4f337ec9eTom Stellard// 8a75c6163e605f35b14f26930dd9227e4f337ec9eTom Stellard//===----------------------------------------------------------------------===// 9a75c6163e605f35b14f26930dd9227e4f337ec9eTom Stellard// 10fa63f976522bd4faf19249e8c9ac4d3edda498d9Tom Stellard// This file contains the TargetRegisterInfo interface that is implemented 11fa63f976522bd4faf19249e8c9ac4d3edda498d9Tom Stellard// by all hw codegen targets. 12a75c6163e605f35b14f26930dd9227e4f337ec9eTom Stellard// 13a75c6163e605f35b14f26930dd9227e4f337ec9eTom Stellard//===----------------------------------------------------------------------===// 14a75c6163e605f35b14f26930dd9227e4f337ec9eTom Stellard 15a75c6163e605f35b14f26930dd9227e4f337ec9eTom Stellard#ifndef AMDGPUREGISTERINFO_H_ 16a75c6163e605f35b14f26930dd9227e4f337ec9eTom Stellard#define AMDGPUREGISTERINFO_H_ 17a75c6163e605f35b14f26930dd9227e4f337ec9eTom Stellard 183a0187b1b53eca3143286a5ae7917cd71117b902Tom Stellard#include "llvm/ADT/BitVector.h" 193a0187b1b53eca3143286a5ae7917cd71117b902Tom Stellard#include "llvm/Target/TargetRegisterInfo.h" 203a0187b1b53eca3143286a5ae7917cd71117b902Tom Stellard 213a0187b1b53eca3143286a5ae7917cd71117b902Tom Stellard#define GET_REGINFO_HEADER 223a0187b1b53eca3143286a5ae7917cd71117b902Tom Stellard#define GET_REGINFO_ENUM 233a0187b1b53eca3143286a5ae7917cd71117b902Tom Stellard#include "AMDGPUGenRegisterInfo.inc" 24a75c6163e605f35b14f26930dd9227e4f337ec9eTom Stellard 25a75c6163e605f35b14f26930dd9227e4f337ec9eTom Stellardnamespace llvm { 26a75c6163e605f35b14f26930dd9227e4f337ec9eTom Stellard 27bcfc97dbf40c256ed59c2424e0c55b845f0f2569Tom Stellardclass AMDGPUTargetMachine; 28bcfc97dbf40c256ed59c2424e0c55b845f0f2569Tom Stellardclass TargetInstrInfo; 29a75c6163e605f35b14f26930dd9227e4f337ec9eTom Stellard 303a0187b1b53eca3143286a5ae7917cd71117b902Tom Stellardstruct AMDGPURegisterInfo : public AMDGPUGenRegisterInfo 31bcfc97dbf40c256ed59c2424e0c55b845f0f2569Tom Stellard{ 323a0187b1b53eca3143286a5ae7917cd71117b902Tom Stellard TargetMachine &TM; 33bcfc97dbf40c256ed59c2424e0c55b845f0f2569Tom Stellard const TargetInstrInfo &TII; 343a0187b1b53eca3143286a5ae7917cd71117b902Tom Stellard static const uint16_t CalleeSavedReg; 35a75c6163e605f35b14f26930dd9227e4f337ec9eTom Stellard 363a0187b1b53eca3143286a5ae7917cd71117b902Tom Stellard AMDGPURegisterInfo(TargetMachine &tm, const TargetInstrInfo &tii); 37a75c6163e605f35b14f26930dd9227e4f337ec9eTom Stellard 383a0187b1b53eca3143286a5ae7917cd71117b902Tom Stellard virtual BitVector getReservedRegs(const MachineFunction &MF) const { 393a0187b1b53eca3143286a5ae7917cd71117b902Tom Stellard assert(!"Unimplemented"); return BitVector(); 403a0187b1b53eca3143286a5ae7917cd71117b902Tom Stellard } 41a75c6163e605f35b14f26930dd9227e4f337ec9eTom Stellard 42bcfc97dbf40c256ed59c2424e0c55b845f0f2569Tom Stellard /// getISARegClass - rc is an AMDIL reg class. This function returns the 43bcfc97dbf40c256ed59c2424e0c55b845f0f2569Tom Stellard /// ISA reg class that is equivalent to the given AMDIL reg class. 443a0187b1b53eca3143286a5ae7917cd71117b902Tom Stellard virtual const TargetRegisterClass * getISARegClass( 453a0187b1b53eca3143286a5ae7917cd71117b902Tom Stellard const TargetRegisterClass * rc) const { 463a0187b1b53eca3143286a5ae7917cd71117b902Tom Stellard assert(!"Unimplemented"); return NULL; 473a0187b1b53eca3143286a5ae7917cd71117b902Tom Stellard } 483a0187b1b53eca3143286a5ae7917cd71117b902Tom Stellard 493a0187b1b53eca3143286a5ae7917cd71117b902Tom Stellard virtual const TargetRegisterClass* getCFGStructurizerRegClass(MVT VT) const { 503a0187b1b53eca3143286a5ae7917cd71117b902Tom Stellard assert(!"Unimplemented"); return NULL; 513a0187b1b53eca3143286a5ae7917cd71117b902Tom Stellard } 523a0187b1b53eca3143286a5ae7917cd71117b902Tom Stellard 533a0187b1b53eca3143286a5ae7917cd71117b902Tom Stellard const uint16_t* getCalleeSavedRegs(const MachineFunction *MF) const; 543a0187b1b53eca3143286a5ae7917cd71117b902Tom Stellard void eliminateFrameIndex(MachineBasicBlock::iterator MI, int SPAdj, 553a0187b1b53eca3143286a5ae7917cd71117b902Tom Stellard RegScavenger *RS) const; 563a0187b1b53eca3143286a5ae7917cd71117b902Tom Stellard unsigned getFrameRegister(const MachineFunction &MF) const; 573a0187b1b53eca3143286a5ae7917cd71117b902Tom Stellard 58bcfc97dbf40c256ed59c2424e0c55b845f0f2569Tom Stellard}; 59bcfc97dbf40c256ed59c2424e0c55b845f0f2569Tom Stellard 60a75c6163e605f35b14f26930dd9227e4f337ec9eTom Stellard} // End namespace llvm 61a75c6163e605f35b14f26930dd9227e4f337ec9eTom Stellard 62a75c6163e605f35b14f26930dd9227e4f337ec9eTom Stellard#endif // AMDIDSAREGISTERINFO_H_ 63