armVCM4P2_Clip8_s.s revision 78e52bfac041d71ce53b5b13c2abf78af742b09d 
1;//
2;// Copyright (C) 2007-2008 ARM Limited
3;//
4;// Licensed under the Apache License, Version 2.0 (the "License");
5;// you may not use this file except in compliance with the License.
6;// You may obtain a copy of the License at
7;//
8;//      http://www.apache.org/licenses/LICENSE-2.0
9;//
10;// Unless required by applicable law or agreed to in writing, software
11;// distributed under the License is distributed on an "AS IS" BASIS,
12;// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13;// See the License for the specific language governing permissions and
14;// limitations under the License.
15;//
16; /**
17; *
18; * File Name:  armVCM4P2_Clip8_s.s
19; * OpenMAX DL: v1.0.2
20; * Revision:   12290
21; * Date:       Wednesday, April 9, 2008
22; *
23; *
24; *
25; *
26; * Description:
27; * Contains module for Clipping 16 bit value to [0,255] Range
28; */
29
30      INCLUDE omxtypes_s.h
31      INCLUDE armCOMM_s.h
32
33
34      M_VARIANTS CortexA8
35
36      IF CortexA8
37;//Input Arguments
38
39pSrc                 RN 0
40pDst                 RN 1
41step                 RN 2
42
43;// Neon Registers
44
45qx0                  QN  Q0.S16
46dx00                 DN  D0.S16
47dx01                 DN  D1.S16
48qx1                  QN  Q1.S16
49dx10                 DN  D2.S16
50dx11                 DN  D3.S16
51
52qx2                  QN  Q2.S16
53dx20                 DN  D4.S16
54dx21                 DN  D5.S16
55qx3                  QN  Q3.S16
56dx30                 DN  D6.S16
57dx31                 DN  D7.S16
58
59
60dclip0               DN  D0.U8
61dclip1               DN  D2.U8
62dclip2               DN  D4.U8
63dclip3               DN  D6.U8
64
65       M_START armVCM4P2_Clip8
66
67       VLD1          {dx00,dx01,dx10,dx11},[pSrc]!          ;// Load 16 entries from pSrc
68       VLD1          {dx20,dx21,dx30,dx31},[pSrc]!          ;// Load next 16 entries from pSrc
69       VQSHRUN       dclip0,qx0,#0                          ;// dclip0[i]=clip qx0[i] to [0,255]
70       VQSHRUN       dclip1,qx1,#0                          ;// dclip1[i]=clip qx1[i] to [0,255]
71       VST1          {dclip0},[pDst],step                   ;// store 8 bytes and pDst=pDst+step
72       VST1          {dclip1},[pDst],step                   ;// store 8 bytes and pDst=pDst+step
73       VQSHRUN       dclip2,qx2,#0
74       VQSHRUN       dclip3,qx3,#0
75       VST1          {dclip2},[pDst],step
76       VST1          {dclip3},[pDst],step
77
78       VLD1          {dx00,dx01,dx10,dx11},[pSrc]!          ;// Load 16 entries from pSrc
79       VLD1          {dx20,dx21,dx30,dx31},[pSrc]!          ;// Load next 16 entries from pSrc
80       VQSHRUN       dclip0,qx0,#0                          ;// dclip0[i]=clip qx0[i] to [0,255]
81       VQSHRUN       dclip1,qx1,#0                          ;// dclip1[i]=clip qx1[i] to [0,255]
82       VST1          {dclip0},[pDst],step                   ;// store 8 bytes and pDst=pDst+step
83       VST1          {dclip1},[pDst],step                   ;// store 8 bytes and pDst=pDst+step
84       VQSHRUN       dclip2,qx2,#0
85       VQSHRUN       dclip3,qx3,#0
86       VST1          {dclip2},[pDst],step
87       VST1          {dclip3},[pDst],step
88
89
90
91        M_END
92        ENDIF
93
94
95
96        END
97