CompilerConfig.cpp revision 81f3dd38a551ae31716e9f5f7e73d7b8e7eed5b7
1/* 2 * Copyright 2012, The Android Open Source Project 3 * 4 * Licensed under the Apache License, Version 2.0 (the "License"); 5 * you may not use this file except in compliance with the License. 6 * You may obtain a copy of the License at 7 * 8 * http://www.apache.org/licenses/LICENSE-2.0 9 * 10 * Unless required by applicable law or agreed to in writing, software 11 * distributed under the License is distributed on an "AS IS" BASIS, 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 13 * See the License for the specific language governing permissions and 14 * limitations under the License. 15 */ 16 17#include "bcc/Support/CompilerConfig.h" 18#include "bcc/Config/Config.h" 19#include "bcc/Support/Properties.h" 20 21#include <llvm/CodeGen/SchedulerRegistry.h> 22#include <llvm/MC/SubtargetFeature.h> 23#include <llvm/Support/Host.h> 24#include <llvm/Support/TargetRegistry.h> 25 26#include "bcc/Support/Log.h" 27 28using namespace bcc; 29 30#if defined (PROVIDE_X86_CODEGEN) && !defined(__HOST__) 31 32namespace { 33 34// Utility function to test for f16c feature. This function is only needed for 35// on-device bcc for x86 36bool HasF16C() { 37 llvm::StringMap<bool> features; 38 if (!llvm::sys::getHostCPUFeatures(features)) 39 return false; 40 41 if (features.count("f16c") && features["f16c"]) 42 return true; 43 else 44 return false; 45} 46 47} 48#endif // (PROVIDE_X86_CODEGEN) && !defined(__HOST__) 49 50CompilerConfig::CompilerConfig(const std::string &pTriple) 51 : mTriple(pTriple), mFullPrecision(true), mTarget(nullptr) { 52 //===--------------------------------------------------------------------===// 53 // Default setting of register sheduler 54 //===--------------------------------------------------------------------===// 55 llvm::RegisterScheduler::setDefault(llvm::createDefaultScheduler); 56 57 //===--------------------------------------------------------------------===// 58 // Default setting of target options 59 //===--------------------------------------------------------------------===// 60 61 // Use soft-float ABI. This only selects the ABI (and is applicable only to 62 // ARM targets). Codegen still uses hardware FPU by default. To use software 63 // floating point, add 'soft-float' feature to mFeatureString below. 64 mTargetOpts.FloatABIType = llvm::FloatABI::Soft; 65 66 //===--------------------------------------------------------------------===// 67 // Default setting for code model 68 //===--------------------------------------------------------------------===// 69 mCodeModel = llvm::CodeModel::Small; 70 71 //===--------------------------------------------------------------------===// 72 // Default setting for relocation model 73 //===--------------------------------------------------------------------===// 74 mRelocModel = llvm::Reloc::Default; 75 76 //===--------------------------------------------------------------------===// 77 // Default setting for optimization level (-O2) 78 //===--------------------------------------------------------------------===// 79 mOptLevel = llvm::CodeGenOpt::Default; 80 81 //===--------------------------------------------------------------------===// 82 // Default setting for architecture type 83 //===--------------------------------------------------------------------===// 84 mArchType = llvm::Triple::UnknownArch; 85 86 initializeTarget(); 87 initializeArch(); 88 89 return; 90} 91 92bool CompilerConfig::initializeTarget() { 93 std::string error; 94 mTarget = llvm::TargetRegistry::lookupTarget(mTriple, error); 95 if (mTarget != nullptr) { 96 return true; 97 } else { 98 ALOGE("Cannot initialize llvm::Target for given triple '%s'! (%s)", 99 mTriple.c_str(), error.c_str()); 100 return false; 101 } 102} 103 104bool CompilerConfig::initializeArch() { 105 if (mTarget != nullptr) { 106 mArchType = llvm::Triple::getArchTypeForLLVMName(mTarget->getName()); 107 } else { 108 mArchType = llvm::Triple::UnknownArch; 109 return false; 110 } 111 112 // Configure each architecture for any necessary additional flags. 113 switch (mArchType) { 114#if defined(PROVIDE_ARM_CODEGEN) 115 case llvm::Triple::arm: { 116 llvm::StringMap<bool> features; 117 llvm::sys::getHostCPUFeatures(features); 118 std::vector<std::string> attributes; 119 120#if defined(__HOST__) || defined(ARCH_ARM_HAVE_VFP) 121 attributes.push_back("+vfp3"); 122#if !defined(__HOST__) && !defined(ARCH_ARM_HAVE_VFP_D32) 123 attributes.push_back("+d16"); 124#endif // !__HOST__ && !ARCH_ARM_HAVE_VFP_D32 125#endif // __HOST__ || ARCH_ARM_HAVE_VFP 126 127#if defined(__HOST__) || defined(ARCH_ARM_HAVE_NEON) 128 // Only enable NEON on ARM if we have relaxed precision floats. 129 if (!mFullPrecision) { 130 attributes.push_back("+neon"); 131 } else { 132#endif // __HOST__ || ARCH_ARM_HAVE_NEON 133 attributes.push_back("-neon"); 134 attributes.push_back("-neonfp"); 135#if defined(__HOST__) || defined(ARCH_ARM_HAVE_NEON) 136 } 137#endif // __HOST__ || ARCH_ARM_HAVE_NEON 138 139 if (!getProperty("debug.rs.arm-no-hwdiv")) { 140 if (features.count("hwdiv-arm") && features["hwdiv-arm"]) 141 attributes.push_back("+hwdiv-arm"); 142 143 if (features.count("hwdiv") && features["hwdiv"]) 144 attributes.push_back("+hwdiv"); 145 } 146 147 // Enable fp16 attribute if available in the feature list. This feature 148 // will not be added in the host version of bcc or bcc_compat since 149 // 'features' would correspond to features in an x86 host. 150 if (features.count("fp16") && features["fp16"]) 151 attributes.push_back("+fp16"); 152 153 setFeatureString(attributes); 154 155#if defined(TARGET_BUILD) 156 if (!getProperty("debug.rs.arm-no-tune-for-cpu")) { 157#ifndef FORCE_CPU_VARIANT_32 158 setCPU(llvm::sys::getHostCPUName()); 159#else 160#define XSTR(S) #S 161#define STR(S) XSTR(S) 162 setCPU(STR(FORCE_CPU_VARIANT_32)); 163#undef STR 164#undef XSTR 165#endif 166 } 167#endif // TARGET_BUILD 168 169 break; 170 } 171#endif // PROVIDE_ARM_CODEGEN 172 173#if defined(PROVIDE_ARM64_CODEGEN) 174 case llvm::Triple::aarch64: 175#if defined(TARGET_BUILD) 176 if (!getProperty("debug.rs.arm-no-tune-for-cpu")) { 177#ifndef FORCE_CPU_VARIANT_64 178 setCPU(llvm::sys::getHostCPUName()); 179#else 180#define XSTR(S) #S 181#define STR(S) XSTR(S) 182 setCPU(STR(FORCE_CPU_VARIANT_64)); 183#undef STR 184#undef XSTR 185#endif 186 187 } 188#endif // TARGET_BUILD 189 break; 190#endif // PROVIDE_ARM64_CODEGEN 191 192#if defined (PROVIDE_MIPS_CODEGEN) 193 case llvm::Triple::mips: 194 case llvm::Triple::mipsel: 195 if (getRelocationModel() == llvm::Reloc::Default) { 196 setRelocationModel(llvm::Reloc::Static); 197 } 198 break; 199#endif // PROVIDE_MIPS_CODEGEN 200 201#if defined (PROVIDE_MIPS64_CODEGEN) 202 case llvm::Triple::mips64: 203 case llvm::Triple::mips64el: 204 // Default revision for MIPS64 Android is R6. 205 setCPU("mips64r6"); 206 break; 207#endif // PROVIDE_MIPS64_CODEGEN 208 209#if defined (PROVIDE_X86_CODEGEN) 210 case llvm::Triple::x86: 211 getTargetOptions().UseInitArray = true; 212 213#ifndef __HOST__ 214 // If not running on the host, and f16c is available, set it in the feature 215 // string 216 if (HasF16C()) 217 mFeatureString = "+f16c"; 218#endif // __HOST__ 219 220 break; 221#endif // PROVIDE_X86_CODEGEN 222 223#if defined (PROVIDE_X86_CODEGEN) 224 case llvm::Triple::x86_64: 225 // x86_64 needs small CodeModel if use PIC_ reloc, or else dlopen failed with TEXTREL. 226 if (getRelocationModel() == llvm::Reloc::PIC_) { 227 setCodeModel(llvm::CodeModel::Small); 228 } else { 229 setCodeModel(llvm::CodeModel::Medium); 230 } 231 getTargetOptions().UseInitArray = true; 232 233#ifndef __HOST__ 234 // If not running on the host, and f16c is available, set it in the feature 235 // string 236 if (HasF16C()) 237 mFeatureString = "+f16c"; 238#endif // __HOST__ 239 240 break; 241#endif // PROVIDE_X86_CODEGEN 242 243 default: 244 ALOGE("Unsupported architecture type: %s", mTarget->getName()); 245 return false; 246 } 247 248 return true; 249} 250 251void CompilerConfig::setFeatureString(const std::vector<std::string> &pAttrs) { 252 llvm::SubtargetFeatures f; 253 254 for (std::vector<std::string>::const_iterator attr_iter = pAttrs.begin(), 255 attr_end = pAttrs.end(); 256 attr_iter != attr_end; attr_iter++) { 257 f.AddFeature(*attr_iter); 258 } 259 260 mFeatureString = f.getString(); 261 return; 262} 263