x86_sse2.ll revision 146e138f5c6eb4980ee6d85d33b951b87b6e8efe 
1target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32-n8:16:32-S128"
2target triple = "i386-unknown-linux-gnu"
3
4declare <4 x float> @llvm.x86.sse.min.ps(<4 x float>, <4 x float>)
5declare <4 x float> @llvm.x86.sse.max.ps(<4 x float>, <4 x float>)
6declare <4 x float> @llvm.x86.sse.min.ss(<4 x float>, <4 x float>)
7declare <4 x float> @llvm.x86.sse.max.ss(<4 x float>, <4 x float>)
8
9declare float @llvm.sqrt.f32(float) nounwind readnone
10declare <2 x float> @llvm.sqrt.v2f32(<2 x float>) nounwind readnone
11declare <3 x float> @llvm.sqrt.v3f32(<3 x float>) nounwind readnone
12declare <4 x float> @llvm.sqrt.v4f32(<4 x float>) nounwind readnone
13
14declare float @llvm.exp.f32(float) nounwind readonly
15declare float @llvm.pow.f32(float, float) nounwind readonly
16
17define <4 x float> @_Z5clampDv4_fS_S_(<4 x float> %in, <4 x float> %low, <4 x float> %high) nounwind readnone alwaysinline {
18  %1 = tail call <4 x float> @llvm.x86.sse.min.ps(<4 x float> %in, <4 x float> %high) nounwind readnone
19  %2 = tail call <4 x float> @llvm.x86.sse.max.ps(<4 x float> %1, <4 x float> %low) nounwind readnone
20  ret <4 x float> %2
21}
22
23define <3 x float> @_Z5clampDv3_fS_S_(<3 x float> %in, <3 x float> %low, <3 x float> %high) nounwind readnone alwaysinline {
24  %1 = shufflevector <3 x float> %in, <3 x float> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
25  %2 = shufflevector <3 x float> %low, <3 x float> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
26  %3 = shufflevector <3 x float> %high, <3 x float> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
27  %4 = tail call <4 x float> @_Z5clampDv4_fS_S_(<4 x float> %1, <4 x float> %2, <4 x float> %3) nounwind readnone
28  %5 = shufflevector <4 x float> %4, <4 x float> undef, <3 x i32> <i32 0, i32 1, i32 2>
29  ret <3 x float> %5
30}
31
32define <2 x float> @_Z5clampDv2_fS_S_(<2 x float> %in, <2 x float> %low, <2 x float> %high) nounwind readnone alwaysinline {
33  %1 = shufflevector <2 x float> %in, <2 x float> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
34  %2 = shufflevector <2 x float> %low, <2 x float> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
35  %3 = shufflevector <2 x float> %high, <2 x float> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
36  %4 = tail call <4 x float> @_Z5clampDv4_fS_S_(<4 x float> %1, <4 x float> %2, <4 x float> %3) nounwind readnone
37  %5 = shufflevector <4 x float> %4, <4 x float> undef, <2 x i32> <i32 0, i32 1>
38  ret <2 x float> %5
39}
40
41define float @_Z5clampfff(float %in, float %low, float %high) nounwind readnone alwaysinline {
42  %1 = insertelement <4 x float> undef, float %in, i32 0
43  %2 = insertelement <4 x float> undef, float %low, i32 0
44  %3 = insertelement <4 x float> undef, float %high, i32 0
45  %4 = tail call <4 x float> @llvm.x86.sse.min.ss(<4 x float> %1, <4 x float> %3) nounwind readnone
46  %5 = tail call <4 x float> @llvm.x86.sse.max.ss(<4 x float> %4, <4 x float> %2) nounwind readnone
47  %6 = extractelement <4 x float> %5, i32 0
48  ret float %6
49}
50
51define <4 x float> @_Z5clampDv4_fff(<4 x float> %in, float %low, float %high) nounwind readonly {
52  %1 = insertelement <4 x float> undef, float %low, i32 0
53  %2 = insertelement <4 x float> %1, float %low, i32 1
54  %3 = insertelement <4 x float> %2, float %low, i32 2
55  %4 = insertelement <4 x float> %3, float %low, i32 3
56  %5 = insertelement <4 x float> undef, float %high, i32 0
57  %6 = insertelement <4 x float> %5, float %high, i32 1
58  %7 = insertelement <4 x float> %6, float %high, i32 2
59  %8 = insertelement <4 x float> %7, float %high, i32 3
60  %9 = tail call <4 x float> @_Z5clampDv4_fS_S_(<4 x float> %in, <4 x float> %4, <4 x float> %8) nounwind readnone
61  ret <4 x float> %9
62}
63
64define <3 x float> @_Z5clampDv3_fff(<3 x float> %in, float %low, float %high) nounwind readonly {
65  %1 = insertelement <3 x float> undef, float %low, i32 0
66  %2 = insertelement <3 x float> %1, float %low, i32 1
67  %3 = insertelement <3 x float> %2, float %low, i32 2
68  %4 = insertelement <3 x float> undef, float %high, i32 0
69  %5 = insertelement <3 x float> %4, float %high, i32 1
70  %6 = insertelement <3 x float> %5, float %high, i32 2
71  %7 = tail call <3 x float> @_Z5clampDv3_fS_S_(<3 x float> %in, <3 x float> %3, <3 x float> %6) nounwind readnone
72  ret <3 x float> %7
73}
74
75define <2 x float> @_Z5clampDv2_fff(<2 x float> %in, float %low, float %high) nounwind readonly {
76  %1 = insertelement <2 x float> undef, float %low, i32 0
77  %2 = insertelement <2 x float> %1, float %low, i32 1
78  %3 = insertelement <2 x float> undef, float %high, i32 0
79  %4 = insertelement <2 x float> %3, float %high, i32 1
80  %5 = tail call <2 x float> @_Z5clampDv2_fS_S_(<2 x float> %in, <2 x float> %2, <2 x float> %4) nounwind readnone
81  ret <2 x float> %5
82}
83
84define float @_Z4sqrtf(float %in) nounwind readnone alwaysinline {
85  %1 = tail call float @llvm.sqrt.f32(float %in) nounwind readnone
86  ret float %1
87}
88
89define <2 x float> @_Z4sqrtDv2_f(<2 x float> %in) nounwind readnone alwaysinline {
90  %1 = tail call <2 x float> @llvm.sqrt.v2f32(<2 x float> %in) nounwind readnone
91  ret <2 x float> %1
92}
93
94define <3 x float> @_Z4sqrtDv3_f(<3 x float> %in) nounwind readnone alwaysinline {
95  %1 = tail call <3 x float> @llvm.sqrt.v3f32(<3 x float> %in) nounwind readnone
96  ret <3 x float> %1
97}
98
99define <4 x float> @_Z4sqrtDv4_f(<4 x float> %in) nounwind readnone alwaysinline {
100  %1 = tail call <4 x float> @llvm.sqrt.v4f32(<4 x float> %in) nounwind readnone
101  ret <4 x float> %1
102}
103