1/******************************************************************************
2 *
3 *  Copyright (C) 2015 Motorola Corporation
4 *
5 *  Licensed under the Apache License, Version 2.0 (the "License");
6 *  you may not use this file except in compliance with the License.
7 *  You may obtain a copy of the License at:
8 *
9 *  http://www.apache.org/licenses/LICENSE-2.0
10 *
11 *  Unless required by applicable law or agreed to in writing, software
12 *  distributed under the License is distributed on an "AS IS" BASIS,
13 *  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14 *  See the License for the specific language governing permissions and
15 *  limitations under the License.
16 *
17 ******************************************************************************/
18
19/******************************************************************************
20 *
21 *  Filename:      bt_vendor_brcm_a2dp.h
22 *
23 *  Description:   Contains definitions specific for interfacing with Broadcom
24 *                 Bluetooth chipsets for A2DP Offload implementation.
25 *
26 ******************************************************************************/
27
28#ifndef BT_VENDOR_BRCM_A2DP_H
29#define BT_VENDOR_BRCM_A2DP_H
30
31#include "bt_vendor_brcm.h"
32#include "bt_target.h"
33#include "uipc_msg.h"
34
35/******************************************************************************
36**  Constants & Macros
37******************************************************************************/
38
39#define HCI_VSC_WRITE_PCM_PINS  0xFC61
40#define HCI_VSC_READ_PCM_PINS   0xFC62
41#define HCI_VSC_UIPC_OVER_HCI   0xFC8B
42
43/* pinmux for I2S pins */
44#define PCM_PIN_FCN_GPIO 0x00
45#define PCM_PIN_FCN_PCM  0x01
46#define PCM_PIN_FCN_I2S_MASTER 0x05
47#define PCM_PIN_FCN_I2S_SLAVE  0x07
48#define PCM_PIN_FCN_INVALID    0xFF
49
50/* PADCONF for I2S pins */
51/* From LSB, byte map to DIN, DOUT, WS, CLK */
52/*
53bit 0:   0 OUTPUT, 1 INPUT
54bit 1:   0 NO-PULL,1 PULL-UP
55bit 2:   0 NO-PULL,1 PULL-DN
56bit 3:   1 SHMITT Trigger Enable
57bit 4-7:   Drive Strength
58*/
59/* Define standard Master & Slave I2S PADCONFs */
60#define PCM_PIN_PADCNF_I2S_SLAVE  0x19191819
61#define PCM_PIN_PADCNF_I2S_MASTER 0x18181819
62
63#define HCI_EVT_CMD_CMPL_LEN    1
64#define HCI_EVT_CMD_CMPL_VSC    3
65#define HCI_CMD_PREAMBLE_SIZE   3
66#define HCI_CMD_MAX_LEN         258
67
68#define UNUSED(x) (void)(x)
69
70#if (BRCM_A2DP_OFFLOAD != TRUE)
71#define BRCM_A2DP_OFFLOAD    FALSE
72#endif
73
74/* A2DP offload parameters from vnd_<prod>.txt */
75
76#ifndef BRCM_A2DP_OFFLOAD_SRC
77#define BRCM_A2DP_OFFLOAD_SRC  AUDIO_ROUTE_SRC_I2S
78#endif
79
80#ifndef BRCM_A2DP_OFFLOAD_SRC_SF
81#define BRCM_A2DP_OFFLOAD_SRC_SF  AUDIO_ROUTE_SF_48K
82#endif
83
84#ifndef BRCM_A2DP_OFFLOAD_MAX_BITPOOL
85/* High quality setting @ 44.1 kHz */
86#define BRCM_A2DP_OFFLOAD_MAX_BITPOOL 53
87#endif
88
89#ifndef BRCM_A2DP_OFFLOAD_PCM_PIN_FCN
90#define BRCM_A2DP_OFFLOAD_PCM_PIN_FCN PCM_PIN_FCN_I2S_SLAVE
91#endif
92
93#ifndef BRCM_A2DP_OFFLOAD_PCM_PIN_PADCNF
94#if (BRCM_A2DP_OFFLOAD_PCM_PIN_FCN == PCM_PIN_FCN_I2S_MASTER)
95#define BRCM_A2DP_OFFLOAD_PCM_PIN_PADCNF  PCM_PIN_PADCNF_I2S_MASTER
96#else
97#define BRCM_A2DP_OFFLOAD_PCM_PIN_PADCNF  PCM_PIN_PADCNF_I2S_SLAVE
98#endif
99#endif
100
101#define MULTI_BIT_SET(x) !!(x & (x - 1))
102
103void brcm_vnd_a2dp_init();
104int brcm_vnd_a2dp_execute(bt_vendor_opcode_t, void *ev_data);
105
106#endif /*BT_VENDOR_BRCM_A2DP_H*/
107