pnw_cmdbuf.h revision d03b75a0bb7d76d8d05509f5b581ab3b5d36a20d
1/* 2 * Copyright (c) 2011 Intel Corporation. All Rights Reserved. 3 * Copyright (c) Imagination Technologies Limited, UK 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the 7 * "Software"), to deal in the Software without restriction, including 8 * without limitation the rights to use, copy, modify, merge, publish, 9 * distribute, sub license, and/or sell copies of the Software, and to 10 * permit persons to whom the Software is furnished to do so, subject to 11 * the following conditions: 12 * 13 * The above copyright notice and this permission notice (including the 14 * next paragraph) shall be included in all copies or substantial portions 15 * of the Software. 16 * 17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 18 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. 20 * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR 21 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, 22 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE 23 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 24 * 25 * Authors: 26 * Waldo Bastian <waldo.bastian@intel.com> 27 * Zeng Li <zeng.li@intel.com> 28 * 29 */ 30 31#ifndef _PNW_CMDBUF_H_ 32#define _PNW_CMDBUF_H_ 33 34#include "psb_drv_video.h" 35#include "psb_surface.h" 36#include "psb_buffer.h" 37#include <linux/psb_drm.h> 38 39#include <stdint.h> 40 41#define MTX_CMDWORD_ID_MASK (0x7f) 42#define MTX_CMDWORD_ID_SHIFT (0) 43#define MTX_CMDWORD_CORE_MASK (0xff) 44#define MTX_CMDWORD_CORE_SHIFT (8) 45#define MTX_CMDWORD_COUNT_MASK (0x7fff) 46#define MTX_CMDWORD_COUNT_SHIFT (16) 47#define MTX_CMDWORD_INT_SHIFT (7) 48#define MTX_CMDWORD_INT_MASK (1) 49 50#define PNW_CMDBUF_START_PIC_IDX (0) 51#define PNW_CMDBUF_SEQ_HEADER_IDX (1) 52#define PNW_CMDBUF_PIC_HEADER_IDX (2) 53#define PNW_CMDBUF_SEI_BUF_PERIOD_IDX (3) 54#define PNW_CMDBUF_SEI_PIC_TIMING_IDX (4) 55#define PNW_CMDBUF_SAVING_MAX (5) 56 57struct pnw_cmdbuf_s { 58 struct psb_buffer_s buf; 59 unsigned int size; 60 61 /* Relocation records */ 62 unsigned char *reloc_base; 63 struct drm_psb_reloc *reloc_idx; 64 65 /* CMD stream data */ 66 int cmd_count; 67 unsigned char *cmd_base; 68 unsigned char *cmd_start; 69 uint32_t *cmd_idx; 70 uint32_t *cmd_idx_saved[PNW_CMDBUF_SAVING_MAX]; /* idx saved for dual-core adjustion */ 71 72 /* all frames share one topaz param buffer which contains InParamBase 73 * AboveParam/BellowParam, and the buffer allocated when the context is created 74 */ 75 struct psb_buffer_s *topaz_in_params_I; 76 unsigned char *topaz_in_params_I_p; 77 78 struct psb_buffer_s *topaz_in_params_P; 79 unsigned char *topaz_in_params_P_p; 80 81 struct psb_buffer_s *topaz_below_params; 82 unsigned char *topaz_below_params_p; 83 84 /* Every frame has its own PIC_PARAMS, SLICE_PARAMS and HEADER mem 85 */ 86 87 /* PicParams: */ 88 struct psb_buffer_s pic_params; 89 unsigned char *pic_params_p; 90 91 /* SeqHeaderMem PicHeaderMem EOSeqHeaderMem EOStreamHeaderMem SliceHeaderMem[MAX_SLICES_PER_PICTURE]*/ 92 struct psb_buffer_s header_mem; 93 unsigned char *header_mem_p; 94 95 /*SliceParams[MAX_SLICES_PER_PICTURE] */ 96 struct psb_buffer_s slice_params; 97 unsigned char *slice_params_p; 98 99 /* AboveParams[MAX_TOPAZ_CORES]; */ 100 struct psb_buffer_s *topaz_above_params; 101 unsigned char *topaz_above_params_p; 102 103 /* Referenced buffers */ 104 psb_buffer_p *buffer_refs; 105 int buffer_refs_count; 106 int buffer_refs_allocated; 107 108}; 109 110typedef struct pnw_cmdbuf_s *pnw_cmdbuf_p; 111 112/* 113 * Create command buffer 114 */ 115VAStatus pnw_cmdbuf_create(object_context_p obj_context, 116 psb_driver_data_p driver_data, 117 pnw_cmdbuf_p cmdbuf 118 ); 119 120/* 121 * Destroy buffer 122 */ 123void pnw_cmdbuf_destroy(pnw_cmdbuf_p cmdbuf); 124 125/* 126 * Reset buffer & map 127 * 128 * Returns 0 on success 129 */ 130int pnw_cmdbuf_reset(pnw_cmdbuf_p cmdbuf); 131 132/* 133 * Unmap buffer 134 * 135 * Returns 0 on success 136 */ 137int pnw_cmdbuf_unmap(pnw_cmdbuf_p cmdbuf); 138 139/* 140 * Reference an addtional buffer "buf" in the command stream 141 * Returns a reference index that can be used to refer to "buf" in 142 * relocation records, on error -1 is returned. 143 */ 144int pnw_cmdbuf_buffer_ref(pnw_cmdbuf_p cmdbuf, psb_buffer_p buf); 145 146/* Creates a relocation record for a DWORD in the mapped "cmdbuf" at address 147 * "addr_in_cmdbuf" 148 * The relocation is based on the device virtual address of "ref_buffer" 149 * "buf_offset" is be added to the device virtual address, and the sum is then 150 * right shifted with "align_shift". 151 * "mask" determines which bits of the target DWORD will be updated with the so 152 * constructed address. The remaining bits will be filled with bits from "background". 153 */ 154void pnw_cmdbuf_add_relocation(pnw_cmdbuf_p cmdbuf, 155 uint32_t *addr_in_dst_buffer,/*addr of dst_buffer for the DWORD*/ 156 psb_buffer_p ref_buffer, 157 uint32_t buf_offset, 158 uint32_t mask, 159 uint32_t background, 160 uint32_t align_shift, 161 uint32_t dst_buffer, /*Index of the list refered by cmdbuf->buffer_refs */ 162 uint32_t *start_of_dst_buffer); 163 164#define RELOC_CMDBUF_PNW(dest, offset, buf) pnw_cmdbuf_add_relocation(cmdbuf, (uint32_t*)(dest), buf, offset, 0XFFFFFFFF, 0, 0, 0, (uint32_t *)cmdbuf->cmd_start) 165 166/* do relocation in PIC_PARAMS: src/dst Y/UV base, InParamsBase, CodeBase, BellowParamsBase, AboveParamsBase */ 167#define RELOC_PIC_PARAMS_PNW(dest, offset, buf) pnw_cmdbuf_add_relocation(cmdbuf, (uint32_t*)(dest), buf, offset, 0XFFFFFFFF, 0, 0, 1, (uint32_t *)cmdbuf->pic_params_p) 168 169/* do relocation in SLICE_PARAMS: reference Y/UV base,CodedData */ 170#define RELOC_SLICE_PARAMS_PNW(dest, offset, buf) pnw_cmdbuf_add_relocation(cmdbuf, (uint32_t*)(dest), buf, offset, 0XFFFFFFFF, 0, 0, 2,(uint32_t *)cmdbuf->slice_params_p) 171 172/* operation number is inserted by DRM */ 173/* 174#define pnw_cmdbuf_insert_command(cmdbuf,cmdhdr,size,hint) \ 175 do { *cmdbuf->cmd_idx++ = ((cmdhdr) << 1) | ((size)<<8) | ((hint)<<16); } while(0) 176*/ 177 178#define pnw_cmdbuf_insert_command_param(param) \ 179 do { *cmdbuf->cmd_idx++ = param; } while(0) 180 181 182#define pnw_cmdbuf_insert_reg_write(base, offset, value) \ 183 do { *cmdbuf->cmd_idx++ = base + offset; *cmdbuf->cmd_idx++ = value; count++; } while(0) 184 185void pnw_cmdbuf_insert_command_package(object_context_p obj_context, 186 int32_t core, 187 uint32_t cmd_id, 188 psb_buffer_p command_data, 189 uint32_t offset); 190 191/* 192 * Advances "obj_context" to the next cmdbuf 193 * 194 * Returns 0 on success 195 */ 196int pnw_context_get_next_cmdbuf(object_context_p obj_context); 197 198/* 199 * Submits the current cmdbuf 200 * 201 * Returns 0 on success 202 */ 203int pnw_context_submit_cmdbuf(object_context_p obj_context); 204 205/* 206 * Get a encode surface FRAMESKIP flag, and store it into frame_skip argument 207 * 208 * Returns 0 on success 209 */ 210int pnw_surface_get_frameskip(psb_driver_data_p driver_data, psb_surface_p psb_surface, int *frame_skip); 211 212/* 213 * Flushes the pending cmdbuf 214 * 215 * Return 0 on success 216 */ 217int pnw_context_flush_cmdbuf(object_context_p obj_context); 218 219/* 220 * Get the number of paralled cores used. 221 * 222 * Return the number of paralled cores used. 223 */ 224int pnw_get_parallel_core_number(object_context_p obj_context); 225#endif /* _PNW_CMDBUF_H_ */ 226 227