psb_buffer.h revision 38f419a75e2994d6afe2ffb360d5f5b7670ce077
1/* 2 * Copyright (c) 2011 Intel Corporation. All Rights Reserved. 3 * Copyright (c) Imagination Technologies Limited, UK 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the 7 * "Software"), to deal in the Software without restriction, including 8 * without limitation the rights to use, copy, modify, merge, publish, 9 * distribute, sub license, and/or sell copies of the Software, and to 10 * permit persons to whom the Software is furnished to do so, subject to 11 * the following conditions: 12 * 13 * The above copyright notice and this permission notice (including the 14 * next paragraph) shall be included in all copies or substantial portions 15 * of the Software. 16 * 17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 18 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. 20 * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR 21 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, 22 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE 23 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 24 * 25 * Authors: 26 * Waldo Bastian <waldo.bastian@intel.com> 27 * 28 */ 29 30#ifndef _PSB_BUFFER_H_ 31#define _PSB_BUFFER_H_ 32 33#include "psb_drv_video.h" 34 35//#include "xf86mm.h" 36 37/* For TopazSC, it indicates the next frame should be skipped */ 38#define SKIP_NEXT_FRAME 0x800 39 40typedef struct psb_buffer_s *psb_buffer_p; 41 42/* VPU = MSVDX */ 43typedef enum psb_buffer_type_e { 44 psb_bt_cpu_vpu = 0, /* Shared between CPU & Video PU */ 45 psb_bt_cpu_vpu_shared, /* CPU/VPU can access, and can shared by other process */ 46 psb_bt_surface, /* linear surface */ 47 psb_bt_surface_tt, /* surface allocated in TT*/ 48#ifdef PSBVIDEO_MSVDX_DEC_TILING 49 psb_bt_mmu_tiling, /* Tiled surface */ 50 psb_bt_surface_tiling, /* Tiled surface */ 51#endif 52 psb_bt_vpu_only, /* Only used by Video PU */ 53 psb_bt_cpu_only, /* Only used by CPU */ 54 psb_bt_camera, /* memory is camera device memory */ 55 psb_bt_imr, /* global RAR buffer */ 56 psb_bt_imr_surface, /* memory is RAR device memory for protected surface*/ 57 psb_bt_imr_slice, /* memory is RAR device memory for slice data */ 58 psb_bt_user_buffer, /* memory is from user buffers */ 59 psb_bt_cpu_vpu_cached /* Cached & CPU/VPU can access */ 60} psb_buffer_type_t; 61 62typedef enum psb_buffer_status_e { 63 psb_bs_unfinished = 0, 64 psb_bs_ready, 65 psb_bs_queued, 66 psb_bs_abandoned 67} psb_buffer_status_t; 68 69struct psb_buffer_s { 70 struct _WsbmBufferObject *drm_buf; 71 int wsbm_synccpu_flag; 72 uint64_t pl_flags; 73 74 psb_buffer_type_t type; 75 psb_buffer_status_t status; 76 uint32_t rar_handle; 77 unsigned int buffer_ofs; /* several buffers may share one BO (camera/RAR), and use offset to distinguish it */ 78 struct psb_buffer_s *next; 79 unsigned char *user_ptr; /* user pointer for user buffers */ 80 psb_driver_data_p driver_data; /* for RAR buffer release */ 81 uint32_t size; 82 void *handle; 83 unsigned char *virtual_addr; 84}; 85 86/* 87 * Create buffer 88 */ 89VAStatus psb_buffer_create(psb_driver_data_p driver_data, 90 unsigned int size, 91 psb_buffer_type_t type, 92 psb_buffer_p buf 93 ); 94/* flags: 0 indicates cache */ 95#define PSB_USER_BUFFER_UNCACHED (0x1) 96#define PSB_USER_BUFFER_WC (0x1<<1) 97/* 98 * Create buffer from user ptr 99 */ 100VAStatus psb_buffer_create_from_ub(psb_driver_data_p driver_data, 101 unsigned int size, 102 psb_buffer_type_t type, 103 psb_buffer_p buf, 104 void * vaddr, 105 unsigned int flags 106 ); 107 108/* 109 * Setstatus Buffer 110 */ 111int psb_buffer_setstatus(psb_buffer_p buf, uint32_t set_placement, uint32_t clr_placement); 112 113 114/* 115 * Reference buffer 116 */ 117VAStatus psb_buffer_reference(psb_driver_data_p driver_data, 118 psb_buffer_p buf, 119 psb_buffer_p reference_buf 120 ); 121/* 122 * 123 */ 124VAStatus psb_kbuffer_reference(psb_driver_data_p driver_data, 125 psb_buffer_p buf, 126 int kbuf_handle 127 ); 128 129/* 130 * Suspend buffer 131 */ 132void psb__suspend_buffer(psb_driver_data_p driver_data, object_buffer_p obj_buffer); 133 134/* 135 * Destroy buffer 136 */ 137void psb_buffer_destroy(psb_buffer_p buf); 138 139/* 140 * Map buffer 141 * 142 * Returns 0 on success 143 */ 144int psb_buffer_map(psb_buffer_p buf, unsigned char **address /* out */); 145 146int psb_codedbuf_map_mangle( 147 VADriverContextP ctx, 148 object_buffer_p obj_buffer, 149 void **pbuf /* out */ 150); 151 152 153/* 154 * Unmap buffer 155 * 156 * Returns 0 on success 157 */ 158int psb_buffer_unmap(psb_buffer_p buf); 159 160#if PSB_MFLD_DUMMY_CODE 161/* 162 * Create buffer from camera device memory 163 */ 164VAStatus psb_buffer_create_camera(psb_driver_data_p driver_data, 165 psb_buffer_p buf, 166 int is_v4l2, 167 int id_or_ofs 168 ); 169 170/* 171 * Create one buffer from user buffer 172 * id_or_ofs is CI frame ID (actually now is frame offset), or V4L2 buffer offset 173 * user_ptr :virtual address of user buffer start. 174 */ 175VAStatus psb_buffer_create_camera_from_ub(psb_driver_data_p driver_data, 176 psb_buffer_p buf, 177 int id_or_ofs, 178 int size, 179 const unsigned long * user_ptr); 180#endif 181VAStatus psb_buffer_reference_imr(psb_driver_data_p driver_data, 182 uint32_t imr_offset, 183 psb_buffer_p buf 184 ); 185 186#endif /* _PSB_BUFFER_H_ */ 187