Cross Reference: /art/compiler/optimizing/register

Lines Matching defs:end
134 void RegisterAllocator::BlockRegister(Location location, size_t start, size_t end) {
152   interval->AddRange(start, end);
155 void RegisterAllocator::BlockRegisters(size_t start, size_t end, bool caller_save_only) {
158       BlockRegister(Location::RegisterLocation(i), start, end);
163       BlockRegister(Location::FpuRegisterLocation(i), start, end);
632         active_.end(),
644     active_.erase(active_kept_end, active_.end());
765           // The input must be live until the end of `defined_by`, to comply to
766           // the linear scan algorithm. So we use `defined_by`'s end lifetime
897   // so if there are caller-save registers available at the end, we continue the iteration.
942   DCHECK(intervals->begin() <= pos && pos < intervals->end());
945     DCHECK(pos + 1 < intervals->end());
960   for (auto it = active_.begin(), end = active_.end(); it != end; ++it) {
994     // case the low interval had to split both intervals, we may end up in a
1115     for (auto it = active_.begin(), end = active_.end(); it != end; ++it) {
1129     // NOTE: Retrieve end() on each iteration because we're removing elements in the loop body.
1130     for (auto it = inactive_.begin(); it != inactive_.end(); ) {
1149               // at the end of the lifetime hole of `inactive`.
1354   size_t end = interval->GetLastSibling()->GetEnd();
1358       spill_slots->resize(slot + 2u, end);
1360     (*spill_slots)[slot] = end;
1361     (*spill_slots)[slot + 1] = end;
1365       spill_slots->push_back(end);
1367       (*spill_slots)[slot] = end;
1788   // `GetSiblingAt` returns the interval whose start and end cover `position`,