Cross Reference: /external/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp

Lines Matching refs:SIGN_EXTEND
990       Op.getValueType().isByteSized() ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND;
1401   case ISD::SIGN_EXTEND:        return visitSIGN_EXTEND(N);
1489     case ISD::SIGN_EXTEND:
1769   if (N0.getOpcode() == ISD::SIGN_EXTEND &&
1771       !TLI.isOperationLegal(ISD::SIGN_EXTEND, MVT::i1)) {
2502       N0 = DAG.getNode(ISD::SIGN_EXTEND, DL, NewVT, N0);
2503       N1 = DAG.getNode(ISD::SIGN_EXTEND, DL, NewVT, N1);
2616       SDValue Lo = DAG.getNode(ISD::SIGN_EXTEND, DL, NewVT, N->getOperand(0));
2617       SDValue Hi = DAG.getNode(ISD::SIGN_EXTEND, DL, NewVT, N->getOperand(1));
2729        N0.getOpcode() == ISD::SIGN_EXTEND ||
4054   if ((LHSShiftAmt.getOpcode() == ISD::SIGN_EXTEND ||
4058       (RHSShiftAmt.getOpcode() == ISD::SIGN_EXTEND ||
4439               N0.getOpcode() == ISD::SIGN_EXTEND) &&
4648           TLI.isOperationLegalOrCustom(ISD::SIGN_EXTEND, TruncVT) &&
4659         return DAG.getNode(ISD::SIGN_EXTEND, DL,
5732   assert((Opcode == ISD::SIGN_EXTEND || Opcode == ISD::ZERO_EXTEND ||
5769     if (Opcode == ISD::SIGN_EXTEND || Opcode == ISD::SIGN_EXTEND_VECTOR_INREG)
5869   assert((N->getOpcode() == ISD::SIGN_EXTEND ||
5905       N->getOpcode() == ISD::SIGN_EXTEND ? ISD::SEXTLOAD : ISD::ZEXTLOAD;
5969   if (N0.getOpcode() == ISD::SIGN_EXTEND || N0.getOpcode() == ISD::ANY_EXTEND)
5970     return DAG.getNode(ISD::SIGN_EXTEND, SDLoc(N), VT,
6003         return DAG.getNode(ISD::SIGN_EXTEND, SDLoc(N), VT, Op);
6033       DoXform = ExtendUsesToFormExtLoad(N, N0, ISD::SIGN_EXTEND, SetCCs, TLI);
6047                       ISD::SIGN_EXTEND);
6091         DoXform = ExtendUsesToFormExtLoad(N, N0.getOperand(0), ISD::SIGN_EXTEND,
6109                         ISD::SIGN_EXTEND);
6536       N0.getOpcode() == ISD::SIGN_EXTEND)
6918   if (N0.getOpcode() == ISD::SIGN_EXTEND || N0.getOpcode() == ISD::ANY_EXTEND) {
6921         (!LegalOperations || TLI.isOperationLegal(ISD::SIGN_EXTEND, VT)))
6922       return DAG.getNode(ISD::SIGN_EXTEND, SDLoc(N), VT, N00, N1);
7028       N0.getOpcode() == ISD::SIGN_EXTEND ||
7394         X = DAG.getNode(ISD::SIGN_EXTEND, SDLoc(N), VT, X);
8985       unsigned ExtOp = IsInputSigned && IsOutputSigned ? ISD::SIGN_EXTEND
10979     if (IndexOffset->getOpcode() == ISD::SIGN_EXTEND) {
10996     if (Index->getOpcode() == ISD::SIGN_EXTEND) {