Searched defs:FS (Results 1 - 25 of 146) sorted by relevance

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/external/llvm/lib/Target/BPF/
H A DBPFSubtarget.cpp29 const std::string &FS, const TargetMachine &TM)
30 : BPFGenSubtargetInfo(TT, CPU, FS), InstrInfo(), FrameLowering(*this),
28 BPFSubtarget(const Triple &TT, const std::string &CPU, const std::string &FS, const TargetMachine &TM) argument
H A DBPFTargetMachine.cpp40 StringRef CPU, StringRef FS,
44 : LLVMTargetMachine(T, computeDataLayout(TT), TT, CPU, FS, Options, RM, CM,
47 Subtarget(TT, CPU, FS, *this) {
39 BPFTargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
/external/llvm/lib/Target/MSP430/
H A DMSP430Subtarget.cpp29 MSP430Subtarget::initializeSubtargetDependencies(StringRef CPU, StringRef FS) { argument
30 ParseSubtargetFeatures("generic", FS);
35 const std::string &FS, const TargetMachine &TM)
36 : MSP430GenSubtargetInfo(TT, CPU, FS), FrameLowering(),
37 InstrInfo(initializeSubtargetDependencies(CPU, FS)), TLInfo(TM, *this) {}
34 MSP430Subtarget(const Triple &TT, const std::string &CPU, const std::string &FS, const TargetMachine &TM) argument
H A DMSP430TargetMachine.cpp29 StringRef CPU, StringRef FS,
33 : LLVMTargetMachine(T, "e-m:e-p:16:16-i32:16:32-a:16-n8:16", TT, CPU, FS,
37 Subtarget(TT, CPU, FS, *this) {
28 MSP430TargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
/external/llvm/lib/Target/XCore/
H A DXCoreSubtarget.cpp29 const std::string &FS, const TargetMachine &TM)
30 : XCoreGenSubtargetInfo(TT, CPU, FS), InstrInfo(), FrameLowering(*this),
28 XCoreSubtarget(const Triple &TT, const std::string &CPU, const std::string &FS, const TargetMachine &TM) argument
/external/clang/lib/Basic/
H A DFileSystemStatCache.cpp45 FileSystemStatCache *Cache, vfs::FileSystem &FS) {
51 R = Cache->getStat(Path, Data, isFile, F, FS);
55 llvm::ErrorOr<vfs::Status> Status = FS.status(Path);
70 auto OwnedFile = FS.openFileForRead(Path);
111 std::unique_ptr<vfs::File> *F, vfs::FileSystem &FS) {
112 LookupResult Result = statChained(Path, Data, isFile, F, FS);
43 get(const char *Path, FileData &Data, bool isFile, std::unique_ptr<vfs::File> *F, FileSystemStatCache *Cache, vfs::FileSystem &FS) argument
110 getStat(const char *Path, FileData &Data, bool isFile, std::unique_ptr<vfs::File> *F, vfs::FileSystem &FS) argument
/external/llvm/lib/CodeGen/
H A DLLVMTargetMachine.cpp77 StringRef FS, TargetOptions Options,
80 : TargetMachine(T, DataLayoutString, TT, CPU, FS, Options) {
74 LLVMTargetMachine(const Target &T, StringRef DataLayoutString, const Triple &TT, StringRef CPU, StringRef FS, TargetOptions Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
/external/llvm/lib/ProfileData/
H A DSampleProf.cpp144 const FunctionSamples &FS) {
145 FS.print(OS);
143 operator <<(raw_ostream &OS, const FunctionSamples &FS) argument
/external/llvm/lib/Target/CppBackend/
H A DCPPTargetMachine.h27 StringRef FS, const TargetOptions &Options, Reloc::Model RM,
29 : TargetMachine(T, "", TT, CPU, FS, Options) {}
26 CPPTargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
/external/llvm/lib/Target/Hexagon/
H A DHexagonSubtarget.cpp63 HexagonSubtarget::initializeSubtargetDependencies(StringRef CPU, StringRef FS) { argument
81 ParseSubtargetFeatures(CPUString, FS);
92 StringRef FS, const TargetMachine &TM)
93 : HexagonGenSubtargetInfo(TT, CPU, FS), CPUString(CPU),
94 InstrInfo(initializeSubtargetDependencies(CPU, FS)), TLInfo(TM, *this),
91 HexagonSubtarget(const Triple &TT, StringRef CPU, StringRef FS, const TargetMachine &TM) argument
H A DHexagonTargetMachine.cpp125 StringRef CPU, StringRef FS,
131 "n16:32", TT, CPU, FS, Options, RM, CM, OL),
147 std::string FS = !FSAttr.hasAttribute(Attribute::None) local
151 auto &I = SubtargetMap[CPU + FS];
157 I = llvm::make_unique<HexagonSubtarget>(TargetTriple, CPU, FS, *this);
124 HexagonTargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) argument
/external/llvm/lib/Target/NVPTX/
H A DNVPTXSubtarget.cpp30 StringRef FS) {
32 if (CPU.empty() && FS.size())
36 ParseSubtargetFeatures(TargetName, FS);
47 const std::string &FS,
49 : NVPTXGenSubtargetInfo(TT, CPU, FS), PTXVersion(0), SmVersion(20), TM(TM),
50 InstrInfo(), TLInfo(TM, initializeSubtargetDependencies(CPU, FS)),
29 initializeSubtargetDependencies(StringRef CPU, StringRef FS) argument
46 NVPTXSubtarget(const Triple &TT, const std::string &CPU, const std::string &FS, const NVPTXTargetMachine &TM) argument
/external/llvm/lib/Target/Sparc/
H A DSparcSubtarget.cpp30 StringRef FS) {
43 ParseSubtargetFeatures(CPUName, FS);
53 const std::string &FS, TargetMachine &TM,
55 : SparcGenSubtargetInfo(TT, CPU, FS), Is64Bit(is64Bit),
56 InstrInfo(initializeSubtargetDependencies(CPU, FS)), TLInfo(TM, *this),
29 initializeSubtargetDependencies(StringRef CPU, StringRef FS) argument
52 SparcSubtarget(const Triple &TT, const std::string &CPU, const std::string &FS, TargetMachine &TM, bool is64Bit) argument
/external/llvm/lib/Target/SystemZ/
H A DSystemZSubtarget.cpp26 SystemZSubtarget::initializeSubtargetDependencies(StringRef CPU, StringRef FS) { argument
31 ParseSubtargetFeatures(CPUName, FS);
36 const std::string &FS,
38 : SystemZGenSubtargetInfo(TT, CPU, FS), HasDistinctOps(false),
44 InstrInfo(initializeSubtargetDependencies(CPU, FS)), TLInfo(TM, *this),
35 SystemZSubtarget(const Triple &TT, const std::string &CPU, const std::string &FS, const TargetMachine &TM) argument
/external/llvm/lib/Target/WebAssembly/
H A DWebAssemblySubtarget.cpp29 WebAssemblySubtarget::initializeSubtargetDependencies(StringRef FS) { argument
35 ParseSubtargetFeatures(CPUString, FS);
41 const std::string &FS,
43 : WebAssemblyGenSubtargetInfo(TT, CPU, FS), HasSIMD128(false),
45 InstrInfo(initializeSubtargetDependencies(FS)), TSInfo(),
39 WebAssemblySubtarget(const Triple &TT, const std::string &CPU, const std::string &FS, const TargetMachine &TM) argument
/external/mesa3d/src/gallium/drivers/radeon/
H A DAMDGPUSubtarget.cpp23 AMDGPUSubtarget::AMDGPUSubtarget(StringRef TT, StringRef CPU, StringRef FS) : argument
24 AMDGPUGenSubtargetInfo(TT, CPU, FS), mDumpCode(false) {
35 ParseSubtargetFeatures(GPU, FS);
H A Dradeon_llvm_emit.cpp113 std::string FS; local
118 FS += "+DumpCode";
122 AMDGPUTriple.getTriple(), gpu_family, FS,
/external/jsoncpp/scons-tools/
H A Dtargz.py16 import SCons.Node.FS namespace
58 source_factory = SCons.Node.FS.Entry,
/external/llvm/lib/Target/AMDGPU/
H A DAMDGPUSubtarget.cpp37 StringRef GPU, StringRef FS) {
48 FullFS += FS;
65 AMDGPUSubtarget::AMDGPUSubtarget(const Triple &TT, StringRef GPU, StringRef FS, argument
67 : AMDGPUGenSubtargetInfo(TT, GPU, FS), DevName(GPU), Is64bit(false),
81 initializeSubtargetDependencies(TT, GPU, FS);
36 initializeSubtargetDependencies(const Triple &TT, StringRef GPU, StringRef FS) argument
/external/clang/lib/Analysis/
H A DFormatStringParsing.h47 bool ParseLengthModifier(FormatSpecifier &FS, const char *&Beg, const char *E,
51 T FS; member in class:clang::analyze_format_string::SpecifierResult
59 : FS(fs), Start(start), Stop(false) {}
66 return FS;
68 const T &getValue() { return FS; }
/external/llvm/include/llvm/Support/
H A DSolaris.h32 #undef FS macro
/external/llvm/lib/Target/AArch64/
H A DAArch64Subtarget.cpp40 AArch64Subtarget::initializeSubtargetDependencies(StringRef FS) { argument
46 ParseSubtargetFeatures(CPUString, FS);
51 const std::string &FS,
53 : AArch64GenSubtargetInfo(TT, CPU, FS), ARMProcFamily(Others),
59 InstrInfo(initializeSubtargetDependencies(FS)), TSInfo(),
50 AArch64Subtarget(const Triple &TT, const std::string &CPU, const std::string &FS, const TargetMachine &TM, bool LittleEndian) argument
/external/llvm/lib/Target/ARM/
H A DARMTargetMachine.cpp177 StringRef CPU, StringRef FS,
182 CPU, FS, Options, RM, CM, OL),
185 Subtarget(TT, CPU, FS, *this, isLittle), isLittle(isLittle) {
212 std::string FS = !FSAttr.hasAttribute(Attribute::None) local
227 FS += FS.empty() ? "+soft-float" : ",+soft-float";
229 auto &I = SubtargetMap[CPU + FS];
235 I = llvm::make_unique<ARMSubtarget>(TargetTriple, CPU, FS, *this, isLittle);
249 StringRef CPU, StringRef FS,
253 : ARMBaseTargetMachine(T, TT, CPU, FS, Option
176 ARMBaseTargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL, bool isLittle) argument
[all...]
/external/llvm/lib/Target/BPF/MCTargetDesc/
H A DBPFMCTargetDesc.cpp50 StringRef CPU, StringRef FS) {
51 return createBPFMCSubtargetInfoImpl(TT, CPU, FS);
49 createBPFMCSubtargetInfo(const Triple &TT, StringRef CPU, StringRef FS) argument
/external/llvm/lib/Target/MSP430/MCTargetDesc/
H A DMSP430MCTargetDesc.cpp47 createMSP430MCSubtargetInfo(const Triple &TT, StringRef CPU, StringRef FS) { argument
48 return createMSP430MCSubtargetInfoImpl(TT, CPU, FS);

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